__interrupt void Timer_A (void)
{
CCR0 += Bitime; // Add Offset to CCR0
// RX
if (CCTL0 & CCIS0) // RX on CCI0B?
{
if( CCTL0 & CAP ) // Capture mode = start bit edge
{
CCTL0 &= ~ CAP; // Switch from capture to compare mode
CCR0 += Bitime_5;
_BIC_SR_IRQ(SCG1 + SCG0); // DCO reamins on after reti
}
else
{
RXTXData = RXTXData >> 1;
if (CCTL0 & SCCI) // Get bit waiting in receive latch
RXTXData |= 0x80;
BitCnt --; // All bits RXed?
if ( BitCnt == 0)
//>>>>>>>>>> Decode of Received Byte Here <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<
{
CCTL0 &= ~ CCIE; // All bits RXed, disable interrupt
_BIC_SR_IRQ(LPM3_bits); // Clear LPM3 bits from 0(SR)
}
//>>>>>>>>>> Decode of Received Byte Here <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<
}
}
// TX
else
{
if ( BitCnt == 0)
ISR(DACDMA, irq_dacdma)
{
if(DMA0CTL & DMAIFG) {
DMA0CTL &= ~(DMAIFG | DMAIE);
if(callbacks[0] != NULL) {
callbacks[0]();
}
_BIC_SR_IRQ(LPM3_bits);
}
if(DMA1CTL & DMAIFG) {
DMA1CTL &= ~(DMAIFG | DMAIE);
if(callbacks[1] != NULL) {
callbacks[1]();
}
_BIC_SR_IRQ(LPM3_bits);
}
if(DMA2CTL & DMAIFG) {
DMA2CTL &= ~(DMAIFG | DMAIE);
if(callbacks[2] != NULL) {
callbacks[2]();
}
_BIC_SR_IRQ(LPM3_bits);
}
if(DAC12_0CTL & DAC12IFG) {
DAC12_0CTL &= ~(DAC12IFG | DAC12IE);
}
if(DAC12_1CTL & DAC12IFG) {
DAC12_1CTL &= ~(DAC12IFG | DAC12IE);
}
}
__interrupt void Timer_A (void)
{ // **** ***** **** 1Hz
if(WDT_flag)WDTCTL = WDT_ARST_1000; //--餵狗
if(startCount){ //---暫停讀秒 功能
divide++; if(divide>1){countTime++; divide=0;} //-.- 一秒
}
if(outPutcount && (divide==1)){ //每秒透過RS232輸出
FirstStart ?count_back = FirstStart_Sec - countTime : count_back = ReStart_Sec - countTime ;
sprintf(string,"%5ld s /per %2d hours \r",count_back,ReStart_Day);
// sprintf(string,"%5d heading /per %2d hours \r",TDCM3_Heading,TDCM3_status);
UART1_SendStr(string);
}
if( (countTime >= FirstStart_Sec ) && FirstStart){
outPutcount = false; //---做完第一次後就不用再輸出啦
FirstStart = false;
countTime = 0;
Setting_mode = false;
Leveling = true;
_BIC_SR_IRQ(LPM0_bits);
}
if( (countTime >= ReStart_Sec) &&(!FirstStart)){
Leveling = true;
countTime = 0;
_BIC_SR_IRQ(LPM0_bits);
}
}
void timer0_A1_ISR(void)
{
uint16_t iv = TA0IV;
if (iv == TA0IV_TA0CCR4) {
// timer used by timer_a0_delay()
timer_a0_last_event |= TIMER_A0_EVENT_CCR4;
_BIC_SR_IRQ(LPM3_bits);
} else if (iv == TA0IV_TA0CCR1) {
// timer used by timer_a0_delay_noblk_ccr1()
// disable interrupt
TA0CCTL1 &= ~CCIE;
TA0CCTL1 = 0;
timer_a0_last_event |= TIMER_A0_EVENT_CCR1;
_BIC_SR_IRQ(LPM3_bits);
} else if (iv == TA0IV_TA0CCR2) {
// timer used by timer_a0_delay_noblk_ccr2()
// disable interrupt
TA0CCTL2 &= ~CCIE;
TA0CCTL2 = 0;
timer_a0_last_event |= TIMER_A0_EVENT_CCR2;
_BIC_SR_IRQ(LPM3_bits);
} else if (iv == TA0IV_TA0CCR3) {
// timer used by timer_a0_delay_noblk_ccr3()
// disable interrupt
TA0CCTL3 &= ~CCIE;
TA0CCTL3 = 0;
timer_a0_last_event |= TIMER_A0_EVENT_CCR3;
_BIC_SR_IRQ(LPM3_bits);
} else if (iv == TA0IV_TA0IFG) {
TA0CTL &= ~TAIFG;
timer_a0_ovf++;
timer_a0_last_event |= TIMER_A0_EVENT_IFG;
_BIC_SR_IRQ(LPM3_bits);
}
}
interrupt(DACDMA_VECTOR) irq_dacdma(void)
{
if(DMA0CTL & DMAIFG) {
DMA0CTL &= ~(DMAIFG | DMAIE);
if(callbacks[0] != NULL) {
callbacks[0]();
}
_BIC_SR_IRQ(LPM3_bits);
}
if(DMA1CTL & DMAIFG) {
DMA1CTL &= ~(DMAIFG | DMAIE);
if(callbacks[1] != NULL) {
callbacks[1]();
}
_BIC_SR_IRQ(LPM3_bits);
}
if(DMA2CTL & DMAIFG) {
DMA2CTL &= ~(DMAIFG | DMAIE);
if(callbacks[2] != NULL) {
callbacks[2]();
}
_BIC_SR_IRQ(LPM3_bits);
}
if(DAC12_0CTL & DAC12IFG) {
DAC12_0CTL &= ~(DAC12IFG | DAC12IE);
}
if(DAC12_1CTL & DAC12IFG) {
DAC12_1CTL &= ~(DAC12IFG | DAC12IE);
}
}
__interrupt void ADC12ISR (void)
#endif
{
switch(ADC12IV)
{
case 0: break; // Vector 0: No interrupt
case 2: break; // Vector 2: ADC overflow
case 4: break; // Vector 4: ADC timing overflow
case 6: // Vector 6: ADC12IFG0
adc12_result = ADC12MEM0; // Move results, IFG is cleared
adc12_data_ready = 1;
_BIC_SR_IRQ(LPM3_bits); // Exit active CPU
break;
case 8: break; // Vector 8: ADC12IFG1
case 10: break; // Vector 10: ADC12IFG2
case 12: break; // Vector 12: ADC12IFG3
case 14: break; // Vector 14: ADC12IFG4
case 16: break; // Vector 16: ADC12IFG5
case 18: break; // Vector 18: ADC12IFG6
case 20: break; // Vector 20: ADC12IFG7
case 22: break; // Vector 22: ADC12IFG8
case 24: break; // Vector 24: ADC12IFG9
case 26: break; // Vector 26: ADC12IFG10
case 28: break; // Vector 28: ADC12IFG11
case 30: break; // Vector 30: ADC12IFG12
case 32: break; // Vector 32: ADC12IFG13
case 34: break; // Vector 34: ADC12IFG14
default: break;
}
}
__interrupt void Timer_A0 (void)
{
// Turn Timer A OFF
TACTL = 0x00;
// Turn CPU on
_BIC_SR_IRQ(LPM3_bits + GIE);
}
__interrupt void TIMER0_A1_5_ISR(void)
#endif
{
u16 value;
switch (TA0IV)
{
//pfs
#ifndef ELIMINATE_BLUEROBIN
// Timer0_A1 BlueRobin timer
case 0x02: // Timer0_A1 handler
BRRX_TimerTask_v();
break;
#endif
// Timer0_A2 1/1 or 1/100 sec Stopwatch
case 0x04: // Timer0_A2 handler
// Disable IE
TA0CCTL2 &= ~CCIE;
// Reset IRQ flag
TA0CCTL2 &= ~CCIFG;
// Load CCR register with next capture point
#ifdef CONFIG_STOP_WATCH
update_stopwatch_timer();
#endif
// Enable timer interrupt
TA0CCTL2 |= CCIE;
// Increase stopwatch counter
#ifdef CONFIG_STOP_WATCH
stopwatch_tick();
#endif
break;
// Timer0_A3 Configurable periodic IRQ (used by button_repeat and buzzer)
case 0x06: // Disable IE
TA0CCTL3 &= ~CCIE;
// Reset IRQ flag
TA0CCTL3 &= ~CCIFG;
// Store new value in CCR
value = TA0R + sTimer.timer0_A3_ticks; //timer0_A3_ticks_g;
// Load CCR register with next capture point
TA0CCR3 = value;
// Enable timer interrupt
TA0CCTL3 |= CCIE;
// Call function handler
fptr_Timer0_A3_function();
break;
// Timer0_A4 One-time delay
case 0x08: // Disable IE
TA0CCTL4 &= ~CCIE;
// Reset IRQ flag
TA0CCTL4 &= ~CCIFG;
// Set delay over flag
sys.flag.delay_over = 1;
break;
}
// Exit from LPM3 on RETI
_BIC_SR_IRQ(LPM3_bits);
}
__interrupt void ADC12ISR (void)
{
results[0] = ADC12MEM0; // Move results, IFG is cleared
results[1] = ADC12MEM1; // Move results, IFG is cleared
_BIC_SR_IRQ(LPM0_bits); // Clear LPM0
_NOP(); // SET BREAKPOINT HERE
}
__interrupt void Timer_A0_ISR(void)
{
#ifdef LP_DELAY
if(mode == UART_MODE)
{
#endif
TACCR0 += UART_TBIT; // Add Offset to CCRx
if (txBitCnt == 0) // All bits TXed?
{
TACCTL0 &= ~CCIE; // All bits TXed, disable interrupt
txBitCnt = 10; // Re-load bit counter
_BIC_SR_IRQ(LPM0_bits); // exit sleep mode
}
else
{
if (txData & 0x01)
{
TACCTL0 &= ~OUTMOD2; // TX Mark '1'
}
else
{
TACCTL0 |= OUTMOD2; // TX Space '0'
}
txData >>= 1;
txBitCnt--;
}
#ifdef LP_DELAY
}
__interrupt void watchdog_timer(void)
{
// Reset WDTCounter
//WDTCTL |= WDTPW + WDTCNTCL;
// Wake system up
_BIC_SR_IRQ(LPM0_bits + GIE);
}
void ADC10_ISR(void){
//again lower level way
//__bic_SR_register_on_exit(CPUOFF); // Clear CPUOFF bit from 0(SR)
_BIC_SR_IRQ(LPM0_bits); //to follow convention
//or simply
//LPM0_EXIT;
}
__interrupt
#endif
void TIMER0_A1_5_ISR(void)
{
u16 value = 0;
switch (TA0IV)
{
#ifdef BLUEROBIN
// Timer0_A1 BlueRobin timer
case 0x02: // Timer0_A1 handler
BRRX_TimerTask_v();
break;
#endif
// Timer0_A2 1/1 or 1/100 sec Stopwatch
case 0x04: // Timer0_A2 handler
// Disable IE
TA0CCTL2 &= ~CCIE;
// Reset IRQ flag
TA0CCTL2 &= ~CCIFG;
// Load CCR register with next capture point
update_stopwatch_timer();
// Enable timer interrupt
TA0CCTL2 |= CCIE;
// Increase stopwatch counter
stopwatch_tick();
break;
// Timer0_A3 Configurable periodic IRQ (used by button_repeat and buzzer)
case 0x06: // Disable IE
TA0CCTL3 &= ~CCIE;
// Reset IRQ flag
TA0CCTL3 &= ~CCIFG;
// Store new value in CCR
// To make sure this value is correctly read
while (value != TA0R)
value = TA0R;
value += sTimer.timer0_A3_ticks;
// Load CCR register with next capture point
TA0CCR3 = value;
// Enable timer interrupt
TA0CCTL3 |= CCIE;
// Call function handler
fptr_Timer0_A3_function();
break;
// Timer0_A4 One-time delay
case 0x08: // Disable IE
TA0CCTL4 &= ~CCIE;
// Reset IRQ flag
TA0CCTL4 &= ~CCIFG;
// Set delay over flag
sys.flag.delay_over = 1;
break;
}
// Exit from LPM3 on RETI
_BIC_SR_IRQ(LPM3_bits);
}
__interrupt void usart0_rx (void)
{
if ((IFG1 & URXIFG0)) // Test URXIFG0
{
while (!(IFG1 & UTXIFG0)); // USART0 TX buffer ready?
TXBUF0 = RXBUF0; // RXBUF0 to TXBUF0
_BIC_SR_IRQ(LPM3_bits); // Exit LPM3 after reti
UTCTL0 |= SSEL0; // SSEL0 = 1, no RX activity
}
else // Start edge
{
UTCTL0 &= ~URXSE; // Clear URXS signal
UTCTL0 |= URXSE; // Re-enable edge detect
_BIC_SR_IRQ(SCG1 + SCG0); // DCO reamins on after reti
UTCTL0 &= ~SSEL0; // SSEL0= 0, RX activity
}
}
__interrupt void ADC12_ISR (void)
{
if (ADC12MEM0 < 0x7FF)
P5OUT &= ~0x02; // Clear P5.1 LED off
else
P5OUT |= 0x02; // Set P5.1 LED on
_BIC_SR_IRQ(CPUOFF); // Clear CPUOFF bit from 0(SR)
}
__interrupt void SPI0_rx (void)
{
while ((IFG1 & UTXIFG0) == 0);
TXBUF0 = RXBUF0;
while (!(U0TCTL & TXEPT)); // UART TX buffer empty?
_BIC_SR_IRQ(LPM0_bits + GIE);
}
__interrupt void ComManager::USCI_B1_ISR()
{
// check for Airship (I2C) interrupts
switch (__even_in_range(UCB1IV, USCI_I2C_UCTXIFG))
{
case USCI_I2C_UCRXIFG:
airshipQ.Enqueue(UCB1RXBUF); // enqueue data
break;
case USCI_I2C_UCTXIFG:
// find which link we're currently receiving data from
switch (airshipFromId)
{
case GCS:
if (gcsQ.IsDataAvailable(AIRSHIP_LINK_GCS_HEAD))
{
UCB1TXBUF = gcsQ.Dequeue(AIRSHIP_LINK_GCS_HEAD);
txTimers[AIRSHIP] = TX_TIMEOUT; // reset timer
++airshipTxCount;
}
else
{
// if there is no data available, the airship must erroneously
// be asking us to transmit, so we'll just send it 0
UCB1TXBUF = 0;
}
break;
case ROTORCRAFT:
if (rotorcraftQ.IsDataAvailable(AIRSHIP_LINK_ROTORCRAFT_HEAD))
{
UCB1TXBUF = rotorcraftQ.Dequeue(AIRSHIP_LINK_ROTORCRAFT_HEAD);
txTimers[AIRSHIP] = TX_TIMEOUT; // reset timer
++airshipTxCount;
}
else
{
// if there is no data available, the airship must erroneously
// be asking us to transmit, so we'll just send it 0
UCB1TXBUF = 0;
}
break;
default:
// we should never get here
break;
}
// clear interrupt
AIRSHIP_INT_POUT &= ~AIRSHIP_INT_BIT;
break;
default:
break;
}
// disable TX interrupts
UCA0IE &= ~UCTXIE;
UCA1IE &= ~UCTXIE;
_BIC_SR_IRQ(LPM0_bits); // exit low-power mode
}
__interrupt void ComManager::TIMER0_A0_ISR()
{
updateTimers = true;
// disable TX interrupts and exit low-power mode
UCA0IE &= ~UCTXIE;
UCA1IE &= ~UCTXIE;
_BIC_SR_IRQ(LPM0_bits);
}
__interrupt void Timer_A0 (void)
{
// Turn timer interrupts OFF
CCTL0 = 0x00;
// Turn OFF Timer
TACTL = 0x00;
// Turn CPU on
_BIC_SR_IRQ(LPM3_bits + GIE);
}
__interrupt void TIMER0_A1_5_ISR(void)
{
u16 value;
switch (TA0IV)
{
// Timer0_A1 Light Timer
case 0x02: // Timer0_A1 handler
TA0CCTL1 &= ~CCIE;
// Reset IRQ flag
TA0CCTL1 &= ~CCIFG;
// Call function handler
fptr_Timer0_A1_function();
// Enable timer interrupt
TA0CCTL1 |= CCIE;
// Return without changing the Power Mode
return;
// Timer0_A2 Light timer
case 0x04: // Disable IE
TA0CCTL2 &= ~CCIE;
// Reset IRQ flag
TA0CCTL2 &= ~CCIFG;
// Call function handler
fptr_Timer0_A2_function();
// Enable timer interrupt
TA0CCTL2 |= CCIE;
// Return without changing the Power Mode
return;
// Timer0_A3 Configurable periodic IRQ (used by button_repeat and buzzer)
case 0x06: // Disable IE
TA0CCTL3 &= ~CCIE;
// Reset IRQ flag
TA0CCTL3 &= ~CCIFG;
// Store new value in CCR
value = TA0R + sTimer.timer0_A3_ticks; //timer0_A3_ticks_g;
// Load CCR register with next capture point
TA0CCR3 = value;
// Enable timer interrupt
TA0CCTL3 |= CCIE;
// Call function handler
fptr_Timer0_A3_function();
break;
// Timer0_A4 One-time delay
case 0x08: // Disable IE
TA0CCTL4 &= ~CCIE;
// Reset IRQ flag
TA0CCTL4 &= ~CCIFG;
// Set delay over flag
sys.flag.delay_over = 1;
break;
}
// Exit from LPM3 on RETI
_BIC_SR_IRQ(LPM3_bits);
}
/* ------------------------------------------------------------------------
Set a flag when a low is detected on the 1-wire data line
Only active when waiting for a iButton to be connected
------------------------------------------------------------------------ */
interrupt (PORT1_VECTOR) INT_port1( void )
{
if( P1IFG & 0x02 )
{
presence = 1;
}
P1IFG = 0;
_BIC_SR_IRQ(LPM0_bits);
}
__interrupt void NMI (void)
{
// Clear NMIIFG flag
IFG1 = 0x00;
// Disable NMI
IE1 = 0x00;
//Set NMI mode
WDTCTL = WDTPW + WDTHOLD;
// Turn CPU on
_BIC_SR_IRQ(LPM4_bits + GIE);
}
__interrupt void USCIAB0RX_ISR(void)
{
if(IFG2&UCA0RXIFG)
UART_Data = UCA0RXBUF; // Store RX'ed UART data
if (I2C_ByteCtr) // Check I2C byte counter
{
UCB0STAT &= ~(UCSTPIFG + UCSTTIFG); // Clear interrupt flags
_BIC_SR_IRQ(LPM0_bits + GIE); // Exit LPM0 if data was received
}
}
__interrupt( ADC12_VECTOR ) void adc12_isr( void )
{
adc_in[adc_count] = ADC12MEM0;
adc_count++;
if( adc_count >= 128 ) {
ADC12CTL0 = 0;
_BIC_SR_IRQ( LPM0_bits ); /* Enter active mode */
}
}
__interrupt void SD16ISR(void)
{
switch (SD16IV)
{
case 2: // SD16MEM Overflow
break;
case 4: // SD16MEM0 IFG
result = SD16MEM0; // Save CH0 results (clears IFG)
break;
}
_BIC_SR_IRQ(LPM0_bits); // Exit LPM0
}
__interrupt void basic_timer(void)
{
// ticks++;
d--;
// if (ticks % 2 == 0)
// led_on();
// else led_off();
if (d <= 0)
{
_DINT();
}
_BIC_SR_IRQ(CPUOFF);
}
__interrupt void ComManager::USCI_A1_ISR()
{
// check for GCS (UART A1) RX interrupt
if (UCA1IFG & UCRXIFG)
{
gcsQ.Enqueue(UCA1RXBUF); // enqueue data
}
// disable TX interrupts
UCA0IE &= ~UCTXIE;
UCA1IE &= ~UCTXIE;
_BIC_SR_IRQ(LPM0_bits); // exit low-power mode
}
__interrupt void ComManager::USCI_A0_ISR()
{
// check for Rotorcraft (UART A0) RX interrupt
if (UCA0IFG & UCRXIFG)
{
rotorcraftQ.Enqueue(UCA0RXBUF); // enqueue data
}
// disable TX interrupts
UCA0IE &= ~UCTXIE;
UCA1IE &= ~UCTXIE;
_BIC_SR_IRQ(LPM0_bits); // exit low-power mode
}
/* -----------------------------------------------------------------------
Measure the 1/2 period of the 32.768KHz xtal
----------------------------------------------------------------------- */
interrupt (TIMERA1_VECTOR) INT_timera1( void )
{
if( TAIV == 0x04 )
{
/* CCR2 Interrupt */
/* Measure the 32.768KHz period */
VZC_2delta = CCR2 - VZC_LastCap;
VZC_LastCap = CCR2;
Status = TASK_OVR;
_BIC_SR_IRQ(LPM0_bits);
}
}
uart_rx(void)
{
uart_handler_t handler = uart_handler[uart_mode];
int c;
if(!(IFG2 & URXIFG1)) {
/* If rising edge is detected, toggle & return */
uart_edge = 1;
U1TCTL &= ~URXSE;
U1TCTL |= URXSE;
_BIC_SR_IRQ(LPM3_bits);
return;
}
uart_edge = 0;
if(!(URCTL1 & RXERR)) {
c = UART_RX;
if(handler(c)) {
_BIC_SR_IRQ(LPM3_bits);
}
} else {
/* read out the char to clear the interrupt flags. */
c = UART_RX;
}
}
