fpu_control_t
__mips_fpu_getcw (void)
{
fpu_control_t cw;
_FPU_GETCW (cw);
return cw;
}
int
fegetenv (fenv_t *envp)
{
_FPU_GETCW (*envp);
/* Success. */
return 0;
}
int
fegetenv (fenv_t *envp)
{
_FPU_GETCW (envp->__fpc);
/* Success. */
return 0;
}
void f(mpfr_t y, mpfr_t xMpfr) {
unsigned short oldcw, cw;
#if defined(D_TO_D)
double x;
double resh;
#elif defined(D_TO_DD)
double x;
double resh, resm;
#elif defined(D_TO_TD)
double x;
double resh, resm, resl;
#elif defined(DD_TO_DD)
double xh, xm;
double resh, resm;
#elif defined(DD_TO_TD)
double xh, xm;
double resh, resm, resl;
#elif defined (TD_TO_TD)
double xh, xm, xl;
double resh, resm, resl;
#endif
_FPU_GETCW(oldcw);
cw = (_FPU_DEFAULT & ~_FPU_EXTENDED)|_FPU_DOUBLE;
_FPU_SETCW(cw);
#if defined(D_TO_D)
mpfr_to_double(&x, xMpfr);
POLYNOMIALNAME(&resh, x);
double_to_mpfr(y, resh);
#elif defined(D_TO_DD)
mpfr_to_double(&x, xMpfr);
POLYNOMIALNAME(&resh, &resm, x);
doubledouble_to_mpfr(y, resh, resm);
#elif defined(D_TO_TD)
mpfr_to_double(&x, xMpfr);
POLYNOMIALNAME(&resh, &resm, &resl, x);
tripledouble_to_mpfr(y, resh, resm, resl);
#elif defined(DD_TO_DD)
mpfr_to_doubledouble(&xh, &xm, xMpfr);
POLYNOMIALNAME(&resh, &resm, xh, xm);
doubledouble_to_mpfr(y, resh, resm);
#elif defined(DD_TO_TD)
mpfr_to_doubledouble(&xh, &xm, xMpfr);
POLYNOMIALNAME(&resh, &resm, &resl, xh, xm);
tripledouble_to_mpfr(y, resh, resm, resl);
#elif defined(TD_TO_TD)
mpfr_to_tripledouble(&xh, &xm, &xl, xMpfr);
POLYNOMIALNAME(&resh, &resm, &resl, xh, xm, xl);
tripledouble_to_mpfr(y, resh, resm, resl);
#else
#warning You must define one of the macros for the argument and result formats
mpfr_set(y,xMpfr,GMP_RNDN);
#endif
_FPU_SETCW(oldcw);
}
static void
detect_denormals()
{
#include <fpu_control.h>
int cw = 0;
_FPU_GETCW(cw);
cw &= ~_FPU_MASK_DM;
_FPU_SETCW(cw);
}
int
fesetenv (const fenv_t *envp)
{
fpu_control_t fpcr;
fpu_fpsr_t fpsr;
fpu_control_t updated_fpcr;
_FPU_GETCW (fpcr);
_FPU_GETFPSR (fpsr);
fpcr &= _FPU_RESERVED;
fpsr &= _FPU_FPSR_RESERVED;
if (envp == FE_DFL_ENV)
{
fpcr |= _FPU_DEFAULT;
fpsr |= _FPU_FPSR_DEFAULT;
}
else if (envp == FE_NOMASK_ENV)
{
fpcr |= _FPU_FPCR_IEEE;
fpsr |= _FPU_FPSR_IEEE;
}
else
{
fpcr |= envp->__fpcr & ~_FPU_RESERVED;
fpsr |= envp->__fpsr & ~_FPU_FPSR_RESERVED;
}
_FPU_SETFPSR (fpsr);
_FPU_SETCW (fpcr);
/* Trapping exceptions are optional in AArch64 the relevant enable
bits in FPCR are RES0 hence the absence of support can be
detected by reading back the FPCR and comparing with the required
value. */
_FPU_GETCW (updated_fpcr);
if ((updated_fpcr & fpcr) != fpcr)
return 1;
return 0;
}
int
fegetround (void)
{
int cw;
/* Get control word. */
_FPU_GETCW (cw);
return cw & 0x3;
}
int
fetestexcept (int excepts)
{
fexcept_t temp;
/* Get current exceptions. */
_FPU_GETCW(temp);
return temp & excepts & FE_ALL_EXCEPT;
}
int
fetestexcept (int excepts)
{
int cw;
/* Get current control word. */
_FPU_GETCW (cw);
return cw & excepts & FE_ALL_EXCEPT;
}
int
fegetround (void)
{
int cw;
/* Get control word. */
_FPU_GETCW (cw);
return (cw & ROUND_MASK);
}
int
fegetround (void)
{
fpu_control_t cw;
/* Get control word. */
_FPU_GETCW (cw);
return cw & 0x1;
}
int
fegetexcept (void)
{
unsigned int exc;
/* Get the current control word. */
_FPU_GETCW (exc);
return (exc & ENABLE_MASK) >> ENABLE_SHIFT;
}
int
fegetexcept (void)
{
fpu_control_t temp;
/* Get current exceptions. */
_FPU_GETCW (temp);
return (temp >> 5) & FE_ALL_EXCEPT;
}
static void
set_fpu_prec (void)
{
fpu_control_t cw;
_FPU_GETCW(cw);
cw &= ~(_FPU_EXTENDED|_FPU_DOUBLE|_FPU_SINGLE);
cw |= (MPFR_FPU_PREC);
_FPU_SETCW(cw);
}
int
fegetenv (fenv_t *envp)
{
fpu_control_t fpcr;
fpu_fpsr_t fpsr;
_FPU_GETCW (fpcr);
_FPU_GETFPSR (fpsr);
envp->__fpcr = fpcr;
envp->__fpsr = fpsr;
return 0;
}
/**
* Set the debugging flags.
*
* \param debug debug string
*
* If compiled with debugging support then search for keywords in \p debug and
* enables the verbose debug output of the respective feature.
*/
static void add_debug_flags( const char *debug )
{
#ifdef DEBUG
if (_mesa_strstr(debug, "varray"))
MESA_VERBOSE |= VERBOSE_VARRAY;
if (_mesa_strstr(debug, "tex"))
MESA_VERBOSE |= VERBOSE_TEXTURE;
if (_mesa_strstr(debug, "imm"))
MESA_VERBOSE |= VERBOSE_IMMEDIATE;
if (_mesa_strstr(debug, "pipe"))
MESA_VERBOSE |= VERBOSE_PIPELINE;
if (_mesa_strstr(debug, "driver"))
MESA_VERBOSE |= VERBOSE_DRIVER;
if (_mesa_strstr(debug, "state"))
MESA_VERBOSE |= VERBOSE_STATE;
if (_mesa_strstr(debug, "api"))
MESA_VERBOSE |= VERBOSE_API;
if (_mesa_strstr(debug, "list"))
MESA_VERBOSE |= VERBOSE_DISPLAY_LIST;
if (_mesa_strstr(debug, "lighting"))
MESA_VERBOSE |= VERBOSE_LIGHTING;
if (_mesa_strstr(debug, "disassem"))
MESA_VERBOSE |= VERBOSE_DISASSEM;
/* Debug flag:
*/
if (_mesa_strstr(debug, "flush"))
MESA_DEBUG_FLAGS |= DEBUG_ALWAYS_FLUSH;
#if defined(_FPU_GETCW) && defined(_FPU_SETCW)
if (_mesa_strstr(debug, "fpexceptions")) {
/* raise FP exceptions */
fpu_control_t mask;
_FPU_GETCW(mask);
mask &= ~(_FPU_MASK_IM | _FPU_MASK_DM | _FPU_MASK_ZM
| _FPU_MASK_OM | _FPU_MASK_UM);
_FPU_SETCW(mask);
}
#endif
#else
(void) debug;
#endif
}
static unsigned int _controlfp(unsigned int val, unsigned int mask)
{
unsigned int ret;
_FPU_GETCW(ret);
if (mask)
{
ret&=~mask;
ret|=val;
_FPU_SETCW(ret);
}
return ret;
}
int
fedisableexcept (int excepts)
{
fexcept_t temp, old_exc, new_flags;
_FPU_GETCW (temp);
old_exc = (temp & FPC_EXCEPTION_MASK) >> FPC_EXCEPTION_MASK_SHIFT;
new_flags = (temp & (~((excepts & FE_ALL_EXCEPT) << FPC_EXCEPTION_MASK_SHIFT)));
_FPU_SETCW (new_flags);
return old_exc;
}
int
fesetmode (const femode_t *modep)
{
fpu_control_t cw;
_FPU_GETCW (cw);
cw &= ~FPU_CONTROL_BITS;
if (modep == FE_DFL_MODE)
cw |= _FPU_DEFAULT;
else
cw |= *modep & FPU_CONTROL_BITS;
_FPU_SETCW (cw);
return 0;
}
int
fegetexceptflag (fexcept_t *flagp, int excepts)
{
fexcept_t temp, newexcepts;
/* Get the current exceptions. */
_FPU_GETCW (temp);
newexcepts = (excepts << FPC_DXC_SHIFT) | (excepts << FPC_FLAGS_SHIFT);
*flagp = temp & newexcepts;
/* Success. */
return 0;
}
int
__fegetexceptflag (fexcept_t *flagp, int excepts)
{
fexcept_t temp;
/* Get the current exceptions. */
_FPU_GETCW (temp);
*flagp = temp & excepts & FE_ALL_EXCEPT;
/* Success. */
return 0;
}
// Older Linux version
static int getrounding(TaskData *)
{
fpu_control_t ctrl;
_FPU_GETCW(ctrl);
switch (ctrl & _FPU_RC_ZERO)
{
case _FPU_RC_NEAREST: return POLY_ROUND_TONEAREST;
case _FPU_RC_DOWN: return POLY_ROUND_DOWNWARD;
case _FPU_RC_UP: return POLY_ROUND_UPWARD;
case _FPU_RC_ZERO: return POLY_ROUND_TOZERO;
}
return 0; /* Never reached but this avoids warning message. */
}
int
fegetenv (fenv_t *envp)
{
fpu_control_t fpscr;
/* Fail if a VFP unit isn't present. */
if (!ARM_HAVE_VFP)
return 1;
_FPU_GETCW (fpscr);
envp->__cw = fpscr;
return 0;
}
int
fesetmode (const femode_t *modep)
{
fpu_control_t fpcr, fpcr_new;
_FPU_GETCW (fpcr);
if (modep == FE_DFL_MODE)
fpcr_new = (fpcr & _FPU_RESERVED) | _FPU_DEFAULT;
else
fpcr_new = *modep;
if (fpcr != fpcr_new)
_FPU_SETCW (fpcr_new);
return 0;
}
void Sys_ConfigureFPU() { // bk001213 - divide by zero
#ifdef __linux__
#ifdef __i386
#ifndef NDEBUG
// bk0101022 - enable FPE's in debug mode
static int fpu_word = _FPU_DEFAULT & ~(_FPU_MASK_ZM | _FPU_MASK_IM);
int current = 0;
_FPU_GETCW(current);
if ( current!=fpu_word) {
#if 0
Com_Printf("FPU Control 0x%x (was 0x%x)\n", fpu_word, current );
_FPU_SETCW( fpu_word );
_FPU_GETCW( current );
assert(fpu_word==current);
#endif
}
#else // NDEBUG
static int fpu_word = _FPU_DEFAULT;
_FPU_SETCW( fpu_word );
#endif // NDEBUG
#endif // __i386
#endif // __linux
}
static void setrounding(TaskData *taskData, Handle args)
{
fpu_control_t ctrl;
_FPU_GETCW(ctrl);
ctrl &= ~_FPU_RC_ZERO; /* Mask off any existing rounding. */
switch (get_C_long(taskData, DEREFWORDHANDLE(args)))
{
case POLY_ROUND_TONEAREST: ctrl |= _FPU_RC_NEAREST;
case POLY_ROUND_DOWNWARD: ctrl |= _FPU_RC_DOWN;
case POLY_ROUND_UPWARD: ctrl |= _FPU_RC_UP;
case POLY_ROUND_TOZERO: ctrl |= _FPU_RC_ZERO;
}
_FPU_SETCW(ctrl);
}
int macx_trapfpe_()
{
fpu_control_t mode, mode_sse;
_FPU_GETCW (mode) ;
mode &= (_FPU_RESERVED | _FE_DIVBYZERO | _FE_OVERFLOW | _FE_INVALID) ;
_FPU_SETCW (mode) ;
_FPU_GETMXCSR (mode_sse) ;
mode_sse &= (0xFFFF0000 | (_FPU_RESERVED | _FE_DIVBYZERO | _FE_OVERFLOW | _FE_INVALID) <<7);
_FPU_SETMXCSR (mode_sse) ;
return 1 ;
}
/* Sets __i386__ FPU rounding flags according to the rouding bits in
MIPS. MIPS uses the first two bits (bit1,bit0). I387 uses 11 and 10
bits.
MIPS I387 Meaning
00 00 (0x000) Nearest
01 11 (0xC00) Zero
10 10 (0x800) Plus Inf
11 01 (0x400) Minus Inf
*/
NativeFPUControlType changeFPUControl(unsigned int mipsFlag) {
NativeFPUControlType oldValue, newValue;
_FPU_GETCW(oldValue);
/* Change the lowest 2 bits to correspond to the i387 rounding */
mipsFlag^=2*mipsFlag;
/* Get only the lowest 2 bits of the MIPS rounding control */
mipsFlag&=3;
/* Now move the bits to where the i387 wants them */
mipsFlag*=0x400;
/* Change the rounding control bits */
newValue=(oldValue&0xF3FF)|mipsFlag;
_FPU_SETCW(oldValue);
return oldValue;
}
int
feholdexcept (fenv_t *envp)
{
unsigned long int temp;
/* Store the environment. */
_FPU_GETCW(temp);
envp->__cw = temp;
/* Now set all exceptions to non-stop. */
temp &= ~(FE_ALL_EXCEPT << FE_EXCEPT_SHIFT);
_FPU_SETCW(temp);
return 0;
}
void
__setfpucw (fpu_control_t set)
{
fpu_control_t cw;
/* Fetch the current control word. */
_FPU_GETCW (cw);
/* Preserve the reserved bits, and set the rest as the user
specified (or the default, if the user gave zero). */
cw &= _FPU_RESERVED;
cw |= set & ~_FPU_RESERVED;
_FPU_SETCW (cw);
}
