static void SPI_CloseRxTx_ISR(SPI_HandleTypeDef *hspi) { uint32_t tickstart = 0U; __IO uint32_t count = SPI_DEFAULT_TIMEOUT * (SystemCoreClock / 24U / 1000U); tickstart = HAL_GetTick(); /* Disable ERR interrupt */ __HAL_SPI_DISABLE_IT(hspi, SPI_IT_ERR); #if SPI_HAS_FIFO (void)count; if (SPI_EndRxTxTransaction(hspi, SPI_DEFAULT_TIMEOUT, tickstart) != HAL_OK) { SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG); } #else /* Wait until TXE flag is set */ do { if(count-- == 0U) { SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG); break; } } while((hspi->Instance->SR & SPI_FLAG_TXE) == RESET); /* Check the end of the transaction */ if(SPI_CheckFlag_BSY(hspi, SPI_DEFAULT_TIMEOUT, tickstart)!=HAL_OK) { SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG); } /* Clear overrun flag in 2 Lines communication mode because received is not read */ __HAL_SPI_CLEAR_OVRFLAG(hspi); #endif if(hspi->ErrorCode == HAL_SPI_ERROR_NONE) { if(hspi->State == HAL_SPI_STATE_BUSY_RX) { hspi->State = HAL_SPI_STATE_READY; HAL_SPI_RxCpltCallback(hspi); } else { hspi->State = HAL_SPI_STATE_READY; HAL_SPI_TxRxCpltCallback(hspi); } } else { hspi->State = HAL_SPI_STATE_READY; HAL_SPI_ErrorCallback(hspi); } }
static void SPI_CloseTx_ISR(SPI_HandleTypeDef *hspi) { uint32_t tickstart = 0U; __IO uint32_t count = SPI_DEFAULT_TIMEOUT * (SystemCoreClock / 24U / 1000U); /* Init tickstart for timeout management*/ tickstart = HAL_GetTick(); (void)count; #if !SPI_HAS_FIFO /* Wait until TXE flag is set */ do { if(count-- == 0U) { SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG); break; } } while((hspi->Instance->SR & SPI_FLAG_TXE) == RESET); #endif /* Disable TXE and ERR interrupt */ __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_ERR)); #if SPI_HAS_FIFO if (SPI_EndTxTransaction(hspi, SPI_DEFAULT_TIMEOUT, tickstart) != HAL_OK) { SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG); } #else /* Check Busy flag */ if(SPI_CheckFlag_BSY(hspi, SPI_DEFAULT_TIMEOUT, tickstart) != HAL_OK) { SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG); } #endif /* Clear overrun flag in 2 Lines communication mode because received is not read */ __HAL_SPI_CLEAR_OVRFLAG(hspi); hspi->State = HAL_SPI_STATE_READY; if(hspi->ErrorCode != HAL_SPI_ERROR_NONE) { HAL_SPI_ErrorCallback(hspi); } else { HAL_SPI_TxCpltCallback(hspi); } }
int DevSPI::sendSame( uint8_t ds, int ns ) { if( ns < 1 || spi->State != HAL_SPI_STATE_READY ) { return 0; } __HAL_LOCK( spi ); spi->State = HAL_SPI_STATE_BUSY_TX; spi->ErrorCode = HAL_SPI_ERROR_NONE; if( ( spi->Instance->CR1 & SPI_CR1_SPE ) != SPI_CR1_SPE ) { // need to reenable? __HAL_SPI_ENABLE( spi ); } int n = 0; for( n=0; n<ns; ++n ) { if( waitForFlag( SPI_FLAG_TXE, SPI_FLAG_TXE ) != HAL_OK ) { return 0; } *( (__IO uint8_t*)&spi->Instance->DR ) = ds; } /* Check the end of the transaction */ if( waitForFlag( SPI_FLAG_BSY, 0 ) != HAL_OK ) { // TODO: error return 0; } __HAL_SPI_CLEAR_OVRFLAG( spi ); spi->State = HAL_SPI_STATE_READY; __HAL_UNLOCK( spi ); return n; }