/** * @brief Destroy the PIS mode according to the specified parameters in * the pis_init_t and create the associated handle. * @param hperh: Pointer to a pis_handle_t structure that contains * the configuration information for the specified PIS module. * @retval Status, see @ref ald_status_t. */ ald_status_t pis_destroy(pis_handle_t *hperh) { assert_param(IS_PIS(hperh->perh)); if (hperh->check_info != hperh->perh->CH_CON[hperh->consumer_ch]) return ERROR; __LOCK(hperh); CLEAR_BIT(PIS->CH_OER, (1 << hperh->consumer_ch)); WRITE_REG(hperh->perh->CH_CON[hperh->consumer_ch], 0x0); switch (hperh->consumer_con) { case PIS_CON_0: PIS->TAR_CON0 &= ~(hperh->consumer_pos); break; case PIS_CON_1: PIS->TAR_CON1 &= ~(hperh->consumer_pos); break; default: break; } hperh->state = PIS_STATE_RESET; __UNLOCK(hperh); return OK; }
/** * @brief Stop the PIS output function. * @param hperh: Pointer to a pis_handle_t structure that contains * the configuration information for the specified PIS module. * @param ch: The PIS channel disable output * This parameter can be one of the following values: * @arg PIS_OUT_CH_0 * @arg PIS_OUT_CH_1 * @arg PIS_OUT_CH_2 * @arg PIS_OUT_CH_3 * @retval Status, see @ref ald_status_t. */ ald_status_t pis_output_stop(pis_handle_t *hperh, pis_out_ch_t ch) { assert_param(IS_PIS(hperh->perh)); assert_param(IS_PIS_OUPUT_CH(ch)); __LOCK(hperh); CLEAR_BIT(PIS->CH_OER, (1 << ch)); __UNLOCK(hperh); return OK; }
/** @brief Set the specified acmp it flags. * @param hperh: Pointer to a acmp_handle_t structure that contains * the configuration information for the specified acmp module. * @param it: specifies the it flag. * This parameter can be one of the @ref acmp_it_t. * @retval Status, see @ref ald_status_t. */ ald_status_t acmp_set_it_mask(acmp_handle_t *hperh, acmp_it_t it) { assert_param(IS_ACMP_TYPE(hperh->perh)); assert_param(IS_ACMP_IT_TYPE(it)); __LOCK(hperh); hperh->perh->IFM |= it; __UNLOCK(hperh); return OK; }
/** @brief Clear the specified ACMP it flags. * @param hperh: Pointer to a acmp_handle_t structure that contains * the configuration information for the specified ACMP module. * @param flag: specifies the it flag. * This parameter can be one of the @ref acmp_it_t. * @retval Status, see @ref ald_status_t. */ ald_status_t acmp_clear_flag_status(acmp_handle_t *hperh, acmp_flag_t flag) { assert_param(IS_ACMP_TYPE(hperh->perh)); assert_param(IS_ACMP_FLAG_TYPE(flag)); __LOCK(hperh); hperh->perh->IFC |= flag; __UNLOCK(hperh); return OK; }
/** * @brief Config the PIS modulate signal function * @param hperh: Pointer to a pis_handle_t structure that contains * the configuration information for the specified PIS module. * @param config: Pointer to a pis_modulate_config_t structure that * contains the selected target (UART0,UART1,UART2,UART3 or * LPUART0) how to modulate the target output signal. * @retval Status, see @ref ald_status_t. */ ald_status_t pis_modu_config(pis_handle_t *hperh, pis_modulate_config_t *config) { assert_param(IS_PIS(hperh->perh)); assert_param(IS_PIS_MODU_TARGET(config->target)); assert_param(IS_PIS_MODU_LEVEL(config->level)); assert_param(IS_PIS_MODU_SRC(config->src)); assert_param(IS_PIS_MODU_CHANNEL(config->channel)); __LOCK(hperh); switch (config->target) { case PIS_UART0_TX: MODIFY_REG(hperh->perh->UART0_TXMCR, PIS_TXMCR_TXMLVLS_MSK, config->level << PIS_TXMCR_TXMLVLS_POS); MODIFY_REG(hperh->perh->UART0_TXMCR, PIS_TXMCR_TXMSS_MSK, config->src << PIS_TXMCR_TXMSS_POSS); MODIFY_REG(hperh->perh->UART0_TXMCR, PIS_TXMCR_TXSIGS_MSK, config->channel << PIS_TXMCR_TXSIGS_POSS); break; case PIS_UART1_TX: MODIFY_REG(hperh->perh->UART1_TXMCR, PIS_TXMCR_TXMLVLS_MSK, config->level << PIS_TXMCR_TXMLVLS_POS); MODIFY_REG(hperh->perh->UART1_TXMCR, PIS_TXMCR_TXMSS_MSK, config->src << PIS_TXMCR_TXMSS_POSS); MODIFY_REG(hperh->perh->UART1_TXMCR, PIS_TXMCR_TXSIGS_MSK, config->channel << PIS_TXMCR_TXSIGS_POSS); break; case PIS_UART2_TX: MODIFY_REG(hperh->perh->UART2_TXMCR, PIS_TXMCR_TXMLVLS_MSK, config->level << PIS_TXMCR_TXMLVLS_POS); MODIFY_REG(hperh->perh->UART2_TXMCR, PIS_TXMCR_TXMSS_MSK, config->src << PIS_TXMCR_TXMSS_POSS); MODIFY_REG(hperh->perh->UART2_TXMCR, PIS_TXMCR_TXSIGS_MSK, config->channel << PIS_TXMCR_TXSIGS_POSS); break; case PIS_UART3_TX: MODIFY_REG(hperh->perh->UART3_TXMCR, PIS_TXMCR_TXMLVLS_MSK, config->level << PIS_TXMCR_TXMLVLS_POS); MODIFY_REG(hperh->perh->UART3_TXMCR, PIS_TXMCR_TXMSS_MSK, config->src << PIS_TXMCR_TXMSS_POSS); MODIFY_REG(hperh->perh->UART3_TXMCR, PIS_TXMCR_TXSIGS_MSK, config->channel << PIS_TXMCR_TXSIGS_POSS); break; case PIS_LPUART0_TX: MODIFY_REG(hperh->perh->LPUART0_TXMCR, PIS_TXMCR_TXMLVLS_MSK, config->level << PIS_TXMCR_TXMLVLS_POS); MODIFY_REG(hperh->perh->LPUART0_TXMCR, PIS_TXMCR_TXMSS_MSK, config->src << PIS_TXMCR_TXMSS_POSS); MODIFY_REG(hperh->perh->LPUART0_TXMCR, PIS_TXMCR_TXSIGS_MSK, config->channel << PIS_TXMCR_TXSIGS_POSS); break; default: break; } __UNLOCK(hperh); return OK; }
/** * @brief Enables or disables the specified ACMP interrupts. * @param hperh: Pointer to a acmp_handle_t structure that contains * the configuration information for the specified ACMP module. * @param it: Specifies the ACMP interrupt sources to be enabled or disabled. * This parameter can be one of the @ref acmp_it_t. * @param state: New status * - ENABLE * - DISABLE * @retval Status, see @ref ald_status_t. */ ald_status_t acmp_interrupt_config(acmp_handle_t *hperh, acmp_it_t it, type_func_t state) { assert_param(IS_ACMP_TYPE(hperh->perh)); assert_param(IS_ACMP_IT_TYPE(it)); assert_param(IS_FUNC_STATE(state)); __LOCK(hperh); if (state) hperh->perh->IES |= it; else hperh->perh->IEC |= it; __UNLOCK(hperh); return OK; }
/** * @brief This function config acmp output. * @param hperh: Pointer to a acmp_handle_t structure that contains * the configuration information for the specified ACMP module. * @param config: Pointer to a acmp_output_config_t structure that contains * the configutation information for acmp output. * @retval Status, see @ref ald_status_t. */ ald_status_t acmp_out_config(acmp_handle_t *hperh, acmp_output_config_t *config) { if (hperh == NULL) return ERROR; if (config == NULL) return ERROR; assert_param(IS_ACMP_TYPE(hperh->perh)); assert_param(IS_ACMP_INVERT_TYPE(config->gpio_inv)); assert_param(IS_ACMP_LOCATION_TYPE(config->location)); assert_param(IS_ACMP_OUT_FUNC_TYPE(config->out_func)); __LOCK(hperh); hperh->perh->PORT = config->location; hperh->perh->CON |= (config->gpio_inv << ACMP_CON_OUTINV_POS); hperh->perh->PORT = config->out_func; __UNLOCK(hperh); return OK; }
/** * @brief Initializes the TIM Output pwm according to the specified * parameters in the tim_handle_t. * @param hperh: LPTIM handle * @retval Status, see @ref ald_status_t. */ ald_status_t lptim_pwm_init(lptim_handle_t *hperh) { assert_param(IS_LPTIM(hperh->perh)); assert_param(IS_LPTIM_PRESC(hperh->init.psc)); __LOCK(hperh); hperh->state = LPTIM_STATE_BUSY; WRITE_REG(hperh->perh->UPDATE, 1); MODIFY_REG(hperh->perh->CON0, LP16T_CON0_WAVE_MSK, LPTIM_WAVE_PWM << LP16T_CON0_WAVE_POSS); MODIFY_REG(hperh->perh->CON0, LP16T_CON0_PRESC_MSK, (hperh->init.psc) << LP16T_CON0_PRESC_POSS); WRITE_REG(hperh->perh->ARR, hperh->init.arr); WRITE_REG(hperh->perh->CMP, hperh->init.cmp); WRITE_REG(hperh->perh->UPDATE, 0); while (READ_BIT(hperh->perh->SYNCSTAT, LP16T_SYNCSTAT_ARRWBSY_MSK)); while (READ_BIT(hperh->perh->SYNCSTAT, LP16T_SYNCSTAT_CMPWBSY_MSK)); hperh->state = LPTIM_STATE_READY; __UNLOCK(hperh); return OK; }
CQueue::~CQueue() { if (mpMutex) { __LOCK(mpMutex); } AM_ASSERT(mnGet == 0); AM_ASSERT(mnSendMsg == 0); if (IsSub()) { // detach from main-Q mpPrevQ->mpNextQ = mpNextQ; mpNextQ->mpPrevQ = mpPrevQ; } else { // all sub-Qs should be removed AM_ASSERT(mpPrevQ == this); AM_ASSERT(mpNextQ == this); AM_ASSERT(mpMsgResult == NULL); } mpHead->Delete(); mpFreeList->Delete(); delete[] mpReservedMemory; if (mpMutex) { __UNLOCK(mpMutex); } if (IsMain()) { AM_DELETE(mpCondSendMsg); AM_DELETE(mpCondReply); AM_DELETE(mpCondGet); AM_DELETE(mpMutex); } }
/** * @brief Create the PIS mode according to the specified parameters in * the pis_handle_t and create the associated handle. * @param hperh: Pointer to a pis_handle_t structure that contains * the configuration information for the specified PIS module. * @retval Status, see @ref ald_status_t. */ ald_status_t pis_create(pis_handle_t *hperh) { pis_divide_t temp; uint8_t clock_menu = 0; if (hperh == NULL) return ERROR; assert_param(IS_PIS_SRC(hperh->init.producer_src)); assert_param(IS_PIS_TRIG(hperh->init.consumer_trig)); assert_param(IS_PIS_CLOCK(hperh->init.producer_clk)); assert_param(IS_PIS_CLOCK(hperh->init.consumer_clk)); assert_param(IS_PIS_EDGE(hperh->init.producer_edge)); __LOCK(hperh); hperh->perh = PIS; /* get location of consumer in channel and position of con0/con1 * accord to comsumer_trig information */ temp.HalfWord = (hperh->init.consumer_trig); hperh->consumer_ch = (pis_ch_t)(temp.ch); hperh->consumer_con = (pis_con_t)(temp.con); hperh->consumer_pos = (1 << temp.shift); /* union producer clock and consumer clock */ clock_menu = (hperh->init.producer_clk << 4) | (hperh->init.consumer_clk); if (hperh->perh->CH_CON[hperh->consumer_ch] != 0) { __UNLOCK(hperh); return BUSY; } MODIFY_REG(hperh->perh->CH_CON[hperh->consumer_ch], PIS_CH0_CON_SRCS_MSK, ((hperh->init.producer_src) >> 4) << PIS_CH0_CON_SRCS_POSS); MODIFY_REG(hperh->perh->CH_CON[hperh->consumer_ch], PIS_CH0_CON_MSIGS_MSK, ((hperh->init.producer_src) & 0xf) << PIS_CH0_CON_MSIGS_POSS); /* configure sync clock, judging by producer clock with consumer clock */ switch (clock_menu) { case 0x00: case 0x11: case 0x22: case 0x33: MODIFY_REG(hperh->perh->CH_CON[hperh->consumer_ch], PIS_CH0_CON_SYNCSEL_MSK, 0 << PIS_CH0_CON_SYNCSEL_POSS); break; case 0x01: MODIFY_REG(hperh->perh->CH_CON[hperh->consumer_ch], PIS_CH0_CON_SYNCSEL_MSK, 5 << PIS_CH0_CON_SYNCSEL_POSS); break; case 0x02: case 0x12: MODIFY_REG(hperh->perh->CH_CON[hperh->consumer_ch], PIS_CH0_CON_SYNCSEL_MSK, 6 << PIS_CH0_CON_SYNCSEL_POSS); break; case 0x21: MODIFY_REG(hperh->perh->CH_CON[hperh->consumer_ch], PIS_CH0_CON_SYNCSEL_MSK, 4 << PIS_CH0_CON_SYNCSEL_POSS); break; case 0x30: MODIFY_REG(hperh->perh->CH_CON[hperh->consumer_ch], PIS_CH0_CON_SYNCSEL_MSK, 1 << PIS_CH0_CON_SYNCSEL_POSS); break; case 0x31: MODIFY_REG(hperh->perh->CH_CON[hperh->consumer_ch], PIS_CH0_CON_SYNCSEL_MSK, 2 << PIS_CH0_CON_SYNCSEL_POSS); break; case 0x32: MODIFY_REG(hperh->perh->CH_CON[hperh->consumer_ch], PIS_CH0_CON_SYNCSEL_MSK, 3 << PIS_CH0_CON_SYNCSEL_POSS); default: break; } MODIFY_REG(hperh->perh->CH_CON[hperh->consumer_ch], PIS_CH0_CON_PULCK_MSK, hperh->init.consumer_clk << PIS_CH0_CON_PULCK_POSS); MODIFY_REG(hperh->perh->CH_CON[hperh->consumer_ch], PIS_CH0_CON_EDGS_MSK, hperh->init.producer_edge << PIS_CH0_CON_EDGS_POSS); hperh->check_info = hperh->perh->CH_CON[hperh->consumer_ch]; /* enable consumer bit, switch pin of consumer */ switch (hperh->consumer_con) { case PIS_CON_0: PIS->TAR_CON0 |= hperh->consumer_pos; break; case PIS_CON_1: PIS->TAR_CON1 |= hperh->consumer_pos; break; default: break; } __UNLOCK(hperh); return OK; }
/** * @brief Initializes the ACMP mode according to the specified parameters in * the acmp_init_t and create the associated handle. * @param hperh: Pointer to a acmp_handle_t structure that contains * the configuration information for the specified ACMP module. * @retval Status, see @ref ald_status_t. */ ald_status_t acmp_init(acmp_handle_t *hperh) { uint32_t tmp = 0; if (hperh == NULL) return ERROR; if (hperh->init.vdd_level > 63) return ERROR; assert_param(IS_ACMP_TYPE(hperh->perh)); assert_param(IS_ACMP_MODE_TYPE(hperh->init.mode)); assert_param(IS_ACMP_WARM_UP_TIME_TYPE(hperh->init.warm_time)); assert_param(IS_ACMP_HYSTSEL_TYPE(hperh->init.hystsel)); assert_param(IS_ACMP_WARM_FUNC_TYPE(hperh->init.warm_func)); assert_param(IS_ACMP_POS_INPUT_TYPE(hperh->init.pos_port)); assert_param(IS_ACMP_NEG_INPUT_TYPE(hperh->init.neg_port)); assert_param(IS_ACMP_INACTVAL_TYPE(hperh->init.inactval)); assert_param(IS_ACMP_EDGE_TYPE(hperh->init.edge)); __LOCK(hperh); tmp = hperh->perh->CON; tmp |= ((hperh->init.mode << ACMP_CON_MODSEL_POSS) | (hperh->init.warm_time << ACMP_CON_WARMUPT_POSS) | (hperh->init.inactval << ACMP_CON_INACTV_POS)); hperh->perh->CON = tmp; tmp = hperh->perh->INPUTSEL; tmp |= ((hperh->init.pos_port << ACMP_INPUTSEL_PSEL_POSS) | (hperh->init.neg_port << ACMP_INPUTSEL_NSEL_POSS) | (hperh->init.vdd_level << ACMP_INPUTSEL_VDDLVL_POSS)); hperh->perh->INPUTSEL = tmp; if (hperh->init.warm_func == ACMP_WARM_DISABLE) CLEAR_BIT(hperh->perh->IES, ACMP_IES_WARMUP_MSK); else SET_BIT(hperh->perh->IES, ACMP_IES_WARMUP_MSK); switch (hperh->init.edge) { case ACMP_EDGE_NONE: CLEAR_BIT(hperh->perh->CON, ACMP_CON_FALLEN_MSK); CLEAR_BIT(hperh->perh->CON, ACMP_CON_RISEEN_MSK); break; case ACMP_EDGE_FALL: SET_BIT(hperh->perh->CON, ACMP_CON_FALLEN_MSK); CLEAR_BIT(hperh->perh->CON, ACMP_CON_RISEEN_MSK); break; case ACMP_EDGE_RISE: CLEAR_BIT(hperh->perh->CON, ACMP_CON_FALLEN_MSK); SET_BIT(hperh->perh->CON, ACMP_CON_RISEEN_MSK); break; case ACMP_EDGE_ALL: SET_BIT(hperh->perh->CON, ACMP_CON_FALLEN_MSK); SET_BIT(hperh->perh->CON, ACMP_CON_RISEEN_MSK); break; default: break; } SET_BIT(hperh->perh->CON, ACMP_CON_EN_MSK); while (READ_BIT(hperh->perh->STAT, ACMP_STAT_ACT_MSK) == 0); __UNLOCK(hperh); return OK; }