void IfxPort_resetESR(Ifx_P *port, uint8 pinIndex)
{
uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
IfxScuWdt_clearCpuEndinit(passwd);
__ldmst(&port->ESR.U, 1U << pinIndex, 0);
IfxScuWdt_setCpuEndinit(passwd);
}
void IfxPort_setPinMode(Ifx_P *port, uint8 pinIndex, IfxPort_Mode mode)
{
volatile Ifx_P_IOCR0 *iocr = &(port->IOCR0);
uint8 iocrIndex = (pinIndex / 4);
uint8 shift = (pinIndex & 0x3U) * 8;
__ldmst(&iocr[iocrIndex].U, (0xFFUL << shift), (mode << shift));
}
void Ifx_InternalMux_init(const Ifx_InternalMux_Config *cfg)
{
int i;
for (i = 0; i < cfg->size; i++)
{
Ifx_InternalMux_MuxConfig muxCfg = cfg->muxConfig[i];
/*Load modify store operation done to insert the value to the register bit field*/
__ldmst((void *)(muxCfg.regAddr), muxCfg.mask, muxCfg.value);
}
}
void IfxPort_setPinPadDriver(Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver padDriver)
{
uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
IfxScuWdt_clearCpuEndinit(passwd);
{
volatile uint32 *pdr = (volatile uint32 *)&(port->PDR0.U);
uint8 pdrIndex = (pinIndex / 8);
uint8 shift = (pinIndex & 0x7U) * 4;
__ldmst(&(pdr[pdrIndex]), (0xFUL << shift), (padDriver << shift));
}
IfxScuWdt_setCpuEndinit(passwd);
}
void IfxPort_setPinMode(Ifx_P *port, uint8 pinIndex, IfxPort_Mode mode)
{
volatile Ifx_P_IOCR0 *iocr = &(port->IOCR0);
uint8 iocrIndex = (pinIndex / 4);
uint8 shift = (pinIndex & 0x3U) * 8;
uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
if ((port == &MODULE_P40) || (port == &MODULE_P41))
{
IfxScuWdt_clearCpuEndinit(passwd);
port->PDISC.U &= ~(1 << pinIndex);
IfxScuWdt_setCpuEndinit(passwd);
}
__ldmst(&iocr[iocrIndex].U, (0xFFUL << shift), (mode << shift));
}
void IfxPort_setGroupPadDriver(Ifx_P *port, uint8 pinIndex, uint16 mask, IfxPort_PadDriver padDriver)
{
uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
IfxScuWdt_clearCpuEndinit(passwd);
{
uint32 i;
uint32 pdrVal[2];
uint32 pdrMask[2];
/* initialise */
for (i = 0; i < 2; i++)
{
pdrVal[i] = 0;
pdrMask[i] = 0;
}
/* calculate PDRx values and masks */
uint32 imask = (uint32)mask << pinIndex;
for (i = pinIndex; i < 16; i++)
{
if ((imask & (1U << i)) != 0)
{
uint32 index = i / 8;
uint32 shift = (i & 0x7U) * 4;
pdrMask[index] |= (0xFUL << shift);
pdrVal[index] |= (padDriver << shift);
}
}
/* write PDRx */
for (i = 0; i < 2; i++)
{
if (pdrMask[i] != 0)
{
__ldmst(&((&(port->PDR0.U))[i]), pdrMask[i], pdrVal[i]);
}
}
}
IfxScuWdt_setCpuEndinit(passwd);
}
void IfxPort_setGroupModeOutput(Ifx_P *port, uint8 pinIndex, uint16 mask, IfxPort_OutputMode mode, IfxPort_OutputIdx index)
{
uint32 i;
uint32 iocrVal[4];
uint32 iocrMask[4];
/* initialise */
for (i = 0; i < 4; i++)
{
iocrVal[i] = 0;
iocrMask[i] = 0;
}
/* calculate IOCRx values and masks */
uint32 imask = (uint32)mask << pinIndex;
for (i = pinIndex; i < 16; i++)
{
if ((imask & (1U << i)) != 0)
{
uint32 index = i / 4;
uint32 shift = (i & 0x3U) * 8;
iocrMask[index] |= (0x1FU << 3) << shift;
iocrVal[index] |= (mode | index) << shift;
}
}
/* write IOCRx */
for (i = 0; i < 4; i++)
{
if (iocrMask[i] != 0)
{
__ldmst(&((&(port->IOCR0.U))[i]), iocrMask[i], iocrVal[i]);
}
}
}
