uint32_t _kuart_mix_install
(
/* [IN] A string that identifies the device for fopen */
char * identifier,
/* [IN] The I/O init data void * */
KUART_INIT_STRUCT_CPTR init_data_ptr,
/* [IN] The I/O queue size to use */
uint32_t oqueue_size,
uint32_t iqueue_size
)
{ /* Body */
#if PE_LDD_VERSION
if (PE_PeripheralUsed((uint32_t)_bsp_get_serial_base_address(init_data_ptr->DEVICE)))
{
return IO_ERROR;
}
#endif
return _io_serial_mix_install(identifier,
(uint32_t (_CODE_PTR_)(void *, char *_))_kuart_mix_init,
(uint32_t (_CODE_PTR_)(void *))_kuart_mix_enable,
(uint32_t (_CODE_PTR_)(void *,void *))_kuart_mix_deinit,
(void (_CODE_PTR_)(void *, char))_kuart_mix_int_putc,
(uint32_t (_CODE_PTR_)(void *, uint32_t, void *))_kuart_polled_ioctl,
(void *)init_data_ptr, oqueue_size, iqueue_size);
} /* Endbody */
uint_32 _kuart_int_install
(
/* [IN] A string that identifies the device for fopen */
char_ptr identifier,
/* [IN] The I/O init data pointer */
KUART_INIT_STRUCT_CPTR init_data_ptr,
/* [IN] The I/O queue size to use */
uint_32 queue_size
)
{ /* Body */
#if PE_LDD_VERSION
if (PE_PeripheralUsed((uint_32)_bsp_get_serial_base_address(init_data_ptr->DEVICE)))
{
return IO_ERROR;
}
#endif
return _io_serial_int_install(identifier,
(uint_32 (_CODE_PTR_)(pointer, char _PTR_))_kuart_int_init,
(uint_32 (_CODE_PTR_)(pointer))_kuart_int_enable,
(uint_32 (_CODE_PTR_)(pointer,pointer))_kuart_int_deinit,
(void (_CODE_PTR_)(pointer, char))_kuart_int_putc,
(uint_32 (_CODE_PTR_)(pointer, uint_32, pointer))_kuart_polled_ioctl,
(pointer)init_data_ptr, queue_size);
} /* Endbody */
LPM_NOTIFICATION_RESULT _io_serial_int_clock_configuration_callback
(
/* [IN] Low power notification */
LPM_NOTIFICATION_STRUCT_PTR notification,
/* [IN/OUT] Device specific data */
pointer device_specific_data
)
{
IO_SERIAL_INT_DEVICE_STRUCT_PTR dev_ptr = device_specific_data;
KUART_INIT_STRUCT_PTR init_data = dev_ptr->DEV_INIT_DATA_PTR;
uint_8 flags;
/* Get the device registers */
UART_MemMapPtr sci_ptr = _bsp_get_serial_base_address (init_data->DEVICE);
if (NULL == sci_ptr)
{
return LPM_NOTIFICATION_RESULT_ERROR;
}
if (LPM_NOTIFICATION_TYPE_PRE == notification->NOTIFICATION_TYPE)
{
/* Lock access from the higher level */
_lwsem_wait (&(dev_ptr->LPM_INFO.LOCK));
/* Enable module clocks to be able to write registers */
_bsp_serial_io_init (init_data->DEVICE, IO_PERIPHERAL_CLOCK_ENABLE);
/* Flush output if enabled */
if (sci_ptr->C2 & UART_C2_TE_MASK)
{
while (! (sci_ptr->SFIFO & UART_SFIFO_TXEMPT_MASK))
{ };
while (! (sci_ptr->S1 & UART_S1_TC_MASK))
{ };
}
/* Turn off module */
_kuart_int_peripheral_disable (sci_ptr);
}
if (LPM_NOTIFICATION_TYPE_POST == notification->NOTIFICATION_TYPE)
{
/* Enable module clocks to be able to write registers */
_bsp_serial_io_init (init_data->DEVICE, IO_PERIPHERAL_CLOCK_ENABLE);
/* Setup same baudrate for new clock frequency */
_kuart_change_baudrate (sci_ptr, _cm_get_clock (notification->CLOCK_CONFIGURATION, init_data->CLOCK_SOURCE), init_data->BAUD_RATE);
/* Turn on module if requested */
flags = init_data->OPERATION_MODE[notification->OPERATION_MODE].FLAGS;
if ((flags & IO_PERIPHERAL_MODULE_ENABLE) && (dev_ptr->COUNT > 0))
{
_kuart_int_peripheral_enable (sci_ptr);
}
/* Disable module clocks if required */
if (flags & IO_PERIPHERAL_CLOCK_DISABLE)
{
_bsp_serial_io_init (init_data->DEVICE, IO_PERIPHERAL_CLOCK_DISABLE);
}
/* Unlock */
_lwsem_post (&(dev_ptr->LPM_INFO.LOCK));
}
return LPM_NOTIFICATION_RESULT_OK;
}
LPM_NOTIFICATION_RESULT _io_serial_int_operation_mode_callback
(
/* [IN] Low power notification */
LPM_NOTIFICATION_STRUCT_PTR notification,
/* [IN/OUT] Device specific data */
pointer device_specific_data
)
{
IO_SERIAL_INT_DEVICE_STRUCT_PTR dev_ptr = device_specific_data;
KUART_INIT_STRUCT_PTR init_data = dev_ptr->DEV_INIT_DATA_PTR;
uint_8 flags, tmp, bits;
if (LPM_NOTIFICATION_TYPE_PRE == notification->NOTIFICATION_TYPE)
{
/* Get the device registers */
UART_MemMapPtr sci_ptr = _bsp_get_serial_base_address (init_data->DEVICE);
if (NULL == sci_ptr)
{
return LPM_NOTIFICATION_RESULT_ERROR;
}
/* Lock access from the higher level */
_lwsem_wait (&(dev_ptr->LPM_INFO.LOCK));
/* Get required HW changes */
flags = init_data->OPERATION_MODE[notification->OPERATION_MODE].FLAGS;
/* Setup module clock to be able to write registers */
_bsp_serial_io_init (init_data->DEVICE, IO_PERIPHERAL_CLOCK_ENABLE);
/* Flush output if enabled */
if (sci_ptr->C2 & UART_C2_TE_MASK)
{
while (! (sci_ptr->SFIFO & UART_SFIFO_TXEMPT_MASK))
{ };
while (! (sci_ptr->S1 & UART_S1_TC_MASK))
{ };
}
/* Setup pin mux */
_bsp_serial_io_init (init_data->DEVICE, flags & (~ IO_PERIPHERAL_CLOCK_DISABLE));
/* Setup wakeup */
if (flags & IO_PERIPHERAL_WAKEUP_ENABLE)
{
bits = init_data->OPERATION_MODE[notification->OPERATION_MODE].WAKEUP_BITS;
tmp = sci_ptr->C1 & (~ (UART_C1_WAKE_MASK | UART_C1_ILT_MASK));
sci_ptr->C1 = tmp | (bits & (UART_C1_WAKE_MASK | UART_C1_ILT_MASK));
tmp = sci_ptr->C4 & (~ (UART_C4_MAEN1_MASK | UART_C4_MAEN2_MASK));
sci_ptr->C4 = tmp | (bits & (UART_C4_MAEN1_MASK | UART_C4_MAEN2_MASK));
sci_ptr->MA1 = init_data->OPERATION_MODE[notification->OPERATION_MODE].MA1;
sci_ptr->MA2 = init_data->OPERATION_MODE[notification->OPERATION_MODE].MA2;
tmp = sci_ptr->C2 & (~ (UART_C2_RWU_MASK));
sci_ptr->C2 = tmp | (bits & UART_C2_RWU_MASK);
dev_ptr->LPM_INFO.FLAGS = (flags & (IO_PERIPHERAL_WAKEUP_ENABLE | IO_PERIPHERAL_WAKEUP_SLEEPONEXIT_DISABLE));
}
else
{
sci_ptr->C2 &= (~ (UART_C2_RWU_MASK));
sci_ptr->C1 &= (~ (UART_C1_WAKE_MASK | UART_C1_ILT_MASK));
sci_ptr->C4 &= (~ (UART_C4_MAEN1_MASK | UART_C4_MAEN2_MASK));
sci_ptr->MA1 = 0;
sci_ptr->MA2 = 0;
dev_ptr->LPM_INFO.FLAGS = 0;
}
/* Enable/disable module according to operation mode */
if ((flags & IO_PERIPHERAL_MODULE_ENABLE) && (dev_ptr->COUNT > 0))
{
_kuart_int_peripheral_enable (sci_ptr);
}
else
{
_kuart_int_peripheral_disable (sci_ptr);
}
/* Disable module clocks if required */
if (flags & IO_PERIPHERAL_CLOCK_DISABLE)
{
_bsp_serial_io_init (init_data->DEVICE, IO_PERIPHERAL_CLOCK_DISABLE);
}
/* Unlock */
_lwsem_post (&(dev_ptr->LPM_INFO.LOCK));
}
return LPM_NOTIFICATION_RESULT_OK;
}
uint_32 _mcf53xx_uart_serial_polled_init
(
/* [IN] the initialization information for the device being opened */
MCF53XX_UART_SERIAL_INIT_STRUCT_PTR io_init_ptr,
/* [OUT] the address to store device specific information */
pointer _PTR_ io_info_ptr_ptr,
/* [IN] the rest of the name of the device opened */
char _PTR_ open_name_ptr
)
{ /* Body */
volatile MCF53XX_UART_STRUCT _PTR_ uart_ptr;
MCF53XX_UART_SERIAL_INFO_STRUCT _PTR_ uart_info_ptr;
uint_32 channel;
uint_32 baud;
uart_info_ptr = _mem_alloc_system_zero((uint_32)
sizeof(MCF53XX_UART_SERIAL_INFO_STRUCT));
#if MQX_CHECK_MEMORY_ALLOCATION_ERRORS
if ( uart_info_ptr == NULL ) {
return(MQX_OUT_OF_MEMORY);
}/* Endif */
#endif
_mem_set_type(uart_info_ptr,MEM_TYPE_IO_SERIAL_INFO_STRUCT);
*io_info_ptr_ptr = uart_info_ptr;
/* Save initialization values */
uart_info_ptr->INIT = *io_init_ptr;
channel = uart_info_ptr->INIT.DEVICE;
_bsp_serial_io_init (channel);
uart_ptr = _bsp_get_serial_base_address (channel);
uart_info_ptr->UART_PTR = (pointer)uart_ptr;
uart_ptr->WRITE.UCR = MCF53XX_UART_UCR_RESET_RX;
uart_ptr->WRITE.UCR = MCF53XX_UART_UCR_RESET_TX;
uart_ptr->WRITE.UCR = MCF53XX_UART_UCR_RESET_ERROR;
uart_ptr->WRITE.UCR = MCF53XX_UART_UCR_RESET_BREAK;
uart_ptr->WRITE.UCR = MCF53XX_UART_UCR_RESET_POINTER;
uart_ptr->WRITE.UMR = uart_info_ptr->INIT.UMR1_VALUE;
uart_ptr->WRITE.UMR = uart_info_ptr->INIT.UMR2_VALUE;
uart_ptr->WRITE.UCSR = MCF53XX_UART_UCSR_RX_TIMER |
MCF53XX_UART_UCSR_TX_TIMER;
uart_ptr->WRITE.UIMR = 0; /* Disable all interrupts */
/* Set up the baud rate */
/* baud = fsck / (32 * baudrate) + 0.5 */
baud = (uart_info_ptr->INIT.CLOCK_SPEED + (16 * uart_info_ptr->INIT.BAUD_RATE) ) / (32 * uart_info_ptr->INIT.BAUD_RATE);
uart_ptr->WRITE.UBG1 = (uchar)((baud >> 8) & 0xFF);
uart_ptr->WRITE.UBG2 = (uchar)(baud & 0xFF);
uart_ptr->WRITE.UCR = MCF53XX_UART_UCR_TX_ENABLE |
MCF53XX_UART_UCR_RX_ENABLE;
return( MQX_OK );
} /* Endbody */
