__s32 _read_in_page_mode_spare_wait(NFC_CMD_LIST *rcmd,void *mainbuf,void *sparebuf,__u8 dma_wait_mode)
{
__s32 i,ret;
ret = 0;
//NAND_WaitDmaFinish();//
//ret = _wait_dma_end(0, (__u32)mainbuf, 2048);
//if (ret)
// return ret;
/*wait cmd fifo free and cmd finish*/
ret = _wait_cmdfifo_free();
ret |= _wait_cmd_finish();
if (ret){
_disable_ecc();
return ret;
}
/*get user data*/
for (i = 0; i < 2048/1024; i++){
*(((__u32*) sparebuf)+i) = NFC_READ_REG(NFC_REG_USER_DATA(i));
}
/*ecc check and disable ecc*/
ret = _check_ecc(2048/1024);
_disable_ecc();
return ret;
}
__s32 _read_in_page_mode_spare(NFC_CMD_LIST *rcmd,void *mainbuf,void *sparebuf,__u8 dma_wait_mode)
{
__s32 ret,ret1;
__s32 i;
__u32 cfg;
NFC_CMD_LIST *cur_cmd,*read_addr_cmd;
__u32 read_data_cmd,random_read_cmd0,random_read_cmd1;
ret = 0;
read_addr_cmd = rcmd;
cur_cmd = rcmd;
cur_cmd = cur_cmd->next;
random_read_cmd0 = cur_cmd->value;
cur_cmd = cur_cmd->next;
random_read_cmd1 = cur_cmd->value;
cur_cmd = cur_cmd->next;
read_data_cmd = cur_cmd->value;
//access NFC internal RAM by DMA bus
NFC_WRITE_REG(NFC_REG_CTL, (NFC_READ_REG(NFC_REG_CTL)) | NFC_RAM_METHOD);
///*set dma and run*/
///*sdram*/
//if (NFC_IS_SDRAM((__u32)mainbuf))
// attr = 0x2810293;
///*sram*/
//else
// attr = 0x2800293;
_dma_config_start(0, (__u32)mainbuf, 2048);
/*wait cmd fifo free*/
ret = _wait_cmdfifo_free();
if (ret)
return ret;
/*set NFC_REG_CNT*/
NFC_WRITE_REG(NFC_REG_CNT,1024);
/*set NFC_REG_RCMD_SET*/
cfg = 0;
cfg |= (read_data_cmd & 0xff);
cfg |= ((random_read_cmd0 & 0xff) << 8);
cfg |= ((random_read_cmd1 & 0xff) << 16);
NFC_WRITE_REG(NFC_REG_RCMD_SET, cfg);
/*set NFC_REG_SECTOR_NUM*/
NFC_WRITE_REG(NFC_REG_SECTOR_NUM, 2048/1024);
/*set addr*/
_set_addr(read_addr_cmd->addr,read_addr_cmd->addr_cycle);
/*set NFC_REG_CMD*/
cfg = 0;
cfg |= read_addr_cmd->value;
/*set sequence mode*/
//cfg |= 0x1<<25;
cfg |= ( (read_addr_cmd->addr_cycle - 1) << 16);
cfg |= (NFC_SEND_ADR | NFC_DATA_TRANS | NFC_SEND_CMD1 | NFC_SEND_CMD2 | NFC_WAIT_FLAG | NFC_DATA_SWAP_METHOD);
cfg |= ((__u32)0x2 << 30);//page command
if (pagesize/1024 == 1)
cfg |= NFC_SEQ;
/*enable ecc*/
_enable_ecc(1);
NFC_WRITE_REG(NFC_REG_CMD,cfg);
NAND_WaitDmaFinish();//
/*wait cmd fifo free and cmd finish*/
ret = _wait_cmdfifo_free();
ret |= _wait_cmd_finish();
if (ret){
_disable_ecc();
return ret;
}
/*get user data*/
for (i = 0; i < 2048/1024; i++){
*(((__u32*) sparebuf)+i) = NFC_READ_REG(NFC_REG_USER_DATA(i));
}
/*ecc check and disable ecc*/
ret = _check_ecc(2048/1024);
_disable_ecc();
/*if dma mode is wait*/
if(0 == dma_wait_mode){
ret1 = _wait_dma_end();
if (ret1)
return ret1;
}
return ret;
}
__s32 _read_in_page_mode_seq(NFC_CMD_LIST *rcmd,void *mainbuf,void *sparebuf,__u8 dma_wait_mode)
{
__s32 ret,ret1;
__s32 i;
__u32 cfg;
NFC_CMD_LIST *cur_cmd,*read_addr_cmd;
__u32 read_data_cmd,random_read_cmd0,random_read_cmd1;
__u32 page_size_temp, ecc_mode_temp, page_size_set, ecc_set;
ret = 0;
read_addr_cmd = rcmd;
cur_cmd = rcmd;
cur_cmd = cur_cmd->next;
random_read_cmd0 = cur_cmd->value;
cur_cmd = cur_cmd->next;
random_read_cmd1 = cur_cmd->value;
cur_cmd = cur_cmd->next;
read_data_cmd = cur_cmd->value;
//access NFC internal RAM by DMA bus
NFC_WRITE_REG(NFC_REG_CTL, (NFC_READ_REG(NFC_REG_CTL)) | NFC_RAM_METHOD);
//set pagesize to 8K
page_size_temp = (NFC_READ_REG(NFC_REG_CTL) & 0xf00)>>8;
NFC_WRITE_REG(NFC_REG_CTL, ((NFC_READ_REG(NFC_REG_CTL)) & (~NFC_PAGE_SIZE))| (0x3<<8));
page_size_set = 8192;
_dma_config_start(0, (__u32)mainbuf, page_size_set);
/*wait cmd fifo free*/
ret = _wait_cmdfifo_free();
if (ret)
return ret;
/*set NFC_REG_CNT*/
NFC_WRITE_REG(NFC_REG_CNT,1024);
/*set NFC_REG_RCMD_SET*/
cfg = 0;
cfg |= (read_data_cmd & 0xff);
cfg |= ((random_read_cmd0 & 0xff) << 8);
cfg |= ((random_read_cmd1 & 0xff) << 16);
NFC_WRITE_REG(NFC_REG_RCMD_SET, cfg);
/*set NFC_REG_SECTOR_NUM*/
NFC_WRITE_REG(NFC_REG_SECTOR_NUM, page_size_set/1024);
/*set addr*/
_set_addr(read_addr_cmd->addr,read_addr_cmd->addr_cycle);
/*set NFC_REG_CMD*/
cfg = 0;
cfg |= read_addr_cmd->value;
/*set sequence mode*/
cfg |= 0x1<<25;
cfg |= ( (read_addr_cmd->addr_cycle - 1) << 16);
cfg |= (NFC_SEND_ADR | NFC_DATA_TRANS | NFC_SEND_CMD1 | NFC_SEND_CMD2 | NFC_WAIT_FLAG | NFC_DATA_SWAP_METHOD);
cfg |= ((__u32)0x2 << 30);//page command
/*enable ecc*/
_enable_ecc(1);
/*set ecc to specified ecc*/
ecc_mode_temp = (NFC_READ_REG(NFC_REG_ECC_CTL) & 0xf000)>>12;
if(ecc_mode_temp>=4) //change for hynix 2y nm flash
ecc_set = 0x4;
else//change for hynix 2x nm flash
ecc_set = 0x1;
NFC_WRITE_REG(NFC_REG_ECC_CTL, ((NFC_READ_REG(NFC_REG_ECC_CTL) & (~NFC_ECC_MODE))|(ecc_set<<12) ));
NFC_WRITE_REG(NFC_REG_CMD,cfg);
NAND_WaitDmaFinish();
/*wait cmd fifo free and cmd finish*/
ret = _wait_cmdfifo_free();
ret |= _wait_cmd_finish();
if (ret){
_disable_ecc();
return ret;
}
/*get user data*/
for (i = 0; i < page_size_set/1024; i++){
*(((__u32*) sparebuf)+i) = NFC_READ_REG(NFC_REG_USER_DATA(i));
}
/*ecc check and disable ecc*/
ret = _check_ecc(page_size_set/1024);
_disable_ecc();
/*if dma mode is wait*/
// if(0 == dma_wait_mode){
// ret1 = _wait_dma_end();
// if (ret1)
// return ret1;
// }
/*set ecc to original value*/
NFC_WRITE_REG(NFC_REG_ECC_CTL, (NFC_READ_REG(NFC_REG_ECC_CTL) & (~NFC_ECC_MODE))|(ecc_mode_temp<<12));
/*set pagesize to original value*/
NFC_WRITE_REG(NFC_REG_CTL, ((NFC_READ_REG(NFC_REG_CTL)) & (~NFC_PAGE_SIZE)) | (page_size_temp<<8));
return ret;
}
