static int
sysctl_cpu_capability
(__unused struct sysctl_oid *oidp, void *arg1, __unused int arg2, struct sysctl_req *req)
{
uint64_t mask = (uint64_t) (uintptr_t) arg1;
boolean_t is_capable = (_get_cpu_capabilities() & mask) != 0;
return SYSCTL_OUT(req, &is_capable, sizeof(is_capable));
}
/******************************************************************************
* Generic MIB initialisation.
*
* This is a hack, and should be replaced with SYSINITs
* at some point.
*/
void
sysctl_mib_init(void)
{
cputype = cpu_type();
cpusubtype = cpu_subtype();
cputhreadtype = cpu_threadtype();
#if defined(__i386__) || defined (__x86_64__)
cpu64bit = (_get_cpu_capabilities() & k64Bit) == k64Bit;
#else
#error Unsupported arch
#endif
/*
* Populate the optional portion of the hw.* MIB.
*
* XXX This could be broken out into parts of the code
* that actually directly relate to the functions in
* question.
*/
if (cputhreadtype != CPU_THREADTYPE_NONE) {
sysctl_register_oid(&sysctl__hw_cputhreadtype);
}
#if defined (__i386__) || defined (__x86_64__)
/* hw.cpufamily */
cpufamily = cpuid_cpufamily();
/* hw.cacheconfig */
cacheconfig[0] = ml_cpu_cache_sharing(0);
cacheconfig[1] = ml_cpu_cache_sharing(1);
cacheconfig[2] = ml_cpu_cache_sharing(2);
cacheconfig[3] = ml_cpu_cache_sharing(3);
cacheconfig[4] = 0;
/* hw.cachesize */
cachesize[0] = ml_cpu_cache_size(0);
cachesize[1] = ml_cpu_cache_size(1);
cachesize[2] = ml_cpu_cache_size(2);
cachesize[3] = ml_cpu_cache_size(3);
cachesize[4] = 0;
/* hw.packages */
packages = roundup(ml_cpu_cache_sharing(0), cpuid_info()->thread_count)
/ cpuid_info()->thread_count;
#else
#error unknown architecture
#endif /* !__i386__ && !__x86_64 && !__arm__ */
}
__private_extern__ void
_init_cpu_capabilities( void )
{
_cpu_capabilities = _get_cpu_capabilities();
}
void
_init_cpu_capabilities( void )
{
_cpu_capabilities = _get_cpu_capabilities();
}
/******************************************************************************
* Generic MIB initialisation.
*
* This is a hack, and should be replaced with SYSINITs
* at some point.
*/
void
sysctl_mib_init(void)
{
cputype = cpu_type();
cpusubtype = cpu_subtype();
cputhreadtype = cpu_threadtype();
#if defined(__i386__) || defined (__x86_64__)
cpu64bit = (_get_cpu_capabilities() & k64Bit) == k64Bit;
#elif defined(__arm__)
kprintf("sysctl_mib_init: NEED ARM DEFINES\n");
#else
#error Unsupported arch
#endif
/*
* Populate the optional portion of the hw.* MIB.
*
* XXX This could be broken out into parts of the code
* that actually directly relate to the functions in
* question.
*/
if (cputhreadtype != CPU_THREADTYPE_NONE) {
sysctl_register_oid(&sysctl__hw_cputhreadtype);
}
#if defined (__i386__) || defined (__x86_64__)
#define is_capability_set(k) (((_get_cpu_capabilities() & (k)) == (k)) ? 1 : 0)
mmx_flag = is_capability_set(kHasMMX);
sse_flag = is_capability_set(kHasSSE);
sse2_flag = is_capability_set(kHasSSE2);
sse3_flag = is_capability_set(kHasSSE3);
supplementalsse3_flag = is_capability_set(kHasSupplementalSSE3);
sse4_1_flag = is_capability_set(kHasSSE4_1);
sse4_2_flag = is_capability_set(kHasSSE4_2);
x86_64_flag = is_capability_set(k64Bit);
aes_flag = is_capability_set(kHasAES);
avx1_0_flag = is_capability_set(kHasAVX1_0);
rdrand_flag = is_capability_set(kHasRDRAND);
f16c_flag = is_capability_set(kHasF16C);
enfstrg_flag = is_capability_set(kHasENFSTRG);
/* hw.cpufamily */
cpufamily = cpuid_cpufamily();
/* hw.cacheconfig */
cacheconfig[0] = ml_cpu_cache_sharing(0);
cacheconfig[1] = ml_cpu_cache_sharing(1);
cacheconfig[2] = ml_cpu_cache_sharing(2);
cacheconfig[3] = ml_cpu_cache_sharing(3);
cacheconfig[4] = 0;
/* hw.cachesize */
cachesize[0] = ml_cpu_cache_size(0);
cachesize[1] = ml_cpu_cache_size(1);
cachesize[2] = ml_cpu_cache_size(2);
cachesize[3] = ml_cpu_cache_size(3);
cachesize[4] = 0;
/* hw.packages */
packages = roundup(ml_cpu_cache_sharing(0), cpuid_info()->thread_count)
/ cpuid_info()->thread_count;
#elif defined(__arm__)
kprintf("sysctl_mib_init: shortcircuiting to finish, reimplement\n");
#else
#error unknown architecture
#endif /* !__i386__ && !__x86_64 && !__arm__ */
}
