const char*
aarch64_insert_operand (const aarch64_operand *self,
const aarch64_opnd_info *info,
aarch64_insn *code, const aarch64_inst *inst)
{
/* Use the index as the key. */
int key = self - aarch64_operands;
switch (key)
{
case 1:
case 2:
case 3:
case 4:
case 5:
case 6:
case 7:
case 8:
case 9:
case 10:
case 13:
case 14:
case 15:
case 16:
case 18:
case 19:
case 20:
case 21:
case 22:
case 23:
case 24:
case 25:
case 26:
case 34:
case 35:
return aarch64_ins_regno (self, info, code, inst);
case 11:
return aarch64_ins_reg_extended (self, info, code, inst);
case 12:
return aarch64_ins_reg_shifted (self, info, code, inst);
case 17:
return aarch64_ins_ft (self, info, code, inst);
case 27:
case 28:
case 29:
return aarch64_ins_reglane (self, info, code, inst);
case 30:
return aarch64_ins_reglist (self, info, code, inst);
case 31:
return aarch64_ins_ldst_reglist (self, info, code, inst);
case 32:
return aarch64_ins_ldst_reglist_r (self, info, code, inst);
case 33:
return aarch64_ins_ldst_elemlist (self, info, code, inst);
case 36:
case 45:
case 46:
case 47:
case 48:
case 49:
case 50:
case 51:
case 52:
case 53:
case 54:
case 55:
case 56:
case 57:
case 65:
case 66:
case 67:
case 68:
return aarch64_ins_imm (self, info, code, inst);
case 37:
case 38:
return aarch64_ins_advsimd_imm_shift (self, info, code, inst);
case 39:
case 40:
case 41:
return aarch64_ins_advsimd_imm_modified (self, info, code, inst);
case 58:
return aarch64_ins_limm (self, info, code, inst);
case 59:
return aarch64_ins_aimm (self, info, code, inst);
case 60:
return aarch64_ins_imm_half (self, info, code, inst);
case 61:
return aarch64_ins_fbits (self, info, code, inst);
case 63:
return aarch64_ins_cond (self, info, code, inst);
case 69:
case 75:
return aarch64_ins_addr_simple (self, info, code, inst);
case 70:
return aarch64_ins_addr_regoff (self, info, code, inst);
case 71:
case 72:
case 73:
return aarch64_ins_addr_simm (self, info, code, inst);
case 74:
return aarch64_ins_addr_uimm12 (self, info, code, inst);
case 76:
return aarch64_ins_simd_addr_post (self, info, code, inst);
case 77:
return aarch64_ins_sysreg (self, info, code, inst);
case 78:
return aarch64_ins_pstatefield (self, info, code, inst);
case 79:
case 80:
case 81:
case 82:
return aarch64_ins_sysins_op (self, info, code, inst);
case 83:
case 84:
return aarch64_ins_barrier (self, info, code, inst);
case 85:
return aarch64_ins_prfop (self, info, code, inst);
default: assert (0); abort ();
}
}
const char*
aarch64_insert_operand (const aarch64_operand *self,
const aarch64_opnd_info *info,
aarch64_insn *code, const aarch64_inst *inst)
{
/* Use the index as the key. */
int key = self - aarch64_operands;
switch (key)
{
case 1:
case 2:
case 3:
case 4:
case 5:
case 6:
case 7:
case 8:
case 9:
case 10:
case 14:
case 15:
case 16:
case 17:
case 19:
case 20:
case 21:
case 22:
case 23:
case 24:
case 25:
case 26:
case 27:
case 35:
case 36:
case 139:
case 140:
case 141:
case 142:
case 143:
case 144:
case 145:
case 146:
case 147:
case 148:
case 161:
case 162:
case 163:
case 164:
case 165:
case 166:
case 167:
case 168:
case 169:
case 170:
case 173:
return aarch64_ins_regno (self, info, code, inst);
case 12:
return aarch64_ins_reg_extended (self, info, code, inst);
case 13:
return aarch64_ins_reg_shifted (self, info, code, inst);
case 18:
return aarch64_ins_ft (self, info, code, inst);
case 28:
case 29:
case 30:
return aarch64_ins_reglane (self, info, code, inst);
case 31:
return aarch64_ins_reglist (self, info, code, inst);
case 32:
return aarch64_ins_ldst_reglist (self, info, code, inst);
case 33:
return aarch64_ins_ldst_reglist_r (self, info, code, inst);
case 34:
return aarch64_ins_ldst_elemlist (self, info, code, inst);
case 37:
case 47:
case 48:
case 49:
case 50:
case 51:
case 52:
case 53:
case 54:
case 55:
case 56:
case 57:
case 58:
case 59:
case 68:
case 69:
case 70:
case 71:
case 136:
case 138:
case 153:
case 154:
case 155:
case 156:
case 157:
case 158:
case 159:
case 160:
return aarch64_ins_imm (self, info, code, inst);
case 38:
case 39:
return aarch64_ins_advsimd_imm_shift (self, info, code, inst);
case 40:
case 41:
case 42:
return aarch64_ins_advsimd_imm_modified (self, info, code, inst);
case 46:
case 129:
return aarch64_ins_fpimm (self, info, code, inst);
case 60:
case 134:
return aarch64_ins_limm (self, info, code, inst);
case 61:
return aarch64_ins_aimm (self, info, code, inst);
case 62:
return aarch64_ins_imm_half (self, info, code, inst);
case 63:
return aarch64_ins_fbits (self, info, code, inst);
case 65:
case 66:
return aarch64_ins_cond (self, info, code, inst);
case 72:
case 78:
return aarch64_ins_addr_simple (self, info, code, inst);
case 73:
return aarch64_ins_addr_regoff (self, info, code, inst);
case 74:
case 75:
case 76:
return aarch64_ins_addr_simm (self, info, code, inst);
case 77:
return aarch64_ins_addr_uimm12 (self, info, code, inst);
case 79:
return aarch64_ins_simd_addr_post (self, info, code, inst);
case 80:
return aarch64_ins_sysreg (self, info, code, inst);
case 81:
return aarch64_ins_pstatefield (self, info, code, inst);
case 82:
case 83:
case 84:
case 85:
return aarch64_ins_sysins_op (self, info, code, inst);
case 86:
case 87:
return aarch64_ins_barrier (self, info, code, inst);
case 88:
return aarch64_ins_prfop (self, info, code, inst);
case 89:
return aarch64_ins_hint (self, info, code, inst);
case 90:
case 91:
case 92:
case 93:
return aarch64_ins_sve_addr_ri_s4xvl (self, info, code, inst);
case 94:
return aarch64_ins_sve_addr_ri_s6xvl (self, info, code, inst);
case 95:
return aarch64_ins_sve_addr_ri_s9xvl (self, info, code, inst);
case 96:
case 97:
case 98:
case 99:
return aarch64_ins_sve_addr_ri_u6 (self, info, code, inst);
case 100:
case 101:
case 102:
case 103:
case 104:
case 105:
case 106:
case 107:
case 108:
case 109:
case 110:
case 111:
return aarch64_ins_sve_addr_rr_lsl (self, info, code, inst);
case 112:
case 113:
case 114:
case 115:
case 116:
case 117:
case 118:
case 119:
return aarch64_ins_sve_addr_rz_xtw (self, info, code, inst);
case 120:
case 121:
case 122:
case 123:
return aarch64_ins_sve_addr_zi_u5 (self, info, code, inst);
case 124:
return aarch64_ins_sve_addr_zz_lsl (self, info, code, inst);
case 125:
return aarch64_ins_sve_addr_zz_sxtw (self, info, code, inst);
case 126:
return aarch64_ins_sve_addr_zz_uxtw (self, info, code, inst);
case 127:
return aarch64_ins_sve_aimm (self, info, code, inst);
case 128:
return aarch64_ins_sve_asimm (self, info, code, inst);
case 130:
return aarch64_ins_sve_float_half_one (self, info, code, inst);
case 131:
return aarch64_ins_sve_float_half_two (self, info, code, inst);
case 132:
return aarch64_ins_sve_float_zero_one (self, info, code, inst);
case 133:
return aarch64_ins_inv_limm (self, info, code, inst);
case 135:
return aarch64_ins_sve_limm_mov (self, info, code, inst);
case 137:
return aarch64_ins_sve_scale (self, info, code, inst);
case 149:
case 150:
return aarch64_ins_sve_shlimm (self, info, code, inst);
case 151:
case 152:
return aarch64_ins_sve_shrimm (self, info, code, inst);
case 171:
return aarch64_ins_sve_index (self, info, code, inst);
case 172:
case 174:
return aarch64_ins_sve_reglist (self, info, code, inst);
default: assert (0); abort ();
}
}
