static int raise_ab8500_gpio26(void)
{
int ret;
/* selection */
ret = ab8500_read(AB8500_MISC, AB8500_GPIO_DIR4_REG);
if (ret < 0)
goto out;
ret |= 0x2;
ret = ab8500_write(AB8500_MISC, AB8500_GPIO_DIR4_REG, ret);
if (ret < 0)
goto out;
/* out */
ret = ab8500_read(AB8500_MISC, AB8500_GPIO_OUT4_REG);
if (ret < 0)
goto out;
ret |= 0x2;
ret = ab8500_write(AB8500_MISC, AB8500_GPIO_OUT4_REG, ret);
out:
return ret;
}
static int itp_load_ipl(block_dev_desc_t *block_dev)
{
u32 offset;
u32 size;
u32 loadaddr;
u32 returnvalue;
int ab8500_cutid;
debug("itp_load_ipl\n");
/* Check if IPL partition is present */
if (get_entry_info_toc(block_dev, ITP_TOC_IPL_NAME, &offset,
&size, &loadaddr)) {
printf("itp_load_ipl: ipl toc entry not present\n");
return 1;
}
/* Get CutID */
ab8500_cutid = ab8500_read(AB8500_MISC, AB8500_REV_REG);
returnvalue = sec_bridge_call_secure_service((u32)ISSWAPI_SECURE_LOAD,
SEC_ROM_FORCE_CLEAN_MASK,
IPL_ITEM_ID,
ab8500_cutid);
if (returnvalue != SEC_ROM_RET_OK) {
printf("itp_load_ipl: ISSWAPI_SECURE_LOAD: %d\n",
returnvalue);
return 1;
}
return 0;
}
static int do_ab8500_read(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
ulong bankaddress;
ulong offset;
int ret;
if (argc != 3) {
cmd_usage(cmdtp);
return 1;
}
/* Get bank and offset */
bankaddress = simple_strtoul(argv[1], NULL, 16);
offset = simple_strtoul(argv[2], NULL, 16);
ret = ab8500_read(bankaddress, offset);
if (ret < 0) {
printf("ab8500 read failed at address 0x%lx,0x%lx\n",
bankaddress, offset);
return 1;
}
/* Print the result */
printf("ab8500_read(0x%lx,0x%lx) = 0x%x\n", bankaddress, offset, ret);
return 0;
}
static int ab8500_regulator_get_voltage(struct regulator_dev *rdev)
{
int regulator_id, ret, val;
struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
regulator_id = rdev_get_id(rdev);
if (regulator_id >= AB8500_NUM_REGULATORS)
return -EINVAL;
ret = ab8500_read(info->ab8500, info->voltage_reg);
if (ret < 0) {
dev_err(rdev_get_dev(rdev),
"couldn't read voltage reg for regulator\n");
return ret;
}
/* vintcore has a different layout */
val = ret & info->voltage_mask;
if (regulator_id == AB8500_LDO_INTCORE)
ret = info->supported_voltages[val >> 0x3];
else
static int ab8500_regulator_is_enabled(struct regulator_dev *rdev)
{
int regulator_id, ret;
struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
regulator_id = rdev_get_id(rdev);
if (regulator_id >= AB8500_NUM_REGULATORS)
return -EINVAL;
ret = ab8500_read(info->ab8500, info->update_reg);
if (ret < 0) {
dev_err(rdev_get_dev(rdev),
"couldn't read 0x%x register\n", info->update_reg);
return ret;
}
if (ret & info->mask)
return true;
else
return false;
}
/* Control vibrator */
int do_vibrate(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
int time_ms = 100; /* 100 ms */
int intensity = 50; /* 50 % */
int reg;
/*
* We use the last specified parameters, unless new ones are
* entered.
*/
if (!(flag & CMD_FLAG_REPEAT)) {
/* Parse vibration time if given */
if (argc >= 2)
time_ms = simple_strtoul(argv[1], NULL, 10);
/* Parse vibration intensity if given */
if (argc >= 3)
intensity = simple_strtoul(argv[2], NULL, 10);
}
/* disable audio registers reset */
reg = ab8500_read(AB8500_SYS_CTRL2_BLOCK, AB8500_CTRL3_REG);
ab8500_write(AB8500_SYS_CTRL2_BLOCK, AB8500_CTRL3_REG, reg | 0x02);
/* audio clock enable */
reg = ab8500_read(AB8500_SYS_CTRL2_BLOCK, AB8500_SYSULPCLK_CTRL1_REG);
ab8500_write(AB8500_SYS_CTRL2_BLOCK,
AB8500_SYSULPCLK_CTRL1_REG, reg | 0x10);
/* enable audio supply */
ab8500_write(AB8500_REGU_CTRL1, AB8500_REGU_VAUDIO_SUPPLY_REG, 0x02);
/*
* Audio related registers - Vibrator is controled using PWM
*/
/* power up audio feature */
ab8500_write(AB8500_AUDIO, AB8500_AUDIO_POWER_UP, 0x88);
/* enable vibra class-D */
ab8500_write(AB8500_AUDIO, AB8500_AUDIO_ANA_CONF4, 0x03);
/* general vibra control */
ab8500_write(AB8500_AUDIO, AB8500_AUDIO_PWM_GEN_CONF1, 0xFF);
/*
* control register ... Set PWM intensity 0..100%
*/
ab8500_write(AB8500_AUDIO, AB8500_AUDIO_PWM_GEN_CONF2, 0);
ab8500_write(AB8500_AUDIO, AB8500_AUDIO_PWM_GEN_CONF3, intensity);
ab8500_write(AB8500_AUDIO, AB8500_AUDIO_PWM_GEN_CONF4, 0);
ab8500_write(AB8500_AUDIO, AB8500_AUDIO_PWM_GEN_CONF5, intensity);
/* Sleep for time specified */
udelay(1000 * time_ms);
/* Set PWM RMS power to zero */
ab8500_write(AB8500_AUDIO, AB8500_AUDIO_PWM_GEN_CONF3, 0);
ab8500_write(AB8500_AUDIO, AB8500_AUDIO_PWM_GEN_CONF5, 0);
/* audio clock disable */
reg = ab8500_read(AB8500_SYS_CTRL2_BLOCK, AB8500_SYSULPCLK_CTRL1_REG);
ab8500_write(AB8500_SYS_CTRL2_BLOCK,
AB8500_SYSULPCLK_CTRL1_REG, reg & ~0x10);
/* power down audio feature */
ab8500_write(AB8500_AUDIO, AB8500_AUDIO_POWER_UP, 0);
/* disable audio supply */
ab8500_write(AB8500_REGU_CTRL1, AB8500_REGU_VAUDIO_SUPPLY_REG, 0);
return 0;
}
