/// \classmethod \constructor(pin)
/// Create an ADC object associated with the given pin.
/// This allows you to then read analog values on that pin.
STATIC mp_obj_t adc_make_new(mp_obj_t type_in, uint n_args, uint n_kw, const mp_obj_t *args) {
// check number of arguments
mp_arg_check_num(n_args, n_kw, 1, 1, false);
// 1st argument is the pin name
mp_obj_t pin_obj = args[0];
uint32_t channel;
if (MP_OBJ_IS_INT(pin_obj)) {
channel = mp_obj_get_int(pin_obj);
} else {
const pin_obj_t *pin = pin_find(pin_obj);
if ((pin->adc_num & PIN_ADC1) == 0) {
// No ADC1 function on that pin
nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "pin %s does not have ADC capabilities", pin->name));
}
channel = pin->adc_channel;
}
if (!IS_ADC_CHANNEL(channel)) {
nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "not a valid ADC Channel: %d", channel));
}
if (pin_adc1[channel] == NULL) {
nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "channel %d not available on this board", channel));
}
pyb_obj_adc_t *o = m_new_obj(pyb_obj_adc_t);
memset(o, 0, sizeof(*o));
o->base.type = &pyb_adc_type;
o->pin_name = pin_obj;
o->channel = channel;
adc_init_single(o);
return o;
}
void adc_init( void ) {
/* initialize buffer pointers with 0 (not set).
buffer null pointers will be ignored in interrupt
handler, which is important as there are no
buffers registered at the time the ADC trigger
interrupt is enabled.
*/
uint8_t channel;
#ifdef USE_AD1
for(channel = 0; channel < NB_ADC1_CHANNELS; channel++)
adc1_buffers[channel] = NULL;
#endif
#ifdef USE_AD2
for(channel = 0; channel < NB_ADC2_CHANNELS; channel++)
adc2_buffers[channel] = NULL;
#endif
adc_new_data_trigger = FALSE;
adc_injected_channels[0] = ADC_InjectedChannel_1;
adc_injected_channels[1] = ADC_InjectedChannel_2;
adc_injected_channels[2] = ADC_InjectedChannel_3;
adc_injected_channels[3] = ADC_InjectedChannel_4;
// TODO: Channel selection could be configured
// using defines.
adc_channel_map[0] = ADC_Channel_8;
adc_channel_map[1] = ADC_Channel_9;
adc_channel_map[2] = ADC_Channel_13;
adc_channel_map[3] = ADC_Channel_15;
adc_init_rcc();
adc_init_irq();
// adc_init_single(ADCx, c1, c2, c3, c4)
// {{{
#ifdef USE_AD1
adc_init_single(ADC1,
#ifdef USE_AD1_1
1,
#else
0,
#endif
#ifdef USE_AD1_2
1,
#else
0,
#endif
#ifdef USE_AD1_3
1,
#else
0,
#endif
#ifdef USE_AD1_4
1
#else
0
#endif
);
#endif // USE_AD1
#ifdef USE_AD2
adc_init_single(ADC2,
#ifdef USE_AD2_1
1,
#else
0,
#endif
#ifdef USE_AD2_2
1,
#else
0,
#endif
#ifdef USE_AD2_3
1,
#else
0,
#endif
#ifdef USE_AD2_4
1
#else
0
#endif
);
#endif // USE_AD2
// }}}
}
void adc_init( void ) {
/* initialize buffer pointers with 0 (not set).
buffer null pointers will be ignored in interrupt
handler, which is important as there are no
buffers registered at the time the ADC trigger
interrupt is enabled.
*/
uint8_t channel;
#ifdef USE_AD1
for(channel = 0; channel < NB_ADC1_CHANNELS; channel++)
adc1_buffers[channel] = NULL;
adc_injected_channels[0] = &ADC_JDR1(ADC1);
adc_injected_channels[1] = &ADC_JDR2(ADC1);
adc_injected_channels[2] = &ADC_JDR3(ADC1);
adc_injected_channels[3] = &ADC_JDR4(ADC1);
#endif
#ifdef USE_AD2
for(channel = 0; channel < NB_ADC2_CHANNELS; channel++)
adc2_buffers[channel] = NULL;
adc_injected_channels[0] = &ADC_JDR1(ADC2);
adc_injected_channels[1] = &ADC_JDR2(ADC2);
adc_injected_channels[2] = &ADC_JDR3(ADC2);
adc_injected_channels[3] = &ADC_JDR4(ADC2);
#endif
adc_new_data_trigger = FALSE;
adc_channel_map[0] = BOARD_ADC_CHANNEL_1;
adc_channel_map[1] = BOARD_ADC_CHANNEL_2;
adc_channel_map[2] = BOARD_ADC_CHANNEL_3;
adc_channel_map[3] = BOARD_ADC_CHANNEL_4;
adc_init_rcc();
adc_init_irq();
// adc_init_single(ADCx, c1, c2, c3, c4)
#ifdef USE_AD1
adc_init_single(ADC1,
#ifdef USE_AD1_1
1,
#else
0,
#endif
#ifdef USE_AD1_2
1,
#else
0,
#endif
#ifdef USE_AD1_3
1,
#else
0,
#endif
#ifdef USE_AD1_4
1
#else
0
#endif
);
#endif // USE_AD1
#ifdef USE_AD2
adc_init_single(ADC2,
#ifdef USE_AD2_1
1,
#else
0,
#endif
#ifdef USE_AD2_2
1,
#else
0,
#endif
#ifdef USE_AD2_3
1,
#else
0,
#endif
#ifdef USE_AD2_4
1
#else
0
#endif
);
#endif // USE_AD2
}
void adc_init( void ) {
uint8_t x=0;
// ADC channel mapping
uint8_t adc_channel_map[4];
/* Init GPIO ports for ADC operation
*/
#if USE_ADC_1
PRINT_CONFIG_MSG("Info: Using ADC_1");
gpio_setup_pin_analog(ADC_1_GPIO_PORT, ADC_1_GPIO_PIN);
#endif
#if USE_ADC_2
PRINT_CONFIG_MSG("Info: Using ADC_2");
gpio_setup_pin_analog(ADC_2_GPIO_PORT, ADC_2_GPIO_PIN);
#endif
#if USE_ADC_3
PRINT_CONFIG_MSG("Info: Using ADC_3");
gpio_setup_pin_analog(ADC_3_GPIO_PORT, ADC_3_GPIO_PIN);
#endif
#if USE_ADC_4
PRINT_CONFIG_MSG("Info: Using ADC_4");
gpio_setup_pin_analog(ADC_4_GPIO_PORT, ADC_4_GPIO_PIN);
#endif
#if USE_ADC_5
PRINT_CONFIG_MSG("Info: Using ADC_5");
gpio_setup_pin_analog(ADC_5_GPIO_PORT, ADC_5_GPIO_PIN);
#endif
#if USE_ADC_6
PRINT_CONFIG_MSG("Info: Using ADC_6");
gpio_setup_pin_analog(ADC_6_GPIO_PORT, ADC_6_GPIO_PIN);
#endif
#if USE_ADC_7
PRINT_CONFIG_MSG("Info: Using ADC_7");
gpio_setup_pin_analog(ADC_7_GPIO_PORT, ADC_7_GPIO_PIN);
#endif
#if USE_ADC_8
PRINT_CONFIG_MSG("Info: Using ADC_8");
gpio_setup_pin_analog(ADC_8_GPIO_PORT, ADC_8_GPIO_PIN);
#endif
#if USE_ADC_9
PRINT_CONFIG_MSG("Info: Using ADC_9");
gpio_setup_pin_analog(ADC_9_GPIO_PORT, ADC_9_GPIO_PIN);
#endif
// Init clock and irq
adc_init_rcc();
adc_init_irq();
/* If fewer than 4 channels are active, say 3, then they are placed in to
* injection slots 2,3 and 4 because the stm32 architecture converts injected
* slots 2,3 and 4 and skips slot 1 instead of logicaly converting slots 1,2
* and 3 and leave slot 4.
* EXAMPLE OF ADC EXECUTION ORDER WHEN WE HAVE SAY 2 ADC INPUTS USED on ADC1
* The first board adc channel ADC1_1 is mapped to injected channel 3 and ADC1_2
* to injected channel 4 and because the conversions start from the lowest
* injection channel used, 3 in our case, injected channel 3 data will be
* located at JDR1 and 4 to JDR2 so JDR1 = ADC1_1 and JDR2 = ADC1_2.
* That's why "adc_channel_map" has this descending order.
*/
nb_adc1_channels = NB_ADC1_CHANNELS;
#if USE_AD1
#ifdef AD1_1_CHANNEL
adc_channel_map[AD1_1] = AD1_1_CHANNEL;
#endif
#ifdef AD1_2_CHANNEL
adc_channel_map[AD1_2] = AD1_2_CHANNEL;
#endif
#ifdef AD1_3_CHANNEL
adc_channel_map[AD1_3] = AD1_3_CHANNEL;
#endif
#ifdef AD1_4_CHANNEL
adc_channel_map[AD1_4] = AD1_4_CHANNEL;
#endif
// initialize buffer pointers with 0 (not set). Buffer null pointers will be ignored in interrupt
// handler, which is important as there are no buffers registered at the time the ADC trigger
// interrupt is enabled.
for (x = 0; x < 4; x++) { adc1_buffers[x] = NULL; }
adc_init_single(ADC1, nb_adc1_channels, adc_channel_map);
#endif // USE_AD1
nb_adc2_channels = NB_ADC2_CHANNELS;
#if USE_AD2
#ifdef AD2_1_CHANNEL
adc_channel_map[AD2_1] = AD2_1_CHANNEL;
#endif
#ifdef AD2_2_CHANNEL
adc_channel_map[AD2_2] = AD2_2_CHANNEL;
#endif
#ifdef AD2_3_CHANNEL
adc_channel_map[AD2_3] = AD2_3_CHANNEL;
#endif
#ifdef AD2_4_CHANNEL
adc_channel_map[AD2_4] = AD2_4_CHANNEL;
#endif
// initialize buffer pointers with 0 (not set). Buffer null pointers will be ignored in interrupt
// handler, which is important as there are no buffers registered at the time the ADC trigger
// interrupt is enabled.
for (x = 0; x < 4; x++) { adc2_buffers[x] = NULL; }
adc_init_single(ADC2, nb_adc2_channels, adc_channel_map);
#endif // USE_AD2
nb_adc3_channels = NB_ADC3_CHANNELS;
#if USE_AD3
#ifdef AD3_1_CHANNEL
adc_channel_map[AD3_1] = AD3_1_CHANNEL;
#endif
#ifdef AD3_2_CHANNEL
adc_channel_map[AD3_2] = AD3_2_CHANNEL;
#endif
#ifdef AD3_3_CHANNEL
adc_channel_map[AD3_3] = AD3_3_CHANNEL;
#endif
#ifdef AD3_4_CHANNEL
adc_channel_map[AD3_4] = AD3_4_CHANNEL;
#endif
// initialize buffer pointers with 0 (not set). Buffer null pointers will be ignored in interrupt
// handler, which is important as there are no buffers registered at the time the ADC trigger
// interrupt is enabled.
for (x = 0; x < 4; x++) { adc3_buffers[x] = NULL; }
adc_init_single(ADC3, nb_adc3_channels, adc_channel_map);
#endif // USE_AD3
adc_new_data_trigger = FALSE;
#if USE_ADC_WATCHDOG
adc_watchdog.cb = NULL;
adc_watchdog.timeStamp=0;
#endif
}
