void dump_ipmi(struct s_hardware *hardware, ZZJSON_CONFIG *config, ZZJSON **item) { if (hardware->dmi.ipmi.filled == false) { CREATE_NEW_OBJECT; add_s("dmi.warning","no IPMI structure found"); FLUSH_OBJECT; return; } char spec_ver[16]={0}; char i2c[16]={0}; char base[16]={0}; snprintf(spec_ver,sizeof(spec_ver),"%u.%u", hardware->dmi.ipmi.major_specification_version, hardware->dmi.ipmi.minor_specification_version); snprintf(i2c,sizeof(i2c),"0x%02x", hardware->dmi.ipmi.I2C_slave_address); snprintf(base,sizeof(base),"%08X%08X", (uint32_t)(hardware->dmi.ipmi.base_address >> 32), (uint32_t)((hardware->dmi.ipmi.base_address & 0xFFFF) & ~1)); CREATE_NEW_OBJECT; add_s("dmi.item","ipmi"); add_hs(dmi.ipmi.interface_type); add_s("dmi.ipmi.spec_version",spec_ver); add_hi(dmi.ipmi.I2C_slave_address); add_hi(dmi.ipmi.nv_address); add_s("dmi.ipmi.base_address",base); add_hi(dmi.ipmi.irq); FLUSH_OBJECT; }
void dump_chassis(struct s_hardware *hardware, ZZJSON_CONFIG *config, ZZJSON **item) { if (hardware->dmi.chassis.filled == false) { CREATE_NEW_OBJECT; add_s("dmi.warning","no chassis structure found"); FLUSH_OBJECT; return; } CREATE_NEW_OBJECT; add_s("dmi.item","bios"); add_hs(dmi.chassis.manufacturer); add_hs(dmi.chassis.type); add_hs(dmi.chassis.lock); add_hs(dmi.chassis.version); add_hs(dmi.chassis.serial); add_s("dmi.chassis.asset_tag",del_multi_spaces(hardware->dmi.chassis.asset_tag)); add_hs(dmi.chassis.boot_up_state); add_hs(dmi.chassis.power_supply_state); add_hs(dmi.chassis.thermal_state); add_hs(dmi.chassis.security_status); add_hs(dmi.chassis.oem_information); add_hi(dmi.chassis.height); add_hi(dmi.chassis.nb_power_cords); FLUSH_OBJECT; }
void dump_vesa(struct s_hardware *hardware, ZZJSON_CONFIG *config, ZZJSON **item) { CREATE_NEW_OBJECT; add_hb(is_vesa_valid); if (hardware->is_vesa_valid) { char buffer[64]={0}; snprintf(buffer,sizeof(buffer),"%d.%d", hardware->vesa.major_version, hardware->vesa.minor_version); add_s("vesa.version",buffer); add_hs(vesa.vendor); add_hs(vesa.product); add_hs(vesa.product_revision); add_hi(vesa.software_rev); memset(buffer,0,sizeof(buffer)); snprintf(buffer,sizeof(buffer),"%d KB",hardware->vesa.total_memory*64); add_s("vesa.memory",buffer); add_i("vesa.modes",hardware->vesa.vmi_count); FLUSH_OBJECT; for (int i = 0; i < hardware->vesa.vmi_count; i++) { struct vesa_mode_info *mi = &hardware->vesa.vmi[i].mi; if ((mi->h_res == 0) || (mi->v_res == 0)) continue; CREATE_NEW_OBJECT; memset(buffer,0,sizeof(buffer)); snprintf(buffer,sizeof(buffer),"0x%04x",hardware->vesa.vmi[i].mode + 0x200); add_s("vesa.kernel_mode",buffer); add_i("vesa.hres",mi->h_res); add_i("vesa.vres",mi->v_res); add_i("vesa.bpp",mi->bpp); FLUSH_OBJECT; } } else { FLUSH_OBJECT; } to_cpio("vesa"); }
void dump_cpu(struct s_hardware *hardware, ZZJSON_CONFIG *config, ZZJSON **item) { CREATE_NEW_OBJECT; add_hs(cpu.vendor); add_hs(cpu.model); add_hi(cpu.vendor_id); add_hi(cpu.family); add_hi(cpu.model_id); add_hi(cpu.stepping); add_hi(cpu.num_cores); add_hi(cpu.l1_data_cache_size); add_hi(cpu.l1_instruction_cache_size); add_hi(cpu.l2_cache_size); size_t i; for (i = 0; i < cpu_flags_count; i++) { char temp[128]={0}; snprintf(temp,sizeof(temp),"cpu.flags.%s",cpu_flags_names[i]); add_b(temp,get_cpu_flag_value_from_name(&hardware->cpu,cpu_flags_names[i])); } FLUSH_OBJECT; to_cpio("cpu"); }
void dump_processor(struct s_hardware *hardware, ZZJSON_CONFIG *config, ZZJSON **item) { if (hardware->dmi.processor.filled == false) { CREATE_NEW_OBJECT; add_s("dmi.warning","no processor structure found"); FLUSH_OBJECT; return; } char voltage[16]={0}; snprintf(voltage,sizeof(voltage),"%d.%02d", hardware->dmi.processor.voltage_mv / 1000, hardware->dmi.processor.voltage_mv - ((hardware->dmi.processor.voltage_mv / 1000) * 1000)); CREATE_NEW_OBJECT; add_s("dmi.item","processor"); add_hs(dmi.processor.socket_designation); add_hs(dmi.processor.type); add_hs(dmi.processor.family); add_hs(dmi.processor.manufacturer); add_hs(dmi.processor.version); add_hi(dmi.processor.external_clock); add_hi(dmi.processor.max_speed); add_hi(dmi.processor.current_speed); add_hi(dmi.processor.signature.type); add_hi(dmi.processor.signature.family); add_hi(dmi.processor.signature.model); add_hi(dmi.processor.signature.stepping); add_hi(dmi.processor.signature.minor_stepping); add_s("dmi.processor.voltage",voltage); add_hs(dmi.processor.status); add_hs(dmi.processor.upgrade); add_hs(dmi.processor.cache1); add_hs(dmi.processor.cache2); add_hs(dmi.processor.cache3); add_hs(dmi.processor.serial); add_hs(dmi.processor.part_number); add_hi(dmi.processor.core_count); add_hi(dmi.processor.core_enabled); add_hi(dmi.processor.thread_count); add_hs(dmi.processor.id); for (int i = 0; i < PROCESSOR_FLAGS_ELEMENTS; i++) { if (((bool *) (&hardware->dmi.processor.cpu_flags))[i] == true) { add_s("dmi.processor.flag",(char *)cpu_flags_strings[i]); } } FLUSH_OBJECT; }
INTERVAL addDDI(double a, double b) { INTERVAL c; c.lo = add_lo(a, b); c.hi = add_hi(a, b); return(c); }
INTERVAL addDII(double a, INTERVAL b) { INTERVAL c; c.lo = add_lo(a, b.lo); c.hi = add_hi(a, b.hi); return(c); }
INTERVAL addIDI(INTERVAL a, double b) { INTERVAL c; c.lo = add_lo(a.lo, b); c.hi = add_hi(a.hi, b); return(c); }
INTERVAL addIII(INTERVAL a, INTERVAL b) { INTERVAL c; c.lo = add_lo(a.lo,b.lo); c.hi = add_hi(a.hi,b.hi); return(c); }