C++ (Cpp) ak_get_peri_pll_clk Examples

Example #1

File: ak_camera.c Project: Lamobo/Lamobo-D1

/**
 * @brief: set sensor clock
 * 
 * @author: caolianming
 * @date: 2014-01-06
 * @param [in] cis_sclk: sensor work clock
 */
static void set_sensor_cis_sclk(unsigned int cis_sclk)
{
	unsigned long regval;
	unsigned int cis_sclk_div;
	
	unsigned int peri_pll = ak_get_peri_pll_clk()/1000000;
	
	cis_sclk_div = peri_pll/cis_sclk - 1;

	regval = REG32(CLOCK_PERI_PLL_CTRL2);
	regval &= ~(0x3f << 10);
	regval |= (cis_sclk_div << 10);
	REG32(CLOCK_PERI_PLL_CTRL2) = (1 << 19)|regval;

	isp_dbg("%s() cis_sclk=%dMHz peri_pll=%dMHz cis_sclk_div=%d\n", 
			__func__, cis_sclk, peri_pll, cis_sclk_div);
}

Example #2

File: clock.c Project: 119-org/lamobo-d1

/* initalise all the clocks */
static int __init ak39xx_init_clocks(void)
{
 	clk_default_setrate(&clk_cpu_pll, ak_get_cpu_pll_clk());
	clk_default_setrate(&clk_asic_pll, ak_get_asic_pll_clk());
	clk_default_setrate(&clk_peri_pll, ak_get_peri_pll_clk());

	clk_default_setrate(&clk_cpu, ak_get_cpu_clk());
	clk_default_setrate(&clk_ahb, ak_get_ahb_clk());
	clk_default_setrate(&clk_mem, ak_get_mem_clk());
	clk_default_setrate(&clk_vclk, ak_get_vclk());
	clk_default_setrate(&clk_asic, ak_get_asic_clk());
	
	printk("AK39 clocks: CPU %ldMHz, MEM %ldMHz, ASIC %ldMHz\n",
			clk_cpu.rate/MHz, clk_mem.rate/MHz, clk_asic.rate/MHz);
	
	/* register clocks */
	if (ak39xx_register_clock(&clk_xtal_12M) < 0)
		printk(KERN_ERR "failed to register 12M xtal\n");

	if (ak39xx_register_clock(&clk_xtal_25M) < 0)
		printk(KERN_ERR "failed to register 25M xtal\n");

	if (ak39xx_register_clock(&clk_xtal_32K) < 0)
		printk(KERN_ERR "failed to register 32K xtal\n");

	if (ak39xx_register_clock(&clk_cpu_pll) < 0)
		printk(KERN_ERR "failed to register cpu pll clk\n");

	if (ak39xx_register_clock(&clk_asic_pll) < 0)
		printk(KERN_ERR "failed to register asic pll clk\n");

	if (ak39xx_register_clock(&clk_peri_pll) < 0)
		printk(KERN_ERR "failed to register peri pll clk\n");

	if (ak39xx_register_clock(&clk_cpu) < 0)
		printk(KERN_ERR "failed to register cpu clk\n");

	if (ak39xx_register_clock(&clk_ahb) < 0)
		printk(KERN_ERR "failed to register AHB clk\n");
	
	if (ak39xx_register_clock(&clk_mem) < 0)
		printk(KERN_ERR "failed to register memory clk\n");
	
	if (ak39xx_register_clock(&clk_vclk) < 0)
		printk(KERN_ERR "failed to register vclk\n");
	
	if (ak39xx_register_clock(&clk_asic) < 0)
		printk(KERN_ERR "failed to register asic clk\n");
	
	if (ak39xx_register_clock(&clk_opclk) < 0)
		printk(KERN_ERR "failed to register opclk\n");

	ak39xx_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));

#if 0
	printk("ak39xx_init_clocks: clk gate reg=0x%p\n", REG32(CLOCK_GATE_CTRL1));
	/*
	 * Enable L2buf clock by default, Disable all other clocks.
	 * uart0 clock has been open in uncompreess.h
	 */
	int i;
	for (i = 0; i < ARRAY_SIZE(init_clocks); i++) {
		if (strcmp(init_clocks[i].name, "uart0") == 0) {
			clk_enable(&init_clocks[i]);
		}
	}
#endif

	return 0;
}