/* Reload the hardware state from a saved domain */
static int rtc_load(struct domain *d, hvm_domain_context_t *h)
{
RTCState *s = domain_vrtc(d);
if ( !has_vrtc(d) )
return -ENODEV;
spin_lock(&s->lock);
/* Restore the registers */
if ( hvm_load_entry(RTC, h, &s->hw) != 0 )
{
spin_unlock(&s->lock);
return -EINVAL;
}
/* Reset the wall-clock time. In normal running, this runs with host
* time, so let's keep doing that. */
s->current_tm = gmtime(get_localtime(d));
rtc_copy_date(s);
/* Reset the periodic interrupt timer based on the registers */
rtc_timer_update(s);
check_update_timer(s);
alarm_timer_update(s);
spin_unlock(&s->lock);
return 0;
}
static void rtc_alarm_cb(void *opaque)
{
RTCState *s = opaque;
spin_lock(&s->lock);
if (!(s->hw.cmos_data[RTC_REG_B] & RTC_SET))
{
s->hw.cmos_data[RTC_REG_C] |= RTC_AF;
rtc_update_irq(s);
alarm_timer_update(s);
}
spin_unlock(&s->lock);
}
static uint32_t rtc_ioport_read(RTCState *s, uint32_t addr)
{
int ret;
struct domain *d = vrtc_domain(s);
if ( (addr & 1) == 0 )
return 0xff;
spin_lock(&s->lock);
switch ( s->hw.cmos_index )
{
case RTC_SECONDS:
case RTC_MINUTES:
case RTC_HOURS:
case RTC_DAY_OF_WEEK:
case RTC_DAY_OF_MONTH:
case RTC_MONTH:
case RTC_YEAR:
/* if not in set mode, adjust cmos before reading*/
if (!(s->hw.cmos_data[RTC_REG_B] & RTC_SET))
{
s->current_tm = gmtime(get_localtime(d));
rtc_copy_date(s);
}
ret = s->hw.cmos_data[s->hw.cmos_index];
break;
case RTC_REG_A:
ret = s->hw.cmos_data[s->hw.cmos_index];
if ((s->use_timer == 0) && update_in_progress(s))
ret |= RTC_UIP;
break;
case RTC_REG_C:
check_for_pf_ticks(s);
ret = s->hw.cmos_data[s->hw.cmos_index];
s->hw.cmos_data[RTC_REG_C] = 0x00;
if ( ret & RTC_IRQF )
hvm_isa_irq_deassert(d, RTC_IRQ);
check_update_timer(s);
alarm_timer_update(s);
s->pt_dead_ticks = 0;
break;
default:
ret = s->hw.cmos_data[s->hw.cmos_index];
break;
}
spin_unlock(&s->lock);
return ret;
}
static void rtc_alarm_cb(void *opaque)
{
RTCState *s = opaque;
struct domain *d = vrtc_domain(s);
spin_lock(&s->lock);
if (!(s->hw.cmos_data[RTC_REG_B] & RTC_SET))
{
s->hw.cmos_data[RTC_REG_C] |= RTC_AF;
/* alarm interrupt */
if (s->hw.cmos_data[RTC_REG_B] & RTC_AIE)
{
s->hw.cmos_data[RTC_REG_C] |= RTC_IRQF;
hvm_isa_irq_deassert(d, RTC_IRQ);
hvm_isa_irq_assert(d, RTC_IRQ);
}
alarm_timer_update(s);
}
spin_unlock(&s->lock);
}
static int rtc_ioport_write(void *opaque, uint32_t addr, uint32_t data)
{
RTCState *s = opaque;
struct domain *d = vrtc_domain(s);
uint32_t orig;
spin_lock(&s->lock);
if ( (addr & 1) == 0 )
{
data &= 0x7f;
s->hw.cmos_index = data;
spin_unlock(&s->lock);
return (data < RTC_CMOS_SIZE);
}
if ( s->hw.cmos_index >= RTC_CMOS_SIZE )
{
spin_unlock(&s->lock);
return 0;
}
orig = s->hw.cmos_data[s->hw.cmos_index];
switch ( s->hw.cmos_index )
{
case RTC_SECONDS_ALARM:
case RTC_MINUTES_ALARM:
case RTC_HOURS_ALARM:
s->hw.cmos_data[s->hw.cmos_index] = data;
alarm_timer_update(s);
break;
case RTC_SECONDS:
case RTC_MINUTES:
case RTC_HOURS:
case RTC_DAY_OF_WEEK:
case RTC_DAY_OF_MONTH:
case RTC_MONTH:
case RTC_YEAR:
/* if in set mode, just write the register */
if ( (s->hw.cmos_data[RTC_REG_B] & RTC_SET) )
s->hw.cmos_data[s->hw.cmos_index] = data;
else
{
/* Fetch the current time and update just this field. */
s->current_tm = gmtime(get_localtime(d));
rtc_copy_date(s);
s->hw.cmos_data[s->hw.cmos_index] = data;
rtc_set_time(s);
}
alarm_timer_update(s);
break;
case RTC_REG_A:
/* UIP bit is read only */
s->hw.cmos_data[RTC_REG_A] = (data & ~RTC_UIP) | (orig & RTC_UIP);
if ( (data ^ orig) & ~RTC_UIP )
rtc_timer_update(s);
break;
case RTC_REG_B:
if ( data & RTC_SET )
{
/* set mode: reset UIP mode */
s->hw.cmos_data[RTC_REG_A] &= ~RTC_UIP;
/* adjust cmos before stopping */
if (!(orig & RTC_SET))
{
s->current_tm = gmtime(get_localtime(d));
rtc_copy_date(s);
}
}
else
{
/* if disabling set mode, update the time */
if ( orig & RTC_SET )
rtc_set_time(s);
}
check_for_pf_ticks(s);
s->hw.cmos_data[RTC_REG_B] = data;
/*
* If the interrupt is already set when the interrupt becomes
* enabled, raise an interrupt immediately.
*/
rtc_update_irq(s);
if ( (data ^ orig) & RTC_PIE )
{
TRACE_0D(TRC_HVM_EMUL_RTC_STOP_TIMER);
destroy_periodic_time(&s->pt);
s->period = 0;
rtc_timer_update(s);
}
if ( (data ^ orig) & RTC_SET )
check_update_timer(s);
if ( (data ^ orig) & (RTC_24H | RTC_DM_BINARY | RTC_SET) )
alarm_timer_update(s);
break;
case RTC_REG_C:
case RTC_REG_D:
/* cannot write to them */
break;
}
spin_unlock(&s->lock);
return 1;
}
static int rtc_ioport_write(void *opaque, uint32_t addr, uint32_t data)
{
RTCState *s = opaque;
struct domain *d = vrtc_domain(s);
uint32_t orig;
spin_lock(&s->lock);
if ( (addr & 1) == 0 )
{
data &= 0x7f;
s->hw.cmos_index = data;
spin_unlock(&s->lock);
return (data < RTC_CMOS_SIZE);
}
if ( s->hw.cmos_index >= RTC_CMOS_SIZE )
{
spin_unlock(&s->lock);
return 0;
}
orig = s->hw.cmos_data[s->hw.cmos_index];
switch ( s->hw.cmos_index )
{
case RTC_SECONDS_ALARM:
case RTC_MINUTES_ALARM:
case RTC_HOURS_ALARM:
s->hw.cmos_data[s->hw.cmos_index] = data;
alarm_timer_update(s);
break;
case RTC_SECONDS:
case RTC_MINUTES:
case RTC_HOURS:
case RTC_DAY_OF_WEEK:
case RTC_DAY_OF_MONTH:
case RTC_MONTH:
case RTC_YEAR:
s->hw.cmos_data[s->hw.cmos_index] = data;
/* if in set mode, do not update the time */
if ( !(s->hw.cmos_data[RTC_REG_B] & RTC_SET) )
rtc_set_time(s);
alarm_timer_update(s);
break;
case RTC_REG_A:
/* UIP bit is read only */
s->hw.cmos_data[RTC_REG_A] = (data & ~RTC_UIP) | (orig & RTC_UIP);
if ( (data ^ orig) & ~RTC_UIP )
rtc_timer_update(s);
break;
case RTC_REG_B:
if ( data & RTC_SET )
{
/* set mode: reset UIP mode */
s->hw.cmos_data[RTC_REG_A] &= ~RTC_UIP;
/* adjust cmos before stopping */
if (!(s->hw.cmos_data[RTC_REG_B] & RTC_SET))
{
s->current_tm = gmtime(get_localtime(d));
rtc_copy_date(s);
}
}
else
{
/* if disabling set mode, update the time */
if ( s->hw.cmos_data[RTC_REG_B] & RTC_SET )
rtc_set_time(s);
}
/* if the interrupt is already set when the interrupt become
* enabled, raise an interrupt immediately*/
if ((data & RTC_UIE) && !(s->hw.cmos_data[RTC_REG_B] & RTC_UIE))
if (s->hw.cmos_data[RTC_REG_C] & RTC_UF)
{
hvm_isa_irq_deassert(d, RTC_IRQ);
hvm_isa_irq_assert(d, RTC_IRQ);
}
s->hw.cmos_data[RTC_REG_B] = data;
if ( (data ^ orig) & RTC_PIE )
rtc_timer_update(s);
check_update_timer(s);
alarm_timer_update(s);
break;
case RTC_REG_C:
case RTC_REG_D:
/* cannot write to them */
break;
}
spin_unlock(&s->lock);
return 1;
}