static int tcc_i2s_hw_params(struct snd_pcm_substream *substream,
struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
{
struct snd_soc_pcm_runtime *rtd = substream->private_data;
struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
struct tcc_pcm_dma_params *dma_data;
if (substream->pcm->device == __I2S_DEV_NUM__) {
if(substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
dma_data = &tcc_i2s_pcm_stereo_out;
}
else if(substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
dma_data = &tcc_i2s_pcm_stereo_in;
}
snd_soc_dai_set_dma_data(cpu_dai, substream, dma_data);
// Set DAI clock
tcc_i2s_set_clock(params_rate(params));
}
alsa_dbg("=====================\n");
alsa_dbg("= rate : %d\n", params_rate(params));
alsa_dbg("= channels : %d\n", params_channels(params));
alsa_dbg("= period_size : %d\n", params_period_size(params));
return 0;
}
/*
* Logic for a es8388 as connected on a Sharp SL-C7x0 Device
*/
static int tcc_es8388_init(struct snd_soc_pcm_runtime *rtd)
{
int ret;
struct snd_soc_codec *codec = rtd->codec;
struct snd_soc_dapm_context *dapm = &codec->dapm;
alsa_dbg("%s() in...\n", __func__);
snd_soc_dapm_enable_pin(dapm, "MICIN");
/* Add tcc specific controls */
ret = snd_soc_add_controls(codec, es8388_tcc_controls,
ARRAY_SIZE(es8388_tcc_controls));
if (ret)
return ret;
/* Add tcc specific widgets */
snd_soc_dapm_new_controls(dapm, tcc_es8388_dapm_widgets,
ARRAY_SIZE(tcc_es8388_dapm_widgets));
/* Set up Telechips specific audio path telechips audio_map */
snd_soc_dapm_add_routes(dapm, tcc_audio_map, ARRAY_SIZE(tcc_audio_map));
snd_soc_dapm_sync(dapm);
alsa_dbg("%s() call snd_soc_jack_new()\n", __func__);
return 0;
}
static int __init tcc_init_wm8731(void)
{
int ret;
if( !(machine_is_tcc8800() || machine_is_tcc8920()) ) {
alsa_dbg("\n\n\n\n%s() do not execution....\n\n", __func__);
return 0;
}
alsa_dbg("TCC Board probe [%s]\n", __FUNCTION__);
#if defined(CONFIG_ARCH_TCC88XX)
if(machine_is_tcc8800()) {
gpio_request(TCC_GPEXT1(1), "CODEC_ON");
gpio_request(TCC_GPEXT2(0), "UN_MUTE");
gpio_direction_output(TCC_GPEXT1(1), 1); // Codec power on
gpio_direction_output(TCC_GPEXT2(0), 1); // Line ouput un-mute
tcc_soc_card.name = "TCC880x EVM";
}
#elif defined(CONFIG_ARCH_TCC892X)
if(machine_is_tcc8920()) {
gpio_request(TCC_GPEXT1(1), "CODEC_ON");
gpio_request(TCC_GPEXT2(0), "UN_MUTE");
gpio_direction_output(TCC_GPEXT1(1), 1); // Codec power on
gpio_direction_output(TCC_GPEXT2(0), 1); // Line ouput un-mute
tcc_soc_card.name = "TCC892x EVM";
}
#endif
tca_tcc_initport();
ret = wm8731_i2c_register();
tcc_snd_device = platform_device_alloc("soc-audio", -1);
if (!tcc_snd_device)
return -ENOMEM;
platform_set_drvdata(tcc_snd_device, &tcc_soc_card);
ret = platform_device_add(tcc_snd_device);
if (ret) {
printk(KERN_ERR "Unable to add platform device\n");\
platform_device_put(tcc_snd_device);
}
return ret;
}
/************************************************************************
* Local Function
************************************************************************/
static int tcc_i2s_init(void)
{
#if defined(CONFIG_ARCH_TCC892X)
volatile PADMADAI pADMA_DAI = (volatile PADMADAI)tcc_p2v(BASE_ADDR_DAI0);
alsa_dbg(" %s \n", __func__);
/* clock enable */
tcc_dai_clk = clk_get(NULL, CLK_NAME_DAI0);
if(IS_ERR(tcc_dai_clk)) return (-EINVAL);
clk_enable(tcc_dai_clk);
tcc_adma0_clk = clk_get(NULL, CLK_NAME_ADMA0);
if(IS_ERR(tcc_adma0_clk)) return (-EINVAL);
clk_enable(tcc_adma0_clk);
#else
volatile PADMADAI pADMA_DAI = (volatile PADMADAI)tcc_p2v(BASE_ADDR_DAI);
volatile PPIC pPIC = (volatile PPIC)tcc_p2v(BASE_ADDR_PIC);
alsa_dbg(" %s \n", __func__);
/* clock enable */
tcc_dai_clk = clk_get(NULL, CLK_NAME_DAI);
if(IS_ERR(tcc_dai_clk)) return (-EINVAL);
clk_enable(tcc_dai_clk);
tcc_adma_clk = clk_get(NULL, CLK_NAME_ADMA);
if(IS_ERR(tcc_adma_clk)) return (-EINVAL);
clk_enable(tcc_adma_clk);
#endif
#if defined(CONFIG_MEM_CLK_SYNC_MODE)
if (pll3_clk == NULL) {
pll3_clk = clk_get(NULL, "pll3");
if (IS_ERR(pll3_clk)) return (-EINVAL);
}
#endif
/* set DAI register */
tca_i2s_dai_init(pADMA_DAI);
BITSET(pADMA_DAI->MCCR0, Hw31 | Hw30 | Hw29 | Hw28);
tca_i2s_stop(pADMA_DAI, AMDA_RX); // ADMA Rx disable
tca_i2s_stop(pADMA_DAI, AMDA_TX); // ADMA Tx disable
return 0;
}
static int tcc_spdif_init(void)
{
alsa_dbg(" %s \n", __func__);
#if defined(CONFIG_ARCH_TCC892X)
/* clock enable */
tcc_spdif_clk = clk_get(NULL, CLK_NAME_SPDIF1);
if(IS_ERR(tcc_spdif_clk)) return (-EINVAL);
clk_enable(tcc_spdif_clk);
tcc_adma1_clk = clk_get(NULL, CLK_NAME_ADMA1);
if(IS_ERR(tcc_adma1_clk)) return (-EINVAL);
clk_enable(tcc_adma1_clk);
#else
/* clock enable */
tcc_spdif_clk = clk_get(NULL, CLK_NAME_SPDIF);
if(IS_ERR(tcc_spdif_clk)) return (-EINVAL);
clk_enable(tcc_spdif_clk);
#endif
#if defined(CONFIG_MEM_CLK_SYNC_MODE)
if (pll3_clk == NULL) {
pll3_clk = clk_get(NULL, "pll3");
if (IS_ERR(pll3_clk)) return (-EINVAL);
}
#endif
return 0;
}
/*
* FIXME: This is a temporary bodge to avoid cross-tree merge issues.
* New drivers should register the wm8731 I2C device in the machine
* setup code (under arch/arm for ARM systems).
*/
static int wm8731_i2c_register(void)
{
struct i2c_board_info info;
struct i2c_adapter *adapter;
struct i2c_client *client;
alsa_dbg("%s() \n", __func__);
memset(&info, 0, sizeof(struct i2c_board_info));
info.addr = 0x1a;
strlcpy(info.type, "wm8731", I2C_NAME_SIZE);
adapter = i2c_get_adapter(0);
if (!adapter)
{
printk(KERN_ERR "can't get i2c adapter 0\n");
return -ENODEV;
}
client = i2c_new_device(adapter, &info);
i2c_put_adapter(adapter);
if (!client)
{
printk(KERN_ERR "can't add i2c device at 0x%x\n", (unsigned int)info.addr);
return -ENODEV;
}
return 0;
}
/*
* Logic for a wm8731 as connected on a Sharp SL-C7x0 Device
*/
static int tcc_wm8731_init(struct snd_soc_pcm_runtime *rtd)
{
int ret;
struct snd_soc_codec *codec = rtd->codec;
struct snd_soc_dapm_context *dapm = &codec->dapm;
alsa_dbg("%s() \n", __func__);
#if defined(CONFIG_ARCH_TCC88XX) || defined(CONFIG_ARCH_TCC892X)
snd_soc_dapm_enable_pin(dapm, "MICIN");
#else
snd_soc_dapm_disable_pin(dapm, "LLINEIN");
snd_soc_dapm_disable_pin(dapm, "RLINEIN");
#endif
/* Add tcc specific controls */
ret = snd_soc_add_controls(codec, wm8731_tcc_controls,
ARRAY_SIZE(wm8731_tcc_controls));
if (ret)
return ret;
/* Add tcc specific widgets */
snd_soc_dapm_new_controls(dapm, wm8731_dapm_widgets,
ARRAY_SIZE(wm8731_dapm_widgets));
/* Set up Telechips specific audio path audio_map */
snd_soc_dapm_add_routes(dapm, audio_map, ARRAY_SIZE(audio_map));
snd_soc_dapm_sync(dapm);
return 0;
}
static void tcc_ext_control(struct snd_soc_codec *codec)
{
int spk = 0;
struct snd_soc_dapm_context *dapm = &codec->dapm;
alsa_dbg("%s() tcc_jack_func=%d, bias_level[%d]\n", __func__, tcc_jack_func, dapm->bias_level);
/* set up jack connection */
if(dapm->bias_level == SND_SOC_BIAS_ON) {
switch (tcc_jack_func) {
#ifdef CONFIG_COBY_MID7025
tcc_hp_hw_mute(false);
tcc_spk_hw_mute(false);
#else
case TCC_HP:
tcc_hp_hw_mute(false);
tcc_spk_hw_mute(true);
break;
case TCC_SPK:
tcc_hp_hw_mute(true);
tcc_spk_hw_mute(false);
break;
#endif
}
}
if (tcc_spk_func == TCC_SPK_ON)
{
spk = 1;
snd_soc_dapm_enable_pin(dapm, "Ext Spk");
}
/* signal a DAPM event */
snd_soc_dapm_sync(dapm);
}
static __inline void sep0611_codec_gpio_init(void)
{
alsa_dbg("%s\n", __func__);
sep0611_gpio_cfgpin(SEP0611_AUDIO_EN, SEP0611_GPIO_IO); /* GPIO */
sep0611_gpio_dirpin(SEP0611_AUDIO_EN, SEP0611_GPIO_OUT);/* output */
}
static __inline void sep0611_spk_gpio_init(void)
{
alsa_dbg("%s\n", __func__);
sep0611_gpio_cfgpin(SEP0611_SPK_CTL, SEP0611_GPIO_IO); /* GPIO */
sep0611_gpio_dirpin(SEP0611_SPK_CTL, SEP0611_GPIO_OUT); /* output */
}
static int sep0611_board_startup(struct snd_pcm_substream *substream)
{
alsa_dbg("%s\n", __func__);
sep0611_gpio_setpin(SEP0611_SPK_CTL, GPIO_HIGH); /* speaker power on */
return 0;
}
static void tcc_i2s_shutdown(struct snd_pcm_substream *substream, struct snd_soc_dai *dai)
{
alsa_dbg(" %s \n", __func__);
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
}
else {
}
}
void tcc_spdif_set_clock(unsigned int clock_rate)
{
unsigned int clk_rate;
unsigned tmpCfg, tmpStatus;
#if defined(CONFIG_ARCH_TCC892X)
volatile ADMASPDIFTX *p_adma_spdif_tx_base = (volatile ADMASPDIFTX *)tcc_p2v(BASE_ADDR_SPDIFTX1);
#else
volatile ADMASPDIFTX *p_adma_spdif_tx_base = (volatile ADMASPDIFTX *)tcc_p2v(BASE_ADDR_SPDIFTX);
#endif
#if defined(CONFIG_MEM_CLK_SYNC_MODE)
unsigned int pll3_rate;
volatile PCKC pCKC = (volatile PCKC)tcc_p2v(HwCKC_BASE);
#endif
alsa_dbg("[%s], clock_rate[%u]\n", __func__, clock_rate);
//clk_rate = ((clock_rate * 256 * 2) / 100);
clk_rate = io_ckc_get_dai_clock(clock_rate) * 2; /* set 512fs for HDMI */
#if defined(CONFIG_MEM_CLK_SYNC_MODE)
if ((pCKC->MBUSCTRL & 0x1) == 0) {
if (clock_rate == 44100)
pll3_rate = 429*1000*1000;
else if (clock_rate == 48000)
pll3_rate = 639*1000*1000;
else if (clock_rate == 32000)
pll3_rate = 213*1000*1000;
else if (clock_rate == 22000)
pll3_rate = 429*1000*1000;
else if (clock_rate == 11000)
pll3_rate = 604*1000*1000;
else
pll3_rate = 429*1000*1000;
clk_set_rate(tcc_spdif_clk, 1000000);
clk_set_rate(pll3_clk, pll3_rate);
}
#endif
clk_set_rate(tcc_spdif_clk, clk_rate);
tmpCfg = p_adma_spdif_tx_base->TxConfig;
tmpStatus = p_adma_spdif_tx_base->TxChStat;
if (clock_rate == 44100) { /* 44.1KHz */
p_adma_spdif_tx_base->TxConfig = ((tmpCfg & 0xFFFF00FF) | (2 << 8));
p_adma_spdif_tx_base->TxChStat = ((tmpStatus & 0xFFFFFF3F) | (0 << 6));
} else if (clock_rate == 48000) { /* 48KHz */
p_adma_spdif_tx_base->TxConfig = ((tmpCfg & 0xFFFF00FF) | (2 << 8));
p_adma_spdif_tx_base->TxChStat = ((tmpStatus & 0xFFFFFF3F) | (1 << 6));
} else if (clock_rate == 32000) { /* 32KHz */
p_adma_spdif_tx_base->TxConfig = ((tmpCfg & 0xFFFF00FF) | (2 << 8));
p_adma_spdif_tx_base->TxChStat = ((tmpStatus & 0xFFFFFF3F) | (2 << 6));
} else { /* Sampling Rate Converter */
p_adma_spdif_tx_base->TxConfig = ((tmpCfg & 0xFFFF00FF) | (2 << 8));
p_adma_spdif_tx_base->TxChStat = ((tmpStatus & 0xFFFFFF3F) | (3 << 6));
}
}
int tcc_spk_hw_mute(int flag)
{
alsa_dbg("%s() mute[%d]\n", __func__, flag);
if(flag)
spk_mute();
else
spk_un_mute();
}
static __inline void sep0611_codec_enable(bool enable)
{
alsa_dbg("%s\n", __func__);
if(enable)
sep0611_gpio_setpin(SEP0611_AUDIO_EN, GPIO_HIGH); /* codec power on */
else
sep0611_gpio_setpin(SEP0611_AUDIO_EN, GPIO_LOW); /* codec power off */
}
void sep0611_spk_out(bool enable)
{
alsa_dbg("%s\n", __func__);
if(enable)
sep0611_gpio_setpin(SEP0611_SPK_CTL, GPIO_HIGH); /* speaker power on */
else
sep0611_gpio_setpin(SEP0611_SPK_CTL, GPIO_LOW); /* speaker power off */
}
static int tcc_i2s_set_dai_sysclk(struct snd_soc_dai *cpu_dai,
int clk_id, unsigned int freq, int dir)
{
alsa_dbg(" %s \n", __func__);
if (clk_id != TCC_I2S_SYSCLK)
return -ENODEV;
return 0;
}
/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Function: StartI2SClock()
Description: Enables the I2S clock that drives the audio codec chip.
Returns: N/A
-------------------------------------------------------------------*/
static int tcc_i2s_startup(struct snd_pcm_substream *substream, struct snd_soc_dai *dai)
{
struct snd_soc_pcm_runtime *rtd = substream->private_data;
struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
alsa_dbg("tcc_i2s_startup() \n");
if (!cpu_dai->active) {
}
return 0;
}
static int tcc_startup(struct snd_pcm_substream *substream)
{
struct snd_soc_pcm_runtime *rtd = substream->private_data;
struct snd_soc_codec *codec = rtd->codec;
alsa_dbg("%s()\n", __func__);
/* check the jack status at stream startup */
tcc_ext_control(codec);
return 0;
}
int tcc_spdif_probe(struct snd_soc_dai *dai)
{
alsa_dbg("%s() \n", __func__);
if(tcc_spdif_init())
return -EINVAL;
// default clock of SPDIF : 44100Hz
tcc_spdif_set_clock(44100);
return 0;
}
static int tcc_hp_event(struct snd_soc_dapm_widget *w,
struct snd_kcontrol *k, int event)
{
alsa_dbg("%s() in... event[%d]\n", __func__, event);
#ifdef CONFIG_COBY_MID7025
if (SND_SOC_DAPM_PRE_PMD) {
tcc_hp_hw_mute(true);
tcc_spk_hw_mute(true);
}
#endif
return 0;
}
/************************************************************************
* export Function
************************************************************************/
void tcc_i2s_set_clock(unsigned int ClockRate)
{
unsigned int clk_rate;
#if defined(CONFIG_MEM_CLK_SYNC_MODE)
unsigned int pll3_rate;
volatile PCKC pCKC = (volatile PCKC)tcc_p2v(HwCKC_BASE);
#endif
if(tcc_dai_clk == NULL)
return ;
clk_rate = io_ckc_get_dai_clock(ClockRate);
#if defined(CONFIG_MEM_CLK_SYNC_MODE)
if ((pCKC->MBUSCTRL & 0x1) == 0) {
if (ClockRate == 32000)
pll3_rate = 370*1000*1000;
else if (ClockRate == 44100)
pll3_rate = 336*1000*1000;
else if (ClockRate == 48000)
pll3_rate = 486*1000*1000;
else if (ClockRate == 88000)
pll3_rate = 400*1000*1000;
else if (ClockRate == 96000)
pll3_rate = 370*1000*1000;
else if (ClockRate == 192000)
pll3_rate = 508*1000*1000;
else
pll3_rate = 336*1000*1000;
if (tcc_spdif_clk)
clk_set_rate(tcc_spdif_clk, 1000000);
clk_set_rate(pll3_clk, pll3_rate);
}
#endif
#if defined(CONFIG_MEM_CLK_SYNC_MODE)
clk_set_rate(tcc_dai_clk, 0);
#endif
clk_set_rate(tcc_dai_clk, clk_rate);
alsa_dbg("tcc_i2s_set_clock() rate[%d] clk_rate[%d]\n", ClockRate, clk_rate);
#if defined(CONFIG_ARCH_TCC93XX)
if(tcc_spdif_clk)
{
clk_rate = io_ckc_get_dai_clock(ClockRate) * 2; /* set 512fs for HDMI */
clk_set_rate(tcc_spdif_clk, clk_rate);
}
#endif
}
static int tcc_set_jack(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
alsa_dbg("%s() tcc_jack_func=%d, ucontrol->value.integer.value[0]=%d\n", __func__, tcc_jack_func, ucontrol->value.integer.value[0]);
if (tcc_jack_func == ucontrol->value.integer.value[0])
return 0;
tcc_jack_func = ucontrol->value.integer.value[0];
tcc_ext_control(codec);
return 1;
}
static int tcc_hw_params(struct snd_pcm_substream *substream, struct snd_pcm_hw_params *params)
{
struct snd_soc_pcm_runtime *rtd = substream->private_data;
struct snd_soc_dai *codec_dai = rtd->codec_dai;
struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
unsigned int clk = 0;
int ret = 0;
alsa_dbg("%s()\n", __func__);
switch (params_rate(params)) {
case 8000:
case 16000:
case 48000:
case 96000:
clk = 12288000;
break;
case 11025:
case 22050:
case 32000:
case 44100:
clk = 11289600;
break;
}
/* set codec DAI configuration */
ret = snd_soc_dai_set_fmt(codec_dai, SND_SOC_DAIFMT_I2S |
SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_CBS_CFS);
if (ret < 0)
return ret;
/* set cpu DAI configuration */
ret = snd_soc_dai_set_fmt(cpu_dai, SND_SOC_DAIFMT_I2S |
SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_CBS_CFS);
if (ret < 0)
return ret;
/* set the codec system clock for DAC and ADC */
ret = snd_soc_dai_set_sysclk(codec_dai, ES8388_SYSCLK, clk,
SND_SOC_CLOCK_IN);
if (ret < 0)
return ret;
/* set the I2S system clock as input (unused) */
ret = snd_soc_dai_set_sysclk(cpu_dai, 0, 0, SND_SOC_CLOCK_IN);
if (ret < 0)
return ret;
return 0;
}
static int sep0611_board_suspend_post(struct platform_device *pdev, pm_message_t state)
{
alsa_dbg("%s\n", __func__);
#ifdef SEP0611_AUDIO_EN
sep0611_codec_enable(false);
#endif
#ifdef SEP0611_SPK_CTL
sep0611_spk_out(false);
#endif
return 0;
}
static int sep0611_board_resume_pre(struct platform_device *pdev)
{
alsa_dbg("%s\n", __func__);
#ifdef SEP0611_AUDIO_EN
sep0611_codec_gpio_init();
sep0611_codec_enable(true);
#endif
#ifdef SEP0611_SPK_CTL
sep0611_spk_gpio_init();
sep0611_spk_out(true);
#endif
return 0;
}
static int tcc_spdif_hw_params(struct snd_pcm_substream *substream,
struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
{
struct snd_soc_pcm_runtime *rtd = substream->private_data;
struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
alsa_dbg(" %s \n", __func__);
if (substream->pcm->device == __SPDIF_DEV_NUM__) {
cpu_dai->playback_dma_data = &tcc_i2s_pcm_spdif_out;
// Set SPDIF clock
tcc_spdif_set_clock(params_rate(params));
}
return 0;
}
static int tcc_i2s_resume(struct snd_soc_dai *dai)
{
#if defined(CONFIG_ARCH_TCC892X)
volatile PADMADAI pADMA_DAI = (volatile PADMADAI)tcc_p2v(BASE_ADDR_DAI0);
volatile PADMASPDIFTX pADMA_SPDIFTX = (volatile PADMASPDIFTX)tcc_p2v(BASE_ADDR_SPDIFTX1);
#else
volatile PADMADAI pADMA_DAI = (volatile PADMADAI)tcc_p2v(BASE_ADDR_DAI);
volatile PADMASPDIFTX pADMA_SPDIFTX = (volatile PADMASPDIFTX)tcc_p2v(BASE_ADDR_SPDIFTX);
#endif
alsa_dbg(" %s \n", __func__);
if(dai->id == 0) { // DAI
if(tcc_dai_clk)
clk_enable(tcc_dai_clk);
#if defined(CONFIG_ARCH_TCC892X)
if(tcc_adma0_clk)
clk_enable(tcc_adma0_clk);
#else
if(tcc_adma_clk)
clk_enable(tcc_adma_clk);
#endif
pADMA_DAI->DAMR = gADMA_DAI.DAMR;
pADMA_DAI->DAVC = gADMA_DAI.DAVC;
pADMA_DAI->MCCR0 = gADMA_DAI.MCCR0;
pADMA_DAI->MCCR1 = gADMA_DAI.MCCR1;
}
else { // SPDIFTX
if(tcc_spdif_clk)
clk_enable(tcc_spdif_clk);
#if defined(CONFIG_ARCH_TCC892X)
if(tcc_adma1_clk)
clk_enable(tcc_adma1_clk);
#endif
pADMA_SPDIFTX->TxConfig = gADMA_SPDIFTX.TxConfig;
pADMA_SPDIFTX->TxChStat = gADMA_SPDIFTX.TxChStat;
pADMA_SPDIFTX->TxIntMask = gADMA_SPDIFTX.TxIntMask;
// pADMA_SPDIFTX->TxIntStat = gADMA_SPDIFTX.TxIntStat;
pADMA_SPDIFTX->DMACFG = gADMA_SPDIFTX.DMACFG;
}
return 0;
}
static int tcc_i2s_suspend(struct snd_soc_dai *dai)
{
#if defined(CONFIG_ARCH_TCC892X)
volatile PADMADAI pADMA_DAI = (volatile PADMADAI)tcc_p2v(BASE_ADDR_DAI0);
volatile PADMASPDIFTX pADMA_SPDIFTX = (volatile PADMASPDIFTX)tcc_p2v(BASE_ADDR_SPDIFTX0);
#else
volatile PADMADAI pADMA_DAI = (volatile PADMADAI)tcc_p2v(BASE_ADDR_DAI);
volatile PADMASPDIFTX pADMA_SPDIFTX = (volatile PADMASPDIFTX)tcc_p2v(BASE_ADDR_SPDIFTX);
#endif
alsa_dbg(" %s \n", __func__);
if(dai->id == 0) { // DAI
gADMA_DAI.DAMR = pADMA_DAI->DAMR;
gADMA_DAI.DAVC = pADMA_DAI->DAVC;
gADMA_DAI.MCCR0 = pADMA_DAI->MCCR0;
gADMA_DAI.MCCR1 = pADMA_DAI->MCCR1;
if(tcc_dai_clk)
clk_disable(tcc_dai_clk);
#if defined(CONFIG_ARCH_TCC892X)
if(tcc_adma0_clk)
clk_disable(tcc_adma0_clk);
#else
if(tcc_adma_clk)
clk_disable(tcc_adma_clk);
#endif
}
else { // SPDIFTX
gADMA_SPDIFTX.TxConfig = pADMA_SPDIFTX->TxConfig;
gADMA_SPDIFTX.TxChStat = pADMA_SPDIFTX->TxChStat;
gADMA_SPDIFTX.TxIntMask = pADMA_SPDIFTX->TxIntMask;
// gADMA_SPDIFTX.TxIntStat = pADMA_SPDIFTX->TxIntStat;
gADMA_SPDIFTX.DMACFG = pADMA_SPDIFTX->DMACFG;
if(tcc_spdif_clk)
clk_disable(tcc_spdif_clk);
#if defined(CONFIG_ARCH_TCC892X)
if(tcc_adma1_clk)
clk_disable(tcc_adma1_clk);
#endif
}
return 0;
}
int tcc_i2s_probe(struct snd_soc_dai *dai)
{
alsa_dbg("== alsa-debug == %s() \n", __func__);
if(tcc_i2s_init())
return -EINVAL;
// default clock of DAI : 44100Hz
tcc_i2s_set_clock(44100);
#ifdef CONFIG_HAS_EARLYSUSPEND
early_suspend.suspend = tcc_i2s_early_suspend;
early_suspend.resume = tcc_i2s_late_resume;
early_suspend.level = EARLY_SUSPEND_LEVEL_BLANK_SCREEN;
//register_early_suspend(&early_suspend);
#endif
return 0;
}