sw_error_t hsl_phy_api_ops_unregister(hsl_phy_ops_t * phy_api_ops)
{
aos_mem_set(&global_phy_api_ops[0], 0, sizeof(hsl_phy_ops_t));
return SW_OK;
}
sw_error_t phy_api_ops_init(a_uint32_t dev_id)
{
if (SW_MAX_NR_DEV <= dev_id)
return SW_BAD_PARAM;
aos_mem_set(&global_phy_api_ops[dev_id], 0, sizeof(hsl_phy_ops_t));
return SW_OK;
}
static int
cmd_socket_init()
{
sw_error_t rv;
garuda_init_spec_cfg chip_spec_cfg;
aos_mem_set(&chip_spec_cfg, 0 ,sizeof(garuda_init_spec_cfg));
init_cfg.cpu_mode = HSL_CPU_1;
init_cfg.reg_mode = HSL_MDIO;
#if defined UK_MINOR_DEV
init_cfg.nl_prot = UK_MINOR_DEV;
#else
init_cfg.nl_prot = 30;
#endif
init_cfg.chip_type=CHIP_UNSPECIFIED;
init_cfg.reg_func.mdio_set = NULL;
init_cfg.reg_func.mdio_get = NULL;
init_cfg.chip_spec_cfg = &chip_spec_cfg;
rv = ssdk_init(0, &init_cfg);
if (SW_OK == rv)
{
dprintf("\n SSDK Init OK!");
}
else
{
dprintf("\n SSDK Init Fail! RV[%d]", rv);
}
if (flag == 0)
{
aos_mem_set(&ssdk_cfg, 0 ,sizeof(ssdk_cfg_t));
rv = sw_uk_exec(SW_API_SSDK_CFG, 0, &ssdk_cfg);
flag = 1;
}
return (int)rv;
}
sw_error_t
hsl_dev_init(a_uint32_t dev_id, ssdk_init_cfg *cfg)
{
sw_error_t rv = SW_OK;
if (SW_MAX_NR_DEV <= dev_id)
{
return SW_BAD_PARAM;
}
aos_mem_set(&dev_table[dev_id], 0, sizeof (hsl_dev_t));
SW_RTN_ON_ERROR(sd_init(dev_id,cfg));
#ifdef UK_IF
SW_RTN_ON_ERROR(sw_uk_init(cfg->nl_prot));
#endif
#if defined API_LOCK
SW_RTN_ON_ERROR(hsl_api_lock_init());
#endif
rv = SW_INIT_ERROR;
switch (cfg->chip_type)
{
case CHIP_ATHENA:
#if defined ATHENA
rv = athena_init(dev_id, cfg);
#endif
break;
case CHIP_GARUDA:
#if defined GARUDA
rv = garuda_init(dev_id, cfg);
#endif
break;
case CHIP_SHIVA:
#if defined SHIVA
rv = shiva_init(dev_id, cfg);
#endif
break;
case CHIP_HORUS:
#if defined HORUS
rv = horus_init(dev_id, cfg);
#endif
break;
case CHIP_ISIS:
#if defined ISIS
rv = isis_init(dev_id, cfg);
#endif
break;
case CHIP_ISISC:
#if defined ISISC
rv = isis_init(dev_id, cfg);
#endif
break;
case CHIP_UNSPECIFIED:
#if defined ATHENA
rv = athena_init(dev_id, cfg);
#elif defined GARUDA
rv = garuda_init(dev_id, cfg);
#elif defined SHIVA
rv = shiva_init(dev_id, cfg);
#elif defined HORUS
rv = horus_init(dev_id, cfg);
#elif defined ISIS
rv = isis_init(dev_id, cfg);
#elif defined ISISC
rv = isis_init(dev_id, cfg);
#endif
break;
default:
return SW_BAD_PARAM;
}
SW_RTN_ON_ERROR(rv);
if (NULL == dev_ssdk_cfg[dev_id])
{
dev_ssdk_cfg[dev_id] = aos_mem_alloc(sizeof (ssdk_init_cfg));
}
if (NULL == dev_ssdk_cfg[dev_id])
{
return SW_OUT_OF_MEM;
}
aos_mem_copy(dev_ssdk_cfg[dev_id], cfg, sizeof (ssdk_init_cfg));
#if defined UK_MINOR_DEV
dev_ssdk_cfg[dev_id]->nl_prot = UK_MINOR_DEV;
#endif
return rv;
}
sw_error_t
hsl_ssdk_cfg(a_uint32_t dev_id, ssdk_cfg_t *ssdk_cfg)
{
aos_mem_set(&(ssdk_cfg->init_cfg), 0, sizeof(ssdk_init_cfg));
aos_mem_copy(&(ssdk_cfg->init_cfg), dev_ssdk_cfg[dev_id], sizeof(ssdk_init_cfg));
#ifdef VERSION
aos_mem_copy(ssdk_cfg->build_ver, VERSION, sizeof(VERSION));
#endif
#ifdef BUILD_DATE
aos_mem_copy(ssdk_cfg->build_date, BUILD_DATE, sizeof(BUILD_DATE));
#endif
switch (dev_ssdk_cfg[dev_id]->chip_type)
{
case CHIP_ATHENA:
aos_mem_copy(ssdk_cfg->chip_type, "athena", sizeof("athena"));
break;
case CHIP_GARUDA:
aos_mem_copy(ssdk_cfg->chip_type, "garuda", sizeof("garuda"));
break;
case CHIP_SHIVA:
aos_mem_copy(ssdk_cfg->chip_type, "shiva", sizeof("shiva"));
break;
case CHIP_HORUS:
aos_mem_copy(ssdk_cfg->chip_type, "horus", sizeof("horus"));
break;
case CHIP_ISIS:
aos_mem_copy(ssdk_cfg->chip_type, "isis", sizeof("isis"));
break;
case CHIP_ISISC:
aos_mem_copy(ssdk_cfg->chip_type, "isisc", sizeof("isisc"));
break;
case CHIP_UNSPECIFIED:
#if defined ATHENA
aos_mem_copy(ssdk_cfg->chip_type, "athena", sizeof("athena"));
#elif defined GARUDA
aos_mem_copy(ssdk_cfg->chip_type, "garuda", sizeof("garuda"));
#elif defined SHIVA
aos_mem_copy(ssdk_cfg->chip_type, "shiva", sizeof("shiva"));
#elif defined HORUS
aos_mem_copy(ssdk_cfg->chip_type, "horus", sizeof("horus"));
#elif defined ISIS
aos_mem_copy(ssdk_cfg->chip_type, "isis", sizeof("isis"));
#elif defined ISISC
aos_mem_copy(ssdk_cfg->chip_type, "isisc", sizeof("isisc"));
#endif
break;
default:
return SW_BAD_PARAM;
}
#ifdef CPU
aos_mem_copy(ssdk_cfg->cpu_type, CPU, sizeof(CPU));
#endif
#ifdef OS
aos_mem_copy(ssdk_cfg->os_info, OS, sizeof(OS));
#if defined KVER26
aos_mem_copy(ssdk_cfg->os_info+sizeof(OS)-1, " version 2.6", sizeof(" version 2.6"));
#elif defined KVER24
aos_mem_copy(ssdk_cfg->os_info+sizeof(OS)-1, " version 2.4", sizeof(" version 2.4"));
#else
aos_mem_copy(ssdk_cfg->os_info+sizeof(OS)-1, " version unknown", sizeof(" version unknown"));
#endif
#endif
#ifdef HSL_STANDALONG
ssdk_cfg->fal_mod = A_FALSE;
#else
ssdk_cfg->fal_mod = A_TRUE;
#endif
#ifdef USER_MODE
ssdk_cfg->kernel_mode = A_FALSE;
#else
ssdk_cfg->kernel_mode = A_TRUE;
#endif
#ifdef UK_IF
ssdk_cfg->uk_if = A_TRUE;
#else
ssdk_cfg->uk_if = A_FALSE;
#endif
#ifdef IN_ACL
ssdk_cfg->features.in_acl = A_TRUE;
#endif
#ifdef IN_FDB
ssdk_cfg->features.in_fdb = A_TRUE;
#endif
#ifdef IN_IGMP
ssdk_cfg->features.in_igmp = A_TRUE;
#endif
#ifdef IN_LEAKY
ssdk_cfg->features.in_leaky = A_TRUE;
#endif
#ifdef IN_LED
ssdk_cfg->features.in_led = A_TRUE;
#endif
#ifdef IN_MIB
ssdk_cfg->features.in_mib = A_TRUE;
#endif
#ifdef IN_MIRROR
ssdk_cfg->features.in_mirror = A_TRUE;
#endif
#ifdef IN_MISC
ssdk_cfg->features.in_misc = A_TRUE;
#endif
#ifdef IN_PORTCONTROL
ssdk_cfg->features.in_portcontrol = A_TRUE;
#endif
#ifdef IN_PORTVLAN
ssdk_cfg->features.in_portvlan = A_TRUE;
#endif
#ifdef IN_QOS
ssdk_cfg->features.in_qos = A_TRUE;
#endif
#ifdef IN_RATE
ssdk_cfg->features.in_rate = A_TRUE;
#endif
#ifdef IN_STP
ssdk_cfg->features.in_stp = A_TRUE;
#endif
#ifdef IN_VLAN
ssdk_cfg->features.in_vlan = A_TRUE;
#endif
#ifdef IN_REDUCED_ACL
ssdk_cfg->features.in_reduced_acl = A_TRUE;
#endif
#ifdef IN_IP
ssdk_cfg->features.in_ip = A_TRUE;
#endif
#ifdef IN_NAT
ssdk_cfg->features.in_nat = A_TRUE;
#endif
#ifdef IN_COSMAP
ssdk_cfg->features.in_cosmap = A_TRUE;
#endif
#ifdef IN_SEC
ssdk_cfg->features.in_sec = A_TRUE;
#endif
#ifdef IN_TRUNK
ssdk_cfg->features.in_trunk = A_TRUE;
#endif
#ifdef IN_NAT_HELPER
ssdk_cfg->features.in_nathelper= A_TRUE;
#endif
#ifdef IN_INTERFACECONTROL
ssdk_cfg->features.in_interfacectrl= A_TRUE;
#endif
return SW_OK;
}
sw_error_t
hsl_dev_reduced_init(a_uint32_t dev_id, hsl_init_mode cpu_mode, hsl_access_mode reg_mode)
{
sw_error_t rv = SW_OK;
if (SW_MAX_NR_DEV <= dev_id)
{
return SW_BAD_PARAM;
}
aos_mem_set(&dev_table[dev_id], 0, sizeof (hsl_dev_t));
#if defined API_LOCK
SW_RTN_ON_ERROR(hsl_api_lock_init());
#endif
#if defined ATHENA
{
ssdk_init_cfg cfg = def_init_cfg;
cfg.reg_mode = reg_mode;
cfg.cpu_mode = cpu_mode;
rv = athena_init(dev_id, &cfg);
}
#elif defined GARUDA
switch (cpu_mode)
{
case HSL_NO_CPU:
{
ssdk_init_cfg cfg = def_init_cfg_nocpu;
garuda_init_spec_cfg garuda_init_cfg = def_init_spec_cfg_nocpu;
cfg.chip_spec_cfg = &garuda_init_cfg;
cfg.reg_mode = reg_mode;
rv = garuda_init(dev_id, &cfg);
break;
}
case HSL_CPU_2:
{
ssdk_init_cfg cfg = def_init_cfg_cpu2;
garuda_init_spec_cfg garuda_init_cfg = def_init_spec_cfg_cpu2;
cfg.chip_spec_cfg = &garuda_init_cfg;
cfg.reg_mode = reg_mode;
rv = garuda_init(dev_id, &cfg);
break;
}
case HSL_CPU_1:
{
ssdk_init_cfg cfg = def_init_cfg_cpu1;
garuda_init_spec_cfg garuda_init_cfg = def_init_spec_cfg_cpu1;
cfg.chip_spec_cfg = &garuda_init_cfg;
cfg.reg_mode = reg_mode;
rv = garuda_init(dev_id, &cfg);
break;
}
case HSL_CPU_1_PLUS:
{
ssdk_init_cfg cfg = def_init_cfg_cpu1plus;
garuda_init_spec_cfg garuda_init_cfg = def_init_spec_cfg_cpu1plus;
cfg.chip_spec_cfg = &garuda_init_cfg;
cfg.reg_mode = reg_mode;
rv = garuda_init(dev_id, &cfg);
break;
}
default:
return SW_BAD_PARAM;
}
#elif defined SHIVA
ssdk_init_cfg cfg = def_init_cfg;
cfg.reg_mode = reg_mode;
cfg.cpu_mode = cpu_mode;
rv = shiva_init(dev_id, &cfg);
#endif
return rv;
}
sw_error_t
sw_uk_if(a_uint32_t arg_val[SW_MAX_API_PARAM])
{
struct sockaddr_nl src_addr;
struct sockaddr_nl dest_addr;
struct msghdr msg;
struct iovec iov;
struct nlmsghdr *nlh;
ssdk_sock_t * sock;
a_int32_t sock_fd;
a_uint32_t curr_pid;
sw_error_t rv = SW_OK;
curr_pid = getpid();
SOCK_LOCKER_LOCK;
sock = ssdk_sock_find(curr_pid);
if (!sock) {
sock = ssdk_sock_alloc(curr_pid);
if (!sock) {
SW_OUT_ON_ERROR(SW_NO_RESOURCE);
}
sock_fd = socket(PF_NETLINK, SOCK_RAW, ssdk_sock_prot);
aos_mem_set(&src_addr, 0, sizeof(src_addr));
src_addr.nl_family = AF_NETLINK;
src_addr.nl_pid = curr_pid;
src_addr.nl_groups = 0;
bind(sock_fd, (struct sockaddr*)&src_addr, sizeof(src_addr));
sock->ssdk_sock_fd = sock_fd;
sock->ssdk_sock_pid = curr_pid;
} else {
sock_fd = sock->ssdk_sock_fd;
}
aos_mem_set(&dest_addr, 0, sizeof(dest_addr));
dest_addr.nl_family = AF_NETLINK;
dest_addr.nl_pid = 0;
dest_addr.nl_groups = 0;
nlh = nl_hdr;
aos_mem_set(nlh, 0, NLMSG_SPACE(SW_MAX_PAYLOAD));
nlh->nlmsg_len = NLMSG_SPACE(SW_MAX_PAYLOAD);
nlh->nlmsg_pid = curr_pid;
nlh->nlmsg_flags = 0;
aos_mem_copy(NLMSG_DATA(nlh), arg_val, SW_MAX_PAYLOAD);
iov.iov_base = (void *)nlh;
iov.iov_len = nlh->nlmsg_len;
aos_mem_set(&msg, 0, sizeof(msg));
msg.msg_name = (void *)&dest_addr;
msg.msg_namelen = sizeof(dest_addr);
msg.msg_iov = &iov;
msg.msg_iovlen = 1;
if (sendmsg(sock_fd, &msg, 0) <= 0) {
SW_OUT_ON_ERROR(SW_FAIL);
}
aos_mem_set(nlh, 0, NLMSG_SPACE(SW_MAX_PAYLOAD));
if (recvmsg(sock_fd, &msg, 0) <= 0) {
SW_OUT_ON_ERROR(SW_FAIL);
}
out:
SOCK_LOCKER_UNLOCK;
return rv;
}
