void hal_arch_init(int step) { switch (step) { case HAL_ARCH_INIT_PHASE_EARLY: x86_serial_init(); early_cpu_init(); hal_irq_early_init(); arch_init_irq(); arch_trap_init(); time_init(); printk("\n%s->%s->%d.",__FILE__,__FUNCTION__,__LINE__); break; case HAL_ARCH_INIT_PHASE_MIDDLE: { unsigned long fb; int w, h, bpp; extern void x86_bootloader_get_video_info(unsigned long *fb, int *w, int *h, int *bpp); /* X86 has fb */ x86_bootloader_get_video_info(&fb, &w, &h, &bpp); hal_fb_register_simple(fb, w, h, bpp, 1); } break; case HAL_ARCH_INIT_PHASE_LATE: /* start smp and run cpu_init on each cpu */ cpu_init(); //x86_prepare_smp(); break; } }
void __init init_IRQ(void) { int i; #ifdef CONFIG_KGDB if (kgdb_early_setup) return; #endif for (i = 0; i < NR_IRQS; i++) set_irq_noprobe(i); arch_init_irq(); #ifdef CONFIG_KGDB if (!kgdb_early_setup) kgdb_early_setup = 1; #endif }
void hal_arch_init(int step) { switch(step) { case HAL_ARCH_INIT_PHASE_EARLY: //plat_setup_serial(); // video_init_screen(); // plat_setup_ioport(); /* Init the boot cpu, the secondary cpu should also probe it self when started */ cpu_probe(); arch_trap_init(); mips_setup_traps(); break; case HAL_ARCH_INIT_PHASE_MIDDLE: arch_init_irq(); arch_init_smp(); break; case HAL_ARCH_INIT_PHASE_LATE: smp_boot_aps(); break; } }