void sm_pm_cpu_suspend_save(struct sm_pm_ctx *ctx, uint32_t sp) { struct thread_core_local *p = thread_get_core_local(); p->sm_pm_ctx_phys = virt_to_phys((void *)ctx); /* The content will be passed to sm_pm_cpu_do_resume as register sp */ ctx->sp = sp; ctx->cpu_resume_addr = virt_to_phys((void *)(vaddr_t)sm_pm_cpu_do_resume); sm_pm_cpu_do_suspend(ctx->suspend_regs); dcache_op_level1(DCACHE_OP_CLEAN_INV); #ifdef CFG_PL310 arm_cl2_cleanbyway(core_mmu_get_va(PL310_BASE, MEM_AREA_IO_SEC)); #endif }
unsigned int cache_maintenance_l2(int op, paddr_t pa, size_t len) { unsigned int ret = TEE_SUCCESS; uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_IRQ); tee_l2cc_mutex_lock(); switch (op) { case L2CACHE_INVALIDATE: arm_cl2_invbyway(pl310_base()); break; case L2CACHE_AREA_INVALIDATE: if (len) arm_cl2_invbypa(pl310_base(), pa, pa + len - 1); break; case L2CACHE_CLEAN: arm_cl2_cleanbyway(pl310_base()); break; case L2CACHE_AREA_CLEAN: if (len) arm_cl2_cleanbypa(pl310_base(), pa, pa + len - 1); break; case L2CACHE_CLEAN_INV: arm_cl2_cleaninvbyway(pl310_base()); break; case L2CACHE_AREA_CLEAN_INV: if (len) arm_cl2_cleaninvbypa(pl310_base(), pa, pa + len - 1); break; default: ret = TEE_ERROR_NOT_IMPLEMENTED; } tee_l2cc_mutex_unlock(); thread_set_exceptions(exceptions); return ret; }