/*
* Set up static device mappings. Not strictly necessary -- simplebus will
* dynamically establish mappings as needed -- but doing it this way gets us
* nice efficient 1MB section mappings.
*/
int
initarm_devmap_init(void)
{
arm_devmap_add_entry(ZYNQ7_PSIO_HWBASE, ZYNQ7_PSIO_SIZE);
arm_devmap_add_entry(ZYNQ7_PSCTL_HWBASE, ZYNQ7_PSCTL_SIZE);
return (0);
}
/*
* Set up static device mappings.
*/
static int
virt_devmap_init(platform_t plat)
{
arm_devmap_add_entry(0x09000000, 0x100000); /* Uart */
return (0);
}
/*
* Set up static device mappings.
*
*/
static int
tegra124_devmap_init(platform_t plat)
{
arm_devmap_add_entry(0x70000000, 0x01000000);
return (0);
}
/*
* Construct pmap_devmap[] with DT-derived config data.
*/
int
platform_devmap_init(void)
{
alpine_get_devmap_base(&al_devmap_pa, &al_devmap_size);
arm_devmap_add_entry(al_devmap_pa, al_devmap_size);
return (0);
}
/*
* Set up static device mappings.
*
* This covers all the on-chip device with 1MB section mappings, which is good
* for performance (uses fewer TLB entries for device access).
*
* XXX It also covers a block of SRAM and some GPU (mali400) stuff that maybe
* shouldn't be device-mapped. The original code mapped a 4MB block, but
* perhaps a 1MB block would be more appropriate.
*/
int
initarm_devmap_init(void)
{
arm_devmap_add_entry(0x01C00000, 0x00400000); /* 4MB */
return (0);
}
/*
* Set up static device mappings.
*
* This covers all the on-chip device with 1MB section mappings, which is good
* for performance (uses fewer TLB entries for device access).
*
* XXX It also covers a block of SRAM and some GPU (mali400) stuff that maybe
* shouldn't be device-mapped. The original code mapped a 4MB block, but
* perhaps a 1MB block would be more appropriate.
*/
static int
allwinner_devmap_init(platform_t plat)
{
arm_devmap_add_entry(0x01C00000, 0x00400000); /* 4MB */
return (0);
}
int
initarm_devmap_init(void)
{
arm_devmap_add_entry(0x40000000, 0x100000);
return (0);
}
int
platform_devmap_init(void)
{
/* UART */
arm_devmap_add_entry(0x12C00000, 0x100000);
return (0);
}
/*
* Construct static devmap entries to map out the most frequently used
* peripherals using 1mb section mappings.
*/
int
initarm_devmap_init(void)
{
#if defined(SOC_OMAP4)
arm_devmap_add_entry(0x48000000, 0x01000000); /*16mb L4_PER devices */
arm_devmap_add_entry(0x4A000000, 0x01000000); /*16mb L4_CFG devices */
#elif defined(SOC_TI_AM335X)
arm_devmap_add_entry(0x44C00000, 0x00400000); /* 4mb L4_WKUP devices*/
arm_devmap_add_entry(0x47400000, 0x00100000); /* 1mb USB */
arm_devmap_add_entry(0x47800000, 0x00100000); /* 1mb mmchs2 */
arm_devmap_add_entry(0x48000000, 0x01000000); /*16mb L4_PER devices */
arm_devmap_add_entry(0x49000000, 0x00100000); /* 1mb edma3 */
arm_devmap_add_entry(0x49800000, 0x00300000); /* 3mb edma3 */
arm_devmap_add_entry(0x4A000000, 0x01000000); /*16mb L4_FAST devices*/
#else
#error "Unknown SoC"
#endif
return (0);
}
