/**
* \brief Test alarm interrupt and wakeup functions in calendar/counter mode.
*
* \param test Current test case.
*/
static void run_alarm_test(const struct test_case *test)
{
uint32_t ast_alarm, ast_counter;
struct ast_calendar calendar;
struct ast_config ast_conf;
/* Enable the AST. */
ast_enable(AST);
/* Set alarm 0 to interrupt after 1 second in calendar mode. */
calendar.FIELD.sec = 0;
calendar.FIELD.min = 15;
calendar.FIELD.hour = 12;
calendar.FIELD.day = 20;
calendar.FIELD.month = 9;
calendar.FIELD.year = 12;
ast_conf.mode = AST_CALENDAR_MODE;
ast_conf.osc_type = AST_OSC_32KHZ;
ast_conf.psel = AST_PSEL_32KHZ_1HZ;
ast_conf.calendar = calendar;
ast_set_config(AST, &ast_conf);
/* Set callback for alarm0. */
ast_clear_interrupt_flag(AST, AST_INTERRUPT_ALARM);
ast_write_alarm0_value(AST, calendar.field + 1);
ast_set_callback(AST, AST_INTERRUPT_ALARM, ast_alarm_callback,
AST_ALARM_IRQn, 1);
flag = 0;
delay_ms(1500);
test_assert_true(test, flag == 2, "Alarm interrupt not work!");
/* Set alarm 0 to wakeup after 1 second in counter mode. */
ast_conf.mode = AST_COUNTER_MODE;
ast_conf.osc_type = AST_OSC_32KHZ;
ast_conf.psel = AST_PSEL_32KHZ_1HZ - 2;
ast_conf.counter = 0;
ast_set_config(AST, &ast_conf);
/* ast_init_counter Set Alarm to current time+4 quarter second. */
ast_counter = ast_read_counter_value(AST);
ast_alarm = ast_counter + 4;
ast_write_alarm0_value(AST, ast_alarm);
ast_enable_interrupt(AST, AST_INTERRUPT_ALARM);
ast_enable_wakeup(AST, AST_WAKEUP_ALARM);
/* AST can wakeup the device. */
bpm_enable_wakeup_source(BPM, (1 << BPM_BKUPWEN_AST));
flag = 0;
/* Go into WAIT mode. */
bpm_sleep(BPM, BPM_SM_WAIT);
delay_ms(1000);
test_assert_true(test, flag == 2, "Alarm wakeup not work!");
/* Disable the AST. */
ast_disable(AST);
}
/* The tick interrupt handler. This is always the same other than the part that
clears the interrupt, which is specific to the clock being used to generate the
tick. */
void AST_ALARM_Handler(void)
{
/* Protect incrementing the tick with an interrupt safe critical section. */
( void ) portSET_INTERRUPT_MASK_FROM_ISR();
{
if( xTaskIncrementTick() != pdFALSE )
{
portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
}
/* Just completely clear the interrupt mask on exit by passing 0 because
it is known that this interrupt will only ever execute with the lowest
possible interrupt priority. */
}
portCLEAR_INTERRUPT_MASK_FROM_ISR( 0 );
/* The CPU woke because of a tick. */
ulTickFlag = pdTRUE;
/* If this is the first tick since exiting tickless mode then the AST needs
to be reconfigured to generate interrupts at the defined tick frequency. */
ast_write_alarm0_value( AST, ulAlarmValueForOneTick );
/* Ensure the interrupt is clear before exiting. */
ast_clear_interrupt_flag( AST, AST_INTERRUPT_ALARM );
}
/**
* \brief main function : do init and loop.
*/
int main(void)
{
uint32_t ast_alarm, ast_counter;
uint8_t key;
/* Initialize the SAM system. */
sysclk_init();
board_init();
/* Initialize the console uart. */
configure_console();
/* Output example information. */
printf("-- AST Example 2 in counter mode --\r\n");
printf("-- %s\n\r", BOARD_NAME);
printf("-- Compiled: %s %s --\n\r", __DATE__, __TIME__);
printf("Config AST with 32 KHz oscillator.\r\n");
printf("Use alarm0 to wakeup from low power mode.\r\n");
config_ast();
/* AST and EIC can wakeup the device. */
config_wakeup();
while (1) {
/* let the user select the low power mode. */
key = 0;
while ((key < 0x31) || (key > 0x37)) {
/* Display menu */
display_menu();
scanf("%c", (char *)&key);
}
key = key - '0';
/* ast_init_counter Set Alarm to current time+6 seconds. */
ast_counter = ast_read_counter_value(AST);
ast_alarm = ast_counter + 6;
ast_write_alarm0_value(AST, ast_alarm);
ast_enable_interrupt(AST, AST_INTERRUPT_ALARM);
/* Go into selected low power mode. */
bpm_sleep(BPM, key);
while (flag == false);
flag = true;
/* After wake up, clear the Alarm0. */
ast_clear_interrupt_flag(AST, AST_INTERRUPT_ALARM);
/* Output the counter value. */
ast_counter = ast_read_counter_value(AST);
printf("\n\r Counter value: %02u \n\r", ast_counter);
}
}
/* Override the default definition of vPortSetupTimerInterrupt() that is weakly
defined in the FreeRTOS Cortex-M3 port layer with a version that configures the
asynchronous timer (AST) to generate the tick interrupt. */
void vPortSetupTimerInterrupt( void )
{
struct ast_config ast_conf;
/* Ensure the AST can bring the CPU out of sleep mode. */
sleepmgr_lock_mode( SLEEPMGR_RET );
/* Ensure the 32KHz oscillator is enabled. */
if( osc_is_ready( OSC_ID_OSC32 ) == pdFALSE )
{
osc_enable( OSC_ID_OSC32 );
osc_wait_ready( OSC_ID_OSC32 );
}
/* Enable the AST itself. */
ast_enable( AST );
ast_conf.mode = AST_COUNTER_MODE; /* Simple up counter. */
ast_conf.osc_type = AST_OSC_32KHZ;
ast_conf.psel = 0; /* No prescale so the actual frequency is 32KHz/2. */
ast_conf.counter = 0;
ast_set_config( AST, &ast_conf );
/* The AST alarm interrupt is used as the tick interrupt. Ensure the alarm
status starts clear. */
ast_clear_interrupt_flag( AST, AST_INTERRUPT_ALARM );
/* Enable wakeup from alarm 0 in the AST and power manager. */
ast_enable_wakeup( AST, AST_WAKEUP_ALARM );
bpm_enable_wakeup_source( BPM, ( 1 << BPM_BKUPWEN_AST ) );
/* Tick interrupt MUST execute at the lowest interrupt priority. */
NVIC_SetPriority( AST_ALARM_IRQn, configLIBRARY_LOWEST_INTERRUPT_PRIORITY);
ast_enable_interrupt( AST, AST_INTERRUPT_ALARM );
NVIC_ClearPendingIRQ( AST_ALARM_IRQn );
NVIC_EnableIRQ( AST_ALARM_IRQn );
/* Automatically clear the counter on interrupt. */
ast_enable_counter_clear_on_alarm( AST, portAST_ALARM_CHANNEL );
/* Start with the tick active and generating a tick with regular period. */
ast_write_alarm0_value( AST, ulAlarmValueForOneTick );
ast_write_counter_value( AST, 0 );
/* See the comments where xMaximumPossibleSuppressedTicks is declared. */
xMaximumPossibleSuppressedTicks = ULONG_MAX / ulAlarmValueForOneTick;
}
/* Override the default definition of vPortSuppressTicksAndSleep() that is weakly
defined in the FreeRTOS Cortex-M3 port layer with a version that manages the
asynchronous timer (AST), as the tick is generated from the low power AST and
not the SysTick as would normally be the case on a Cortex-M. */
void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
{
uint32_t ulAlarmValue, ulCompleteTickPeriods, ulInterruptStatus;
eSleepModeStatus eSleepAction;
TickType_t xModifiableIdleTime;
enum sleepmgr_mode xSleepMode;
/* THIS FUNCTION IS CALLED WITH THE SCHEDULER SUSPENDED. */
/* Make sure the AST reload value does not overflow the counter. */
if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
{
xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
}
/* Calculate the reload value required to wait xExpectedIdleTime tick
periods. */
ulAlarmValue = ulAlarmValueForOneTick * xExpectedIdleTime;
if( ulAlarmValue > ulStoppedTimerCompensation )
{
/* Compensate for the fact that the AST is going to be stopped
momentarily. */
ulAlarmValue -= ulStoppedTimerCompensation;
}
/* Stop the AST momentarily. The time the AST is stopped for is accounted
for as best it can be, but using the tickless mode will inevitably result in
some tiny drift of the time maintained by the kernel with respect to
calendar time. */
prvDisableAST();
/* Enter a critical section but don't use the taskENTER_CRITICAL() method as
that will mask interrupts that should exit sleep mode. */
ulInterruptStatus = cpu_irq_save();
/* The tick flag is set to false before sleeping. If it is true when sleep
mode is exited then sleep mode was probably exited because the tick was
suppressed for the entire xExpectedIdleTime period. */
ulTickFlag = pdFALSE;
/* If a context switch is pending then abandon the low power entry as
the context switch might have been pended by an external interrupt that
requires processing. */
eSleepAction = eTaskConfirmSleepModeStatus();
if( eSleepAction == eAbortSleep )
{
/* Restart tick. */
prvEnableAST();
/* Re-enable interrupts - see comments above the cpsid instruction()
above. */
cpu_irq_restore( ulInterruptStatus );
}
else
{
/* Adjust the alarm value to take into account that the current time
slice is already partially complete. */
ulAlarmValue -= ast_read_counter_value( AST );
ast_write_alarm0_value( AST, ulAlarmValue );
/* Restart the AST. */
prvEnableAST();
/* Allow the application to define some pre-sleep processing. */
xModifiableIdleTime = xExpectedIdleTime;
configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
/* xExpectedIdleTime being set to 0 by configPRE_SLEEP_PROCESSING()
means the application defined code has already executed the WAIT
instruction. */
if( xModifiableIdleTime > 0 )
{
/* Find the deepest allowable sleep mode. */
xSleepMode = sleepmgr_get_sleep_mode();
if( xSleepMode != SLEEPMGR_ACTIVE )
{
/* Sleep until something happens. */
bpm_sleep( BPM, xSleepMode );
}
}
/* Allow the application to define some post sleep processing. */
configPOST_SLEEP_PROCESSING( xModifiableIdleTime );
/* Stop AST. Again, the time the SysTick is stopped for is accounted
for as best it can be, but using the tickless mode will inevitably
result in some tiny drift of the time maintained by the kernel with
respect to calendar time. */
prvDisableAST();
/* Re-enable interrupts - see comments above the cpsid instruction()
above. */
cpu_irq_restore( ulInterruptStatus );
if( ulTickFlag != pdFALSE )
{
/* The tick interrupt has already executed, although because this
function is called with the scheduler suspended the actual tick
processing will not occur until after this function has exited.
Reset the alarm value with whatever remains of this tick period. */
ulAlarmValue = ulAlarmValueForOneTick - ast_read_counter_value( AST );
ast_write_alarm0_value( AST, ulAlarmValue );
/* The tick interrupt handler will already have pended the tick
processing in the kernel. As the pending tick will be processed as
soon as this function exits, the tick value maintained by the tick
is stepped forward by one less than the time spent sleeping. The
actual stepping of the tick appears later in this function. */
ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
}
else
{
/* Something other than the tick interrupt ended the sleep. How
many complete tick periods passed while the processor was
sleeping? */
ulCompleteTickPeriods = ast_read_counter_value( AST ) / ulAlarmValueForOneTick;
/* The alarm value is set to whatever fraction of a single tick
period remains. */
ulAlarmValue = ast_read_counter_value( AST ) - ( ulCompleteTickPeriods * ulAlarmValueForOneTick );
if( ulAlarmValue == 0 )
{
/* There is no fraction remaining. */
ulAlarmValue = ulAlarmValueForOneTick;
ulCompleteTickPeriods++;
}
ast_write_counter_value( AST, 0 );
ast_write_alarm0_value( AST, ulAlarmValue );
}
/* Restart the AST so it runs up to the alarm value. The alarm value
will get set to the value required to generate exactly one tick period
the next time the AST interrupt executes. */
prvEnableAST();
/* Wind the tick forward by the number of tick periods that the CPU
remained in a low power state. */
vTaskStepTick( ulCompleteTickPeriods );
}
}
