static void atiixp_bmdma_stop(struct ata_queued_cmd *qc) { struct ata_port *ap = qc->ap; struct pci_dev *pdev = to_pci_dev(ap->host->dev); int dn = (2 * ap->port_no) + qc->dev->devno; u16 tmp16; pci_read_config_word(pdev, ATIIXP_IDE_UDMA_CONTROL, &tmp16); tmp16 &= ~(1 << dn); pci_write_config_word(pdev, ATIIXP_IDE_UDMA_CONTROL, tmp16); ata_bmdma_stop(qc); }
static void sl82c105_bmdma_stop(struct ata_queued_cmd *qc) { struct ata_port *ap = qc->ap; ata_bmdma_stop(qc); sl82c105_reset_engine(ap); udelay(100); /* This will redo the initial setup of the DMA device to matching PIO timings */ sl82c105_set_piomode(ap, qc->dev); }
static void cmd648_bmdma_stop(struct ata_queued_cmd *qc) { struct ata_port *ap = qc->ap; struct pci_dev *pdev = to_pci_dev(ap->host->dev); u8 dma_intr; int dma_mask = ap->port_no ? ARTTIM23_INTR_CH1 : CFR_INTR_CH0; int dma_reg = ap->port_no ? ARTTIM23 : CFR; ata_bmdma_stop(qc); pci_read_config_byte(pdev, dma_reg, &dma_intr); pci_write_config_byte(pdev, dma_reg, dma_intr | dma_mask); }
static void cmd646r1_bmdma_stop(struct ata_queued_cmd *qc) { ata_bmdma_stop(qc); }
static void triflex_bmdma_stop(struct ata_queued_cmd *qc) { ata_bmdma_stop(qc); triflex_load_timing(qc->ap, qc->dev, qc->dev->pio_mode); }
static void ns87415_bmdma_stop(struct ata_queued_cmd *qc) { ata_bmdma_stop(qc); ns87415_set_mode(qc->ap, qc->dev, qc->dev->pio_mode); }