static void __init ew_dorin_setup(void)
{
u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
static u8 mac[6];
ath79_register_m25p80(NULL);
ath79_register_usb();
if (ar93xx_wmac_read_mac_address(mac)) {
ath79_register_wmac(NULL, NULL);
} else {
ath79_register_wmac(art + DORIN_CALDATA_OFFSET,
art + DORIN_WMAC_MAC_OFFSET);
memcpy(mac, art + DORIN_WMAC_MAC_OFFSET, sizeof(mac));
}
mac[3] |= 0x40;
ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0);
ath79_register_mdio(0, 0x0);
/* LAN ports */
ath79_register_eth(1);
ath79_register_leds_gpio(-1, ARRAY_SIZE(dorin_leds_gpio),
dorin_leds_gpio);
ath79_register_gpio_keys_polled(-1, DORIN_KEYS_POLL_INTERVAL,
ARRAY_SIZE(dorin_gpio_keys),
dorin_gpio_keys);
}
static void __init ds_common_setup(void)
{
static u8 mac[6];
u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
ath79_register_m25p80(NULL);
if (ar93xx_wmac_read_mac_address(mac)) {
ath79_register_wmac(NULL, NULL);
} else {
ath79_register_wmac(art + DS_CALDATA_OFFSET,
art + DS_WMAC_MAC_OFFSET);
memcpy(mac, art + DS_WMAC_MAC_OFFSET, sizeof(mac));
}
mac[3] |= 0x08;
ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);
mac[3] &= 0xF7;
ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0);
ath79_register_mdio(0, 0x0);
/* LAN ports */
ath79_register_eth(1);
/* WAN port */
ath79_register_eth(0);
}
static void __init som9331_setup(void)
{
u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);
u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
ath79_setup_ar933x_phy4_switch(true, true);
ath79_gpio_function_disable(AR933X_GPIO_FUNC_ETH_SWITCH_LED0_EN |
AR933X_GPIO_FUNC_ETH_SWITCH_LED1_EN |
AR933X_GPIO_FUNC_ETH_SWITCH_LED2_EN |
AR933X_GPIO_FUNC_ETH_SWITCH_LED3_EN |
AR933X_GPIO_FUNC_ETH_SWITCH_LED4_EN);
ath79_register_m25p80(&som9331_flash_data);
ath79_register_leds_gpio(-1, ARRAY_SIZE(som9331_leds_gpio),
som9331_leds_gpio);
ath79_register_gpio_keys_polled(-1, SOM9331_KEYS_POLL_INTERVAL,
ARRAY_SIZE(som9331_gpio_keys),
som9331_gpio_keys);
ath79_register_usb();
ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);
ath79_init_mac(ath79_eth1_data.mac_addr, mac, -1);
ath79_register_mdio(0, 0x0);
/* LAN ports */
ath79_register_eth(1);
/* WAN port */
ath79_register_eth(0);
ath79_register_wmac(ee, mac);
}
static void __init anonabox_pro_setup(void)
{
u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
ath79_register_m25p80(NULL);
anonabox_pro_gpio_led_setup();
ath79_register_usb();
ath79_register_wmac(art + ANONABOX_PRO_WMAC_CALDATA_OFFSET, NULL);
ath79_register_mdio(0, 0x0);
ath79_register_mdio(1, 0x0);
ath79_init_mac(ath79_eth0_data.mac_addr, art + ANONABOX_PRO_MAC0_OFFSET, 0);
ath79_init_mac(ath79_eth1_data.mac_addr, art + ANONABOX_PRO_MAC1_OFFSET, 0);
/* WAN port */
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
ath79_eth0_data.speed = SPEED_100;
ath79_eth0_data.duplex = DUPLEX_FULL;
ath79_eth0_data.phy_mask = BIT(4);
ath79_register_eth(0);
/* LAN ports */
ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
ath79_eth1_data.speed = SPEED_1000;
ath79_eth1_data.duplex = DUPLEX_FULL;
ath79_switch_data.phy_poll_mask |= BIT(4);
ath79_switch_data.phy4_mii_en = 1;
ath79_register_eth(1);
}
static void __init rb2011_wlan_init(void)
{
u8 *hard_cfg = (u8 *) KSEG1ADDR(0x1f000000 + RB_HARD_CFG_OFFSET);
u16 tag_len;
u8 *tag;
char *art_buf;
u8 wlan_mac[ETH_ALEN];
int err;
err = routerboot_find_tag(hard_cfg, RB_HARD_CFG_SIZE, RB_ID_WLAN_DATA,
&tag, &tag_len);
if (err) {
pr_err("no calibration data found\n");
return;
}
art_buf = kmalloc(RB_ART_SIZE, GFP_KERNEL);
if (art_buf == NULL) {
pr_err("no memory for calibration data\n");
return;
}
err = rle_decode((char *) tag, tag_len, art_buf, RB_ART_SIZE,
NULL, NULL);
if (err) {
pr_err("unable to decode calibration data\n");
goto free;
}
ath79_init_mac(wlan_mac, ath79_mac_base, 11);
ath79_register_wmac(art_buf + 0x1000, wlan_mac);
free:
kfree(art_buf);
}
static void __init tl_wr1043nd_setup(void)
{
u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);
u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000);
tl_wr1043nd_rtl8366rb_hw_reset(true);
ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);
ath79_eth0_data.mii_bus_dev = &tl_wr1043nd_rtl8366rb_device.dev;
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
ath79_eth0_data.speed = SPEED_1000;
ath79_eth0_data.duplex = DUPLEX_FULL;
ath79_eth0_pll_data.pll_1000 = 0x1a000000;
ath79_register_eth(0);
ath79_register_usb();
ath79_register_m25p80(&tl_wr1043nd_flash_data);
ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr1043nd_leds_gpio),
tl_wr1043nd_leds_gpio);
platform_device_register(&tl_wr1043nd_rtl8366rb_device);
ath79_register_gpio_keys_polled(-1, TL_WR1043ND_KEYS_POLL_INTERVAL,
ARRAY_SIZE(tl_wr1043nd_gpio_keys),
tl_wr1043nd_gpio_keys);
ath79_register_wmac(eeprom, mac);
}
static void __init ubnt_rocket_m_xw_setup(void)
{
u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff0000);
ath79_register_m25p80(NULL);
ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_xw_leds_gpio),
ubnt_xw_leds_gpio);
ath79_register_gpio_keys_polled(-1, UBNT_XM_KEYS_POLL_INTERVAL,
ARRAY_SIZE(ubnt_xm_gpio_keys),
ubnt_xm_gpio_keys);
ath79_register_wmac(eeprom + UAP_PRO_WMAC_CALDATA_OFFSET, NULL);
ap91_pci_init(eeprom + UAP_PRO_PCI_CALDATA_OFFSET, NULL);
ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0);
ath79_init_mac(ath79_eth0_data.mac_addr,
eeprom + UAP_PRO_MAC0_OFFSET, 0);
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
ath79_register_mdio(0, ~BIT(4));
ath79_eth0_data.phy_mask = BIT(4);
ath79_eth0_pll_data.pll_1000 = 0x06000000;
ath79_register_eth(0);
}
static void __init db120_vhyfi_setup(void)
{
u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
ath79_gpio_output_select(DB120_VHYFI_GPIO_LED_USB, AR934X_GPIO_OUT_GPIO);
ath79_register_m25p80(NULL);
ath79_register_leds_gpio(-1, ARRAY_SIZE(db120_vhyfi_leds_gpio),
db120_vhyfi_leds_gpio);
ath79_register_gpio_keys_polled(-1, DB120_VHYFI_KEYS_POLL_INTERVAL,
ARRAY_SIZE(db120_vhyfi_gpio_keys),
db120_vhyfi_gpio_keys);
ath79_register_usb();
ath79_register_wmac(art + DB120_VHYFI_WMAC_CALDATA_OFFSET, NULL);
ap91_pci_init(art + DB120_VHYFI_PCIE_CALDATA_OFFSET, NULL);
db120_vhyfi_gmac_setup();
ath79_register_mdio(0, 0x0);
ath79_init_mac(ath79_eth0_data.mac_addr, art + DB120_VHYFI_MAC0_OFFSET, 0);
mdiobus_register_board_info(db120_vhyfi_mdio0_info,
ARRAY_SIZE(db120_vhyfi_mdio0_info));
/* GMAC0 is connected to an AR8327 switch */
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
ath79_eth0_data.phy_mask = BIT(0);
ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
ath79_eth0_pll_data.pll_1000 = 0x06000000;
ath79_register_eth(0);
}
static void __init gl_mifi_setup(void)
{
/* ART base address */
u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
/* disable PHY_SWAP and PHY_ADDR_SWAP bits */
ath79_setup_ar933x_phy4_switch(false, false);
/* register flash. */
ath79_register_m25p80(NULL);
/* register gpio LEDs and keys */
ath79_register_leds_gpio(-1, ARRAY_SIZE(gl_mifi_leds_gpio),
gl_mifi_leds_gpio);
ath79_register_gpio_keys_polled(-1, GL_MIFI_KEYS_POLL_INTERVAL,
ARRAY_SIZE(gl_mifi_gpio_keys),
gl_mifi_gpio_keys);
/* enable usb */
ath79_register_usb();
/* register eth0 as WAN, eth1 as LAN */
ath79_init_mac(ath79_eth0_data.mac_addr, art+GL_MIFI_MAC0_OFFSET, 0);
ath79_init_mac(ath79_eth1_data.mac_addr, art+GL_MIFI_MAC1_OFFSET, 0);
ath79_register_mdio(0, 0x0);
ath79_register_eth(0);
ath79_register_eth(1);
/* register wireless mac with cal data */
ath79_register_wmac(art + GL_MIFI_CALDATA_OFFSET, art + GL_MIFI_WMAC_MAC_OFFSET);
}
static void __init TL_WA901ND_V4_setup(void)
{
u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);
u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
ath79_register_m25p80(&tl_wa901nd_v4_flash_data);
ath79_register_leds_gpio(-1, ARRAY_SIZE(TL_WA901ND_V4_leds_gpio),
TL_WA901ND_V4_leds_gpio);
ath79_register_gpio_keys_polled(-1, TL_WA901ND_V4_KEYS_POLL_INTERVAL,
ARRAY_SIZE(TL_WA901ND_V4_gpio_keys),
TL_WA901ND_V4_gpio_keys);
ath79_register_mdio(0, 0x0);
ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1);
ath79_init_mac(ath79_eth1_data.mac_addr, mac, -1);
ath79_switch_data.phy4_mii_en = 1;
ath79_register_eth(0);
ath79_register_eth(1);
ath79_register_wmac(ee, mac);
}
static void __init tl_mr11u_setup(void)
{
u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);
u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
ath79_setup_ar933x_phy4_switch(false, true);
ath79_register_m25p80(&tl_mr11u_flash_data);
ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_mr11u_leds_gpio),
tl_mr11u_leds_gpio);
ath79_register_gpio_keys_polled(-1, TL_MR11U_KEYS_POLL_INTERVAL,
ARRAY_SIZE(tl_mr11u_gpio_keys),
tl_mr11u_gpio_keys);
gpio_request(TL_MR11U_GPIO_USB_POWER, "USB power");
gpio_direction_output(TL_MR11U_GPIO_USB_POWER, 1);
ath79_register_usb();
ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);
ath79_register_mdio(0, 0x0);
ath79_register_eth(0);
ath79_eth0_data.phy_mask = BIT(0);
ath79_register_wmac(ee, mac);
}
static void __init bsb_setup(void)
{
u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
/* disable PHY_SWAP and PHY_ADDR_SWAP bits */
ath79_setup_ar933x_phy4_switch(false,false);
ath79_register_leds_gpio(-1, ARRAY_SIZE(bsb_leds_gpio),
bsb_leds_gpio);
ath79_register_gpio_keys_polled(-1, BSB_KEYS_POLL_INTERVAL,
ARRAY_SIZE(bsb_gpio_keys),
bsb_gpio_keys);
ath79_register_usb();
ath79_register_m25p80(NULL);
ath79_init_mac(ath79_eth0_data.mac_addr, art + BSB_MAC_OFFSET, 1);
ath79_init_mac(ath79_eth1_data.mac_addr, art + BSB_MAC_OFFSET, 2);
ath79_register_mdio(0, 0x0);
ath79_register_eth(0);
ath79_register_eth(1);
ath79_register_wmac(art + BSB_CALDATA_OFFSET,
art + BSB_MAC_OFFSET);
}
static void __init epmp_setup(void)
{
u8 *art = (u8 *)KSEG1ADDR(0x1fff0000);
u8 mac[6];
u8 *cal_data;
ath79_register_m25p80(&epmp_flash_data);
ath79_init_mac(mac, art, 2);
ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_ONLY_MODE|AR934X_ETH_CFG_SW_PHY_SWAP);
ath79_register_mdio(1, 0x0);
ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);
ath79_init_mac(ath79_eth1_data.mac_addr, mac, 1);
ath79_switch_data.phy4_mii_en = 1;
ath79_switch_data.phy_poll_mask = BIT(0);
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
ath79_eth0_data.phy_mask = BIT(0);
ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev;
ath79_register_eth(0);
ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
ath79_register_eth(1);
cal_data=kmalloc(0x1000,GFP_KERNEL);
memcpy(cal_data, art + EPMP_WMAC_CALDATA_OFFSET, 0x1000);
memset(cal_data+0x1C,0x64,1);
memset(cal_data+0x1D,0x00,1);
ath79_register_wmac(cal_data, mac);
kfree(cal_data);
ath79_register_leds_gpio(-1, ARRAY_SIZE(epmp_leds_gpio) - 1,
epmp_leds_gpio);
}
static void __init ap121f_setup(void)
{
u8 *art = (u8 *) KSEG1ADDR(0x1f040000);
ath79_register_m25p80(NULL);
ath79_setup_ar933x_phy4_switch(false, false);
/* LAN */
ath79_register_mdio(0, 0x0);
ath79_init_mac(ath79_eth0_data.mac_addr, art, 0);
ath79_register_eth(0);
ath79_register_leds_gpio(-1, ARRAY_SIZE(ap121f_leds_gpio),
ap121f_leds_gpio);
ath79_register_gpio_keys_polled(-1, AP121F_KEYS_POLL_INTERVAL,
ARRAY_SIZE(ap121f_gpio_keys),
ap121f_gpio_keys);
gpio_request_one(AP121F_GPIO_MICROSD_EN,
GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
"microSD enable");
ath79_register_wmac(art + AP121F_WMAC_CALDATA_OFFSET, NULL);
ath79_register_usb();
}
static void __init ubnt_unifiac_setup(void)
{
u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff0000);
ath79_register_m25p80(&ubnt_unifiac_flash_data);
ath79_init_mac(ath79_eth0_data.mac_addr,
eeprom + UNIFIAC_MAC0_OFFSET, 0);
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII;
ath79_eth0_data.phy_mask = BIT(4);
ath79_eth0_pll_data.pll_10 = 0x00001313;
ath79_register_mdio(0, ~BIT(4));
ath79_register_eth(0);
ath79_register_wmac(eeprom + UNIFIAC_WMAC_CALDATA_OFFSET, NULL);
ap91_pci_init(eeprom + UNIFIAC_PCI_CALDATA_OFFSET, NULL);
ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_unifiac_leds_gpio),
ubnt_unifiac_leds_gpio);
ath79_register_gpio_keys_polled(-1, UNIFIAC_KEYS_POLL_INTERVAL,
ARRAY_SIZE(ubnt_unifiac_gpio_keys),
ubnt_unifiac_gpio_keys);
}
static void __init tl_ap143_setup(void)
{
u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);
u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
u8 tmpmac[ETH_ALEN];
ath79_register_m25p80(&tl_wr841n_v9_flash_data);
ath79_setup_ar933x_phy4_switch(false, false);
ath79_register_mdio(0, 0x0);
/* LAN */
ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0);
ath79_register_eth(1);
/* WAN */
ath79_switch_data.phy4_mii_en = 1;
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1);
ath79_register_eth(0);
ath79_init_mac(tmpmac, mac, 0);
ath79_register_wmac(ee, tmpmac);
}
static void __init carambola2_common_setup(void)
{
u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
/* Disable UART, enabling GPIO 9 and GPIO 10 */
ath79_gpio_function_disable(AR933X_GPIO_FUNC_UART_EN);
/* Enabling internal CS1, disable GPIO 9 */
ath79_gpio_function_enable(AR933X_GPIO_FUNC_SPI_CS_EN1);
ath79_register_m25p80i_multi(NULL);
ath79_register_wmac(art + CARAMBOLA2_CALDATA_OFFSET,
art + CARAMBOLA2_WMAC_MAC_OFFSET);
ath79_setup_ar933x_phy4_switch(true, true);
ath79_init_mac(ath79_eth0_data.mac_addr, art + CARAMBOLA2_MAC0_OFFSET, 0);
ath79_init_mac(ath79_eth1_data.mac_addr, art + CARAMBOLA2_MAC1_OFFSET, 0);
ath79_register_mdio(0, 0x0);
/* LAN ports */
ath79_register_eth(1);
/* WAN port */
ath79_register_eth(0);
// spi_register_board_info(ath79_spi_info, ARRAY_SIZE(ath79_spi_info));
}
static void __init common_setup(unsigned usb_power_gpio, bool sec_ethernet)
{
u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);
u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
/* disable PHY_SWAP and PHY_ADDR_SWAP bits */
ath79_setup_ar933x_phy4_switch(false, false);
ath79_register_m25p80(&tl_wr703n_flash_data);
ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr703n_leds_gpio),
tl_wr703n_leds_gpio);
ath79_register_gpio_keys_polled(-1, TL_WR703N_KEYS_POLL_INTERVAL,
ARRAY_SIZE(tl_wr703n_gpio_keys),
tl_wr703n_gpio_keys);
gpio_request_one(usb_power_gpio,
GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
"USB power");
ath79_register_usb();
ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);
ath79_register_mdio(0, 0x0);
ath79_register_eth(0);
if (sec_ethernet)
{
ath79_init_mac(ath79_eth0_data.mac_addr, mac, -1);
ath79_register_eth(1);
}
ath79_register_wmac(ee, mac);
}
static void __init ubnt_uap_pro_setup(void)
{
u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff0000);
ath79_register_m25p80(NULL);
ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_uap_pro_gpio_leds),
ubnt_uap_pro_gpio_leds);
ath79_register_gpio_keys_polled(-1, UBNT_XM_KEYS_POLL_INTERVAL,
ARRAY_SIZE(uap_pro_gpio_keys),
uap_pro_gpio_keys);
ath79_register_wmac(eeprom + UAP_PRO_WMAC_CALDATA_OFFSET, NULL);
ap91_pci_init(eeprom + UAP_PRO_PCI_CALDATA_OFFSET, NULL);
ath79_register_mdio(0, 0x0);
mdiobus_register_board_info(uap_pro_mdio0_info,
ARRAY_SIZE(uap_pro_mdio0_info));
ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0);
ath79_init_mac(ath79_eth0_data.mac_addr,
eeprom + UAP_PRO_MAC0_OFFSET, 0);
/* GMAC0 is connected to an AR8327 switch */
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
ath79_eth0_data.phy_mask = BIT(0);
ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
ath79_eth0_pll_data.pll_1000 = 0x06000000;
ath79_register_eth(0);
}
static void __init tl_wr941nd_setup(void)
{
u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);
u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000);
ath79_register_mdio(0, 0x0);
ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
ath79_eth0_data.speed = SPEED_100;
ath79_eth0_data.duplex = DUPLEX_FULL;
ath79_register_eth(0);
ath79_register_dsa(&ath79_eth0_device.dev, &ath79_mdio0_device.dev,
&tl_wr941nd_dsa_data);
ath79_register_m25p80(&tl_wr941nd_flash_data);
ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr941nd_leds_gpio),
tl_wr941nd_leds_gpio);
ath79_register_gpio_keys_polled(-1, TL_WR941ND_KEYS_POLL_INTERVAL,
ARRAY_SIZE(tl_wr941nd_gpio_keys),
tl_wr941nd_gpio_keys);
ath79_register_wmac(eeprom, mac);
}
static void __init hornet_ub_setup(void)
{
u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
hornet_ub_gpio_setup();
ath79_register_m25p80(NULL);
ath79_register_leds_gpio(-1, ARRAY_SIZE(hornet_ub_leds_gpio),
hornet_ub_leds_gpio);
ath79_register_gpio_keys_polled(-1, HORNET_UB_KEYS_POLL_INTERVAL,
ARRAY_SIZE(hornet_ub_gpio_keys),
hornet_ub_gpio_keys);
ath79_init_mac(ath79_eth1_data.mac_addr,
art + HORNET_UB_MAC0_OFFSET, 0);
ath79_init_mac(ath79_eth0_data.mac_addr,
art + HORNET_UB_MAC1_OFFSET, 0);
ath79_register_mdio(0, 0x0);
ath79_register_eth(1);
ath79_register_eth(0);
ath79_register_wmac(art + HORNET_UB_CALDATA_OFFSET, NULL);
ath79_register_usb();
}
static void __init tl_wr1041nv2_setup(void)
{
u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);
u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
ath79_register_m25p80(&tl_wr1041nv2_flash_data);
ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr1041nv2_leds_gpio),
tl_wr1041nv2_leds_gpio);
ath79_register_gpio_keys_polled(-1, TL_WR1041NV2_KEYS_POLL_INTERVAL,
ARRAY_SIZE(tl_wr1041nv2_gpio_keys),
tl_wr1041nv2_gpio_keys);
ath79_register_wmac(ee, mac);
ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 |
AR934X_ETH_CFG_SW_ONLY_MODE);
ath79_register_mdio(1, 0x0);
ath79_register_mdio(0, 0x0);
ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1);
mdiobus_register_board_info(db120_mdio0_info,
ARRAY_SIZE(db120_mdio0_info));
/* GMAC0 is connected to an AR8327 switch */
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
ath79_eth0_data.phy_mask = BIT(0);
ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
ath79_eth0_pll_data.pll_1000 = 0x06000000;
ath79_register_eth(0);
}
static int qihoo_init_wmac(void)
{
struct mtd_info * mtd;
size_t nb = 0;
u8 *art;
int ret;
if (!qihoo_c301_board)
return 0;
mtd = get_mtd_device_nm("radiocfg");
if (IS_ERR(mtd))
return PTR_ERR(mtd);
if (mtd->size != 0x10000)
return -1;
art = kzalloc(0x1000, GFP_KERNEL);
if (!art)
return -1;
ret = mtd_read(mtd, QIHOO_C301_WMAC_CALDATA_OFFSET, 0x1000, &nb, art);
if (nb != 0x1000)
{
kfree(art);
return ret;
}
ath79_register_wmac(art, wlan24mac);
return 0;
}
static void __init WPJ563_setup(void)
{
u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
u8 *mac = (u8 *) KSEG1ADDR(0x1f02e000);
ath79_register_m25p80(NULL);
ath79_register_leds_gpio(-1, ARRAY_SIZE(WPJ563_leds_gpio),
WPJ563_leds_gpio);
ath79_register_gpio_keys_polled(-1, WPJ563_KEYS_POLL_INTERVAL,
ARRAY_SIZE(WPJ563_gpio_keys),
WPJ563_gpio_keys);
ath79_register_usb();
ath79_register_wmac(art + WPJ563_WMAC_CALDATA_OFFSET, NULL);
ath79_register_pci();
mdiobus_register_board_info(WPJ563_mdio0_info,
ARRAY_SIZE(WPJ563_mdio0_info));
ath79_register_mdio(0, 0x0);
ath79_init_mac(ath79_eth0_data.mac_addr, mac + WPJ563_MAC0_OFFSET, 0);
ath79_init_mac(ath79_eth1_data.mac_addr, mac + WPJ563_MAC1_OFFSET, 0);
/* GMAC0 is connected to an QCA8334 switch */
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII;
ath79_eth0_data.speed = SPEED_1000;
ath79_eth0_data.duplex = DUPLEX_FULL;
ath79_eth0_data.phy_mask = BIT(0);
ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
ath79_register_eth(0);
}
static void __init gl_inet_setup(void)
{
/* get the mac address which is stored in the 1st 64k uboot MTD */
u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);
/* get the art address, which is the last 64K. By using
0x1fff1000, it doesn't matter it is 4M, 8M or 16M flash */
u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
/* disable PHY_SWAP and PHY_ADDR_SWAP bits */
ath79_setup_ar933x_phy4_switch(false, false);
/* register flash. MTD will use tp-link parser to parser MTD */
ath79_register_m25p80(&gl_inet_flash_data);
/* register gpio LEDs and keys */
ath79_register_leds_gpio(-1, ARRAY_SIZE(gl_inet_leds_gpio),
gl_inet_leds_gpio);
ath79_register_gpio_keys_polled(-1, GL_INET_KEYS_POLL_INTERVAL,
ARRAY_SIZE(gl_inet_gpio_keys),
gl_inet_gpio_keys);
/* enable usb */
ath79_register_usb();
/* register eth0 as WAN, eth1 as LAN */
ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);
ath79_register_mdio(0, 0x0);
ath79_register_eth(0);
ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0);
ath79_register_eth(1);
/* register wireless mac with cal data */
ath79_register_wmac(ee, mac);
}
static void __init cus227_setup(void)
{
ath79_register_leds_gpio(-1, ARRAY_SIZE(cus227_leds_gpio),
cus227_leds_gpio);
ath79_register_gpio_keys_polled(-1, CUS227_KEYS_POLL_INTERVAL,
ARRAY_SIZE(cus227_gpio_keys),
cus227_gpio_keys);
ath79_register_usb();
ath79_register_nand();
ath79_mtd_caldata_fixup(&cus227_caldata);
cus227_register_spi_devices(cus227_spi_info);
ath79_register_wmac(NULL, NULL);
/* GMAC1 is connected to the internal switch */
ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
ath79_eth1_data.speed = SPEED_1000;
ath79_eth1_data.duplex = DUPLEX_FULL;
ath79_register_mdio(1, 0x0);
ath79_register_eth(1);
/* Audio initialization: PCM/I2S and CODEC */
cus227_audio_setup();
ath79_audio_device_register();
}
static void __init wnr2000_setup(void)
{
u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000);
ath79_register_mdio(0, 0x0);
ath79_init_mac(ath79_eth0_data.mac_addr, eeprom, 0);
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
ath79_eth0_data.speed = SPEED_100;
ath79_eth0_data.duplex = DUPLEX_FULL;
ath79_eth0_data.has_ar8216 = 1;
ath79_init_mac(ath79_eth1_data.mac_addr, eeprom, 1);
ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
ath79_eth1_data.phy_mask = 0x10;
ath79_register_eth(0);
ath79_register_eth(1);
ath79_register_m25p80(&wnr2000_flash_data);
ath79_register_leds_gpio(-1, ARRAY_SIZE(wnr2000_leds_gpio),
wnr2000_leds_gpio);
ath79_register_gpio_keys_polled(-1, WNR2000_KEYS_POLL_INTERVAL,
ARRAY_SIZE(wnr2000_gpio_keys),
wnr2000_gpio_keys);
ath79_register_wmac(eeprom, NULL);
}
static void __init tl_ap151_setup(void)
{
u8 *mac = (u8 *) KSEG1ADDR(0x1f00fc00);
u8 *ee = (u8 *) KSEG1ADDR(0x1fff0000);
u8 tmpmac[ETH_ALEN];
ath79_register_m25p80(&tl_wdr6500_v2_flash_data);
ath79_setup_ar933x_phy4_switch(false, false);
ath79_register_mdio(0, 0x0);
/* WAN */
ath79_switch_data.phy4_mii_en = 1;
ath79_switch_data.phy_poll_mask = BIT(4);
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
ath79_eth0_data.phy_mask = BIT(4);
ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1);
ath79_register_eth(0);
/* LAN */
ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
ath79_eth1_data.duplex = DUPLEX_FULL;
ath79_eth1_data.speed = SPEED_1000;
ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0);
ath79_register_eth(1);
ath79_init_mac(tmpmac, mac, -1);
ath79_register_wmac(ee + TL_WDR6500_V2_WMAC_CALDATA_OFFSET, tmpmac);
ath79_register_pci();
ath79_register_usb();
}
static void __init antminer_s1_setup(void)
{
u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);
u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
/* disable PHY_SWAP and PHY_ADDR_SWAP bits */
ath79_setup_ar933x_phy4_switch(false, false);
ath79_register_leds_gpio(-1, ARRAY_SIZE(ANTMINER_S1_leds_gpio),
ANTMINER_S1_leds_gpio);
ath79_register_gpio_keys_polled(-1, ANTMINER_S1_KEYSPOLL_INTERVAL,
ARRAY_SIZE(ANTMINER_S1_GPIO_keys),
ANTMINER_S1_GPIO_keys);
gpio_request_one(ANTMINER_S1_GPIO_USB_POWER,
GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
"USB power");
ath79_register_usb();
ath79_register_m25p80(&ANTMINER_S1_flash_data);
ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1);
ath79_init_mac(ath79_eth1_data.mac_addr, mac, -1);
ath79_register_mdio(0, 0x0);
ath79_register_eth(0);
ath79_register_eth(1);
ath79_register_wmac(ee, mac);
}
static void __init lima_setup(void)
{
u8 *art = (u8 *) KSEG1ADDR(0x1f080000);
ath79_register_m25p80(NULL);
ath79_register_gpio_keys_polled(-1, LIMA_KEYS_POLL_INTERVAL,
ARRAY_SIZE(lima_gpio_keys),
lima_gpio_keys);
ath79_setup_ar933x_phy4_switch(true, true);
ath79_init_mac(ath79_eth0_data.mac_addr, art + LIMA_MAC0_OFFSET, 0);
ath79_init_mac(ath79_eth1_data.mac_addr, art + LIMA_MAC1_OFFSET, 0);
ath79_register_mdio(0, ~LIMA_ETH_PHYS);
ath79_switch_data.phy4_mii_en = 1;
ath79_switch_data.phy_poll_mask |= BIT(0);
ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
ath79_eth1_data.duplex = DUPLEX_FULL;
ath79_eth1_data.phy_mask = BIT(1);
ath79_register_eth(1);
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
ath79_eth0_data.duplex = DUPLEX_FULL;
ath79_eth0_data.speed = SPEED_100;
ath79_eth0_data.phy_mask = BIT(0);
ath79_register_eth(0);
ath79_register_wmac(art + LIMA_CALDATA_OFFSET, NULL);
ath79_register_usb();
ath79_register_pci();
}
