void ath9k_init_crypto(struct ath_softc *sc) { struct ath_common *common = ath9k_hw_common(sc->sc_ah); int i = 0; /* Get the hardware key cache size. */ common->keymax = sc->sc_ah->caps.keycache_size; if (common->keymax > ATH_KEYMAX) { ath_dbg(common, ATH_DBG_ANY, "Warning, using only %u entries in %u key cache\n", ATH_KEYMAX, common->keymax); common->keymax = ATH_KEYMAX; } /* * Reset the key cache since some parts do not * reset the contents on initial power up. */ for (i = 0; i < common->keymax; i++) ath_hw_keyreset(common, (u16) i); /* * Check whether the separate key cache entries * are required to handle both tx+rx MIC keys. * With split mic keys the number of stations is limited * to 27 otherwise 59. */ if (sc->sc_ah->misc_mode & AR_PCU_MIC_NEW_LOC_ENA) common->crypt_caps |= ATH_CRYPT_CAP_MIC_COMBINED; }
void ath9k_cmn_init_crypto(struct ath_hw *ah) { struct ath_common *common = ath9k_hw_common(ah); int i = 0; common->keymax = AR_KEYTABLE_SIZE; if (ah->misc_mode & AR_PCU_MIC_NEW_LOC_ENA) common->crypt_caps |= ATH_CRYPT_CAP_MIC_COMBINED; for (i = 0; i < common->keymax; i++) ath_hw_keyreset(common, (u16) i); }
void ath9k_cmn_init_crypto(struct ath_hw *ah) { struct ath_common *common = ath9k_hw_common(ah); int i = 0; /* Get the hardware key cache size. */ common->keymax = AR_KEYTABLE_SIZE; /* * Check whether the separate key cache entries * are required to handle both tx+rx MIC keys. * With split mic keys the number of stations is limited * to 27 otherwise 59. */ if (ah->misc_mode & AR_PCU_MIC_NEW_LOC_ENA) common->crypt_caps |= ATH_CRYPT_CAP_MIC_COMBINED; /* * Reset the key cache since some parts do not * reset the contents on initial power up. */ for (i = 0; i < common->keymax; i++) ath_hw_keyreset(common, (u16) i); }