static void au1200_usb_pm(int susp) { void __iomem *base = (void __iomem *)KSEG1ADDR(AU1200_USB_OTG_PHYS_ADDR); if (susp) { /* */ /* */ alchemy_usb_pmdata[0] = __raw_readl(base + 0x00); alchemy_usb_pmdata[1] = __raw_readl(base + 0x04); } else { /* */ au1200_usb_init(); /* */ __raw_writel(alchemy_usb_pmdata[0], base + 0x00); __raw_writel(alchemy_usb_pmdata[1], base + 0x04); wmb(); } }
static void au1200_usb_pm(int susp) { void __iomem *base = (void __iomem *)KSEG1ADDR(AU1200_USB_OTG_PHYS_ADDR); if (susp) { /* save OTG_CAP/MUX registers which indicate port routing */ /* FIXME: write an OTG driver to do that */ alchemy_usb_pmdata[0] = __raw_readl(base + 0x00); alchemy_usb_pmdata[1] = __raw_readl(base + 0x04); } else { /* restore access to all MMIO areas */ au1200_usb_init(); /* restore OTG_CAP/MUX registers */ __raw_writel(alchemy_usb_pmdata[0], base + 0x00); __raw_writel(alchemy_usb_pmdata[1], base + 0x04); wmb(); } }
static int __init alchemy_usb_init(void) { switch (alchemy_get_cputype()) { case ALCHEMY_CPU_AU1000: case ALCHEMY_CPU_AU1500: case ALCHEMY_CPU_AU1100: au1000_usb_init(AU1000_USB_OHCI_PHYS_ADDR, AU1000_OHCICFG); break; case ALCHEMY_CPU_AU1550: au1000_usb_init(AU1550_USB_OHCI_PHYS_ADDR, AU1550_OHCICFG); break; case ALCHEMY_CPU_AU1200: au1200_usb_init(); break; } register_syscore_ops(&alchemy_usb_pm_ops); return 0; }