void ayxx_w(UINT8 ChipID, offs_t offset, UINT8 data) { ayxx_state *info = &AYxxData[ChipID]; switch(EMU_CORE) { #ifdef ENABLE_ALL_CORES case EC_MAME: ay8910_write_ym(info->chip, offset, data); break; #endif case EC_EMU2149: PSG_writeIO((PSG*)info->chip, offset, data); break; } }
static void psg_write(void *param, int address, int data) { ym2610_state *info = (ym2610_state *)param; if (info->psg != NULL) { switch(info->AY_EMU_CORE) { #ifdef ENABLE_ALL_CORES case EC_MAME: ay8910_write_ym(info->psg, address, data); break; #endif case EC_EMU2149: PSG_writeIO((PSG*)info->psg, address, data); break; } } }
static void psg_write(void *param, int address, int data) { struct ym2610_info *info = param; ay8910_write_ym(info->psg, address, data); }
static void psg_write(void *param, int address, int data) { ym2608_device *ym2608 = (ym2608_device *) param; ay8910_write_ym(ym2608->_psg(), address, data); }
static void psg_write(void *param, int address, int data) { ym2610_state *info = (ym2610_state *)param; ay8910_write_ym(info->psg, address, data); }