int __init bcm63xx_spi_register(void) { if (BCMCPU_IS_6328() || BCMCPU_IS_6345()) return -ENODEV; spi_resources[0].start = bcm63xx_regset_address(RSET_SPI); spi_resources[0].end = spi_resources[0].start; spi_resources[1].start = bcm63xx_get_irq_number(IRQ_SPI); if (BCMCPU_IS_6338() || BCMCPU_IS_6348()) { spi_resources[0].end += BCM_6338_RSET_SPI_SIZE - 1; spi_pdata.fifo_size = SPI_6338_MSG_DATA_SIZE; spi_pdata.msg_type_shift = SPI_6338_MSG_TYPE_SHIFT; spi_pdata.msg_ctl_width = SPI_6338_MSG_CTL_WIDTH; } if (BCMCPU_IS_6358() || BCMCPU_IS_6368()) { spi_resources[0].end += BCM_6358_RSET_SPI_SIZE - 1; spi_pdata.fifo_size = SPI_6358_MSG_DATA_SIZE; spi_pdata.msg_type_shift = SPI_6358_MSG_TYPE_SHIFT; spi_pdata.msg_ctl_width = SPI_6358_MSG_CTL_WIDTH; } bcm63xx_spi_regs_init(); return platform_device_register(&bcm63xx_spi_device); }
int __init bcm63xx_enet_register(int unit, const struct bcm63xx_enet_platform_data *pd) { struct platform_device *pdev; struct bcm63xx_enet_platform_data *dpd; int ret; if (unit > 1) return -ENODEV; if (!shared_device_registered) { shared_res[0].start = bcm63xx_regset_address(RSET_ENETDMA); shared_res[0].end = shared_res[0].start; shared_res[0].end += RSET_ENETDMA_SIZE - 1; ret = platform_device_register(&bcm63xx_enet_shared_device); if (ret) return ret; shared_device_registered = 1; } if (unit == 0) { enet0_res[0].start = bcm63xx_regset_address(RSET_ENET0); enet0_res[0].end = enet0_res[0].start; enet0_res[0].end += RSET_ENET_SIZE - 1; enet0_res[1].start = bcm63xx_get_irq_number(IRQ_ENET0); enet0_res[2].start = bcm63xx_get_irq_number(IRQ_ENET0_RXDMA); enet0_res[3].start = bcm63xx_get_irq_number(IRQ_ENET0_TXDMA); pdev = &bcm63xx_enet0_device; } else { enet1_res[0].start = bcm63xx_regset_address(RSET_ENET1); enet1_res[0].end = enet1_res[0].start; enet1_res[0].end += RSET_ENET_SIZE - 1; enet1_res[1].start = bcm63xx_get_irq_number(IRQ_ENET1); enet1_res[2].start = bcm63xx_get_irq_number(IRQ_ENET1_RXDMA); enet1_res[3].start = bcm63xx_get_irq_number(IRQ_ENET1_TXDMA); pdev = &bcm63xx_enet1_device; } /* copy given platform data */ dpd = pdev->dev.platform_data; memcpy(dpd, pd, sizeof (*pd)); /* adjust them in case internal phy is used */ if (dpd->use_internal_phy) { /* internal phy only exists for enet0 */ if (unit == 1) return -ENODEV; dpd->phy_id = 1; dpd->has_phy_interrupt = 1; dpd->phy_interrupt = bcm63xx_get_irq_number(IRQ_ENET_PHY); } ret = platform_device_register(pdev); if (ret) return ret; return 0; }
int __init bcm63xx_enetsw_register(const struct bcm63xx_enetsw_platform_data *pd) { int ret; if (!BCMCPU_IS_6328() && !BCMCPU_IS_6362() && !BCMCPU_IS_6368()) return -ENODEV; ret = register_shared(); if (ret) return ret; enetsw_res[0].start = bcm63xx_regset_address(RSET_ENETSW); enetsw_res[0].end = enetsw_res[0].start; enetsw_res[0].end += RSET_ENETSW_SIZE - 1; enetsw_res[1].start = bcm63xx_get_irq_number(IRQ_ENETSW_RXDMA0); enetsw_res[2].start = bcm63xx_get_irq_number(IRQ_ENETSW_TXDMA0); if (!enetsw_res[2].start) enetsw_res[2].start = -1; memcpy(bcm63xx_enetsw_device.dev.platform_data, pd, sizeof(*pd)); if (BCMCPU_IS_6328()) enetsw_pd.num_ports = ENETSW_PORTS_6328; else if (BCMCPU_IS_6362() || BCMCPU_IS_6368()) enetsw_pd.num_ports = ENETSW_PORTS_6368; enetsw_pd.dma_has_sram = true; enetsw_pd.dma_chan_width = ENETDMA_CHAN_WIDTH; enetsw_pd.dma_chan_en_mask = ENETDMAC_CHANCFG_EN_MASK; enetsw_pd.dma_chan_int_mask = ENETDMAC_IR_PKTDONE_MASK; ret = platform_device_register(&bcm63xx_enetsw_device); if (ret) return ret; return 0; }
int __init bcm63xx_pcmcia_register(void) { int ret, i; if (!BCMCPU_IS_6348() && !BCMCPU_IS_6358()) return 0; /* use correct pcmcia ready gpio depending on processor */ switch (bcm63xx_get_cpu_id()) { case BCM6348_CPU_ID: pd.ready_gpio = 22; break; case BCM6358_CPU_ID: pd.ready_gpio = 22; break; default: return -ENODEV; } pcmcia_resources[0].start = bcm63xx_regset_address(RSET_PCMCIA); pcmcia_resources[0].end = pcmcia_resources[0].start; pcmcia_resources[0].end += RSET_PCMCIA_SIZE - 1; pcmcia_resources[4].start = bcm63xx_get_irq_number(IRQ_PCMCIA); /* configure pcmcia chip selects */ for (i = 0; i < 3; i++) { ret = config_pcmcia_cs(pcmcia_cs[i][0], pcmcia_cs[i][1], pcmcia_cs[i][2]); if (ret) goto out_err; } return platform_device_register(&bcm63xx_pcmcia_device); out_err: printk(KERN_ERR "unable to set pcmcia chip select"); return ret; }
int bcm63xx_timer_init(void) { int ret, irq; u32 reg; reg = bcm_timer_readl(TIMER_IRQSTAT_REG); reg &= ~TIMER_IRQSTAT_TIMER0_IR_EN; reg &= ~TIMER_IRQSTAT_TIMER1_IR_EN; reg &= ~TIMER_IRQSTAT_TIMER2_IR_EN; bcm_timer_writel(reg, TIMER_IRQSTAT_REG); periph_clk = clk_get(NULL, "periph"); if (IS_ERR(periph_clk)) return -ENODEV; irq = bcm63xx_get_irq_number(IRQ_TIMER); ret = request_irq(irq, timer_interrupt, 0, "bcm63xx_timer", NULL); if (ret) { printk(KERN_ERR "bcm63xx_timer: failed to register irq\n"); return ret; } return 0; }
int __init bcm63xx_enet_register(int unit, const struct bcm63xx_enet_platform_data *pd) { struct platform_device *pdev; struct bcm63xx_enet_platform_data *dpd; int ret; if (unit > 1) return -ENODEV; if (unit == 1 && BCMCPU_IS_6338()) return -ENODEV; if (!shared_device_registered) { shared_res[0].start = bcm63xx_regset_address(RSET_ENETDMA); shared_res[0].end = shared_res[0].start; if (BCMCPU_IS_6338()) shared_res[0].end += (RSET_ENETDMA_SIZE / 2) - 1; else shared_res[0].end += (RSET_ENETDMA_SIZE) - 1; ret = platform_device_register(&bcm63xx_enet_shared_device); if (ret) return ret; shared_device_registered = 1; } if (unit == 0) { enet0_res[0].start = bcm63xx_regset_address(RSET_ENET0); enet0_res[0].end = enet0_res[0].start; enet0_res[0].end += RSET_ENET_SIZE - 1; enet0_res[1].start = bcm63xx_get_irq_number(IRQ_ENET0); enet0_res[2].start = bcm63xx_get_irq_number(IRQ_ENET0_RXDMA); enet0_res[3].start = bcm63xx_get_irq_number(IRQ_ENET0_TXDMA); pdev = &bcm63xx_enet0_device; } else { enet1_res[0].start = bcm63xx_regset_address(RSET_ENET1); enet1_res[0].end = enet1_res[0].start; enet1_res[0].end += RSET_ENET_SIZE - 1; enet1_res[1].start = bcm63xx_get_irq_number(IRQ_ENET1); enet1_res[2].start = bcm63xx_get_irq_number(IRQ_ENET1_RXDMA); enet1_res[3].start = bcm63xx_get_irq_number(IRQ_ENET1_TXDMA); pdev = &bcm63xx_enet1_device; } dpd = pdev->dev.platform_data; memcpy(dpd, pd, sizeof(*pd)); if (dpd->use_internal_phy) { if (unit == 1) return -ENODEV; dpd->phy_id = 1; dpd->has_phy_interrupt = 1; dpd->phy_interrupt = bcm63xx_get_irq_number(IRQ_ENET_PHY); } ret = platform_device_register(pdev); if (ret) return ret; return 0; }
int __init bcm63xx_enet_register(int unit, const struct bcm63xx_enet_platform_data *pd) { struct platform_device *pdev; struct bcm63xx_enet_platform_data *dpd; int ret; if (unit > 1) return -ENODEV; if (unit == 1 && (BCMCPU_IS_6338() || BCMCPU_IS_6345())) return -ENODEV; ret = register_shared(); if (ret) return ret; if (unit == 0) { enet0_res[0].start = bcm63xx_regset_address(RSET_ENET0); enet0_res[0].end = enet0_res[0].start; enet0_res[0].end += RSET_ENET_SIZE - 1; enet0_res[1].start = bcm63xx_get_irq_number(IRQ_ENET0); enet0_res[2].start = bcm63xx_get_irq_number(IRQ_ENET0_RXDMA); enet0_res[3].start = bcm63xx_get_irq_number(IRQ_ENET0_TXDMA); pdev = &bcm63xx_enet0_device; } else { enet1_res[0].start = bcm63xx_regset_address(RSET_ENET1); enet1_res[0].end = enet1_res[0].start; enet1_res[0].end += RSET_ENET_SIZE - 1; enet1_res[1].start = bcm63xx_get_irq_number(IRQ_ENET1); enet1_res[2].start = bcm63xx_get_irq_number(IRQ_ENET1_RXDMA); enet1_res[3].start = bcm63xx_get_irq_number(IRQ_ENET1_TXDMA); pdev = &bcm63xx_enet1_device; } /* copy given platform data */ dpd = pdev->dev.platform_data; memcpy(dpd, pd, sizeof(*pd)); /* adjust them in case internal phy is used */ if (dpd->use_internal_phy) { /* internal phy only exists for enet0 */ if (unit == 1) return -ENODEV; dpd->phy_id = 1; dpd->has_phy_interrupt = 1; dpd->phy_interrupt = bcm63xx_get_irq_number(IRQ_ENET_PHY); } dpd->dma_chan_en_mask = ENETDMAC_CHANCFG_EN_MASK; dpd->dma_chan_int_mask = ENETDMAC_IR_PKTDONE_MASK; if (BCMCPU_IS_6345()) { dpd->dma_chan_en_mask |= ENETDMAC_CHANCFG_CHAINING_MASK; dpd->dma_chan_en_mask |= ENETDMAC_CHANCFG_WRAP_EN_MASK; dpd->dma_chan_en_mask |= ENETDMAC_CHANCFG_FLOWC_EN_MASK; dpd->dma_chan_int_mask |= ENETDMA_IR_BUFDONE_MASK; dpd->dma_chan_int_mask |= ENETDMA_IR_NOTOWNER_MASK; dpd->dma_chan_width = ENETDMA_6345_CHAN_WIDTH; dpd->dma_desc_shift = ENETDMA_6345_DESC_SHIFT; } else { dpd->dma_has_sram = true; dpd->dma_chan_width = ENETDMA_CHAN_WIDTH; } ret = platform_device_register(pdev); if (ret) return ret; return 0; }
int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { return bcm63xx_get_irq_number(IRQ_PCI); }