static void endSimulation(void *nu)
{
bhmEventHandle finished = bhmGetSystemEvent(BHM_SE_END_OF_SIMULATION);
bhmWaitEvent(finished);
bhmMessage("I", PREFIX, "Statistics:");
bhmPrintf("Screen updates : %d\n", updates);
bhmPrintf("ISA reads : %d\n", ISAreads);
bhmPrintf("ISA writes : %d\n", ISAwrites);
}
void loop() {
while (1) {
while (regs.STATE == RADIO_STATE_STATE_Disabled) {
bhmWaitEvent(txenEventHandle);
}
if (regs.STATE == RADIO_STATE_STATE_TxRu) {
bhmWaitDelay( 90.0 ); // in uS
info("READY EVENT!!!");
stateTransit(READY); // idle state
regs.EVENTS_READY = 1;
ppmWriteNet(ppiNotificationHandle, RADIO_PERIPHERAL_ID);
} else if (regs.STATE == RADIO_STATE_STATE_TxIdle) {
// ?
} else if (regs.STATE == RADIO_STATE_STATE_Tx) {
stateTransit(ADDRESS); // address sent state
regs.EVENTS_ADDRESS = 1;
ppmWriteNet(ppiNotificationHandle, RADIO_PERIPHERAL_ID);
bhmWaitDelay( 20.0 ); // in uS
stateTransit(PAYLOAD); // payload sent state
bhmWaitDelay( 170.0 ); // in uS
regs.EVENTS_PAYLOAD = 1;
ppmWriteNet(ppiNotificationHandle, RADIO_PERIPHERAL_ID);
bhmWaitDelay( 20.0 ); // in uS
stateTransit(END); // end state
regs.EVENTS_END = 1;
ppmWriteNet(ppiNotificationHandle, RADIO_PERIPHERAL_ID);
} else if (regs.STATE == RADIO_STATE_STATE_TxDisable) {
stateTransit(FULLY_DISABLED); // fully disabled state
regs.EVENTS_DISABLED = 1;
ppmWriteNet(ppiNotificationHandle, RADIO_PERIPHERAL_ID);
}
updateIrqLines();
bhmWaitDelay( 1.0 ); // in uS
}
}
static void DMA_Thread(void *user)
{
for (;;)
{
if (diagnosticLevel >= 2)
bhmMessage("I", "KinetisDMA", "DMA_Thread waiting...");
bhmWaitEvent(chState.start);
if (diagnosticLevel >= 2)
bhmMessage("I", "KinetisDMA", "DMA_Thread triggered...");
// A channel has requested service.
Uns32 chNum = 0;
dma_tcdT xferTcd;
Uns32 numBytes;
while (! isEmptyQue())
{
// Check to see if we have recieved transfer cancel request.
if (chState.cancel > 0)
{
initRequestQue();
// ECX transfer with error flags.
if (chState.cancel == 1)
{
chReg->ES.bits.ERRCHN = chNum;
chReg->ES.bits.ECX = 1;
chReg->ES.bits.VLD = 1;
}
chState.cancel = 0;
continue;
}
if (popRequest(&chNum) != 0)
{
bhmMessage("W", periphName, "Error: No DMA Channel available on request queue");
break;
}
if (diagnosticLevel >= 3)
bhmMessage("I", periphName, "Servicing channel: %d", chNum);
// Verify Channel TCD Data.
if (! verifyChannel(chNum))
{
if (diagnosticLevel >= 2)
bhmMessage("W", periphName, "Channel configuration error: ES=0x%x", chReg->ES.value);
sendErrorInterrupt(chNum);
setBits(&(chReg->ERR.value), chNum, 1, "INT");
tcdReg[chNum].TCD_CSR.bits.ACTIVE = 0;
tcdReg[chNum].TCD_CSR.bits.DONE = 1;
continue;
}
// Set the apprioriate csr Bits.
tcdReg[chNum].TCD_CSR.bits.DONE = 0;
tcdReg[chNum].TCD_CSR.bits.START = 0;
tcdReg[chNum].TCD_CSR.bits.ACTIVE = 1;
numBytes = getNumBytes(chNum);
memcpy(&xferTcd, &(tcdReg[chNum]), sizeof(dma_tcdT));
switch (tcdReg[chNum].TCD_ATTR.bits.SSIZE)
{
case 0x0: // 8 - bit src.
doTransfer(chNum, &xferTcd, 1, numBytes);
break;
case 0x1: // 16 - bit src.
case 0x4: // 16 - bit burst:
doTransfer(chNum, &xferTcd, 2, numBytes);
break;
case 0x2: // 32 - bit src.
doTransfer(chNum, &xferTcd, 4, numBytes);
break;
default:
break; // should be caught in verify sections.
}
// Set the next address value.
tcdReg[chNum].TCD_SADDR.value = xferTcd.TCD_SADDR.value + xferTcd.TCD_SLAST.value;
tcdReg[chNum].TCD_DADDR.value = xferTcd.TCD_DADDR.value + xferTcd.TCD_DLASTSGA.value;
// TODO: Update CITER/BITER.
tcdReg[chNum].TCD_CSR.bits.ACTIVE = 0;
tcdReg[chNum].TCD_CSR.bits.DONE = 1;
sendDMADoneInterrupt(chNum);
}
}
}
void terminationMonitoringThread(void *user) {
bhmWaitEvent(bhmGetSystemEvent(BHM_SE_END_OF_SIMULATION));
info("simulation terminating");
// print the avg current log data
printAvgCurrent();
}
