int bladerf_select_band(struct bladerf *dev, bladerf_module module,
unsigned int frequency)
{
int status;
uint32_t gpio;
uint32_t band;
if (frequency < BLADERF_FREQUENCY_MIN) {
frequency = BLADERF_FREQUENCY_MIN;
log_info("Clamping frequency to %u\n", frequency);
} else if (frequency > BLADERF_FREQUENCY_MAX) {
frequency = BLADERF_FREQUENCY_MAX;
log_info("Clamping frequency to %u\n", frequency);
}
band = (frequency >= BLADERF_BAND_HIGH) ? 1 : 2;
status = lms_select_band(dev, module, frequency);
if (status != 0) {
return status;
}
status = bladerf_config_gpio_read(dev, &gpio);
if (status != 0) {
return status;
}
gpio &= ~(module == BLADERF_MODULE_TX ? (3 << 3) : (3 << 5));
gpio |= (module == BLADERF_MODULE_TX ? (band << 3) : (band << 5));
return bladerf_config_gpio_write(dev, gpio);
}
int set_gpio(struct cli_state *state, int argc, char **argv)
{
/* set gpio <value> */
int rv = CLI_RET_OK;
int *err = &state->last_lib_error;
uint32_t val;
bool ok;
if (argc == 3) {
val = str2uint(argv[2], 0, UINT_MAX, &ok);
if (!ok) {
cli_err_nnl(state, argv[0], "Invalid gpio value (%s)\n", argv[2]);
rv = CLI_RET_INVPARAM;
} else {
rv = bladerf_config_gpio_write(state->dev, val);
if (rv != 0) {
*err = rv;
rv = CLI_RET_LIBBLADERF;
} else {
rv = print_gpio(state, argc, argv);
}
}
} else {
rv = CLI_RET_NARGS;
}
return rv;
}
int bladerf_init_device(struct bladerf *dev)
{
int status;
unsigned int actual;
uint32_t val;
/* Readback the GPIO values to see if they are default or already set */
status = bladerf_config_gpio_read( dev, &val );
if (status != 0) {
log_warning("Failed to read GPIO config, skipping device initialization: %s\n",
bladerf_strerror(status));
return 0;
}
if ((val&0x7f) == 0) {
log_verbose( "Default GPIO value found - initializing device\n" );
/* Set the GPIO pins to enable the LMS and select the low band */
bladerf_config_gpio_write( dev, 0x57 );
/* Disable the front ends */
lms_enable_rffe(dev, BLADERF_MODULE_TX, false);
lms_enable_rffe(dev, BLADERF_MODULE_RX, false);
/* Set the internal LMS register to enable RX and TX */
bladerf_lms_write( dev, 0x05, 0x3e );
/* LMS FAQ: Improve TX spurious emission performance */
bladerf_lms_write( dev, 0x47, 0x40 );
/* LMS FAQ: Improve ADC performance */
bladerf_lms_write( dev, 0x59, 0x29 );
/* LMS FAQ: Common mode voltage for ADC */
bladerf_lms_write( dev, 0x64, 0x36 );
/* LMS FAQ: Higher LNA Gain */
bladerf_lms_write( dev, 0x79, 0x37 );
/* Set a default saplerate */
bladerf_set_sample_rate( dev, BLADERF_MODULE_TX, 1000000, &actual );
bladerf_set_sample_rate( dev, BLADERF_MODULE_RX, 1000000, &actual );
/* Set a default frequency of 1GHz */
bladerf_set_frequency( dev, BLADERF_MODULE_TX, 1000000000 );
bladerf_set_frequency( dev, BLADERF_MODULE_RX, 1000000000 );
/* Set the calibrated VCTCXO DAC value */
bladerf_dac_write( dev, dev->dac_trim );
}
/* TODO: Read this return from the SPI calls */
return 0;
}
int bladerf_init_device(struct bladerf *dev)
{
unsigned int actual;
uint32_t val;
/* Readback the GPIO values to see if they are default or already set */
bladerf_config_gpio_read( dev, &val );
if (val == 0) {
log_verbose( "Default GPIO value found - initializing device\n" );
/* Set the GPIO pins to enable the LMS and select the low band */
bladerf_config_gpio_write( dev, 0x57 );
/* Set the internal LMS register to enable RX and TX */
bladerf_lms_write( dev, 0x05, 0x3e );
/* LMS FAQ: Improve TX spurious emission performance */
bladerf_lms_write( dev, 0x47, 0x40 );
/* LMS FAQ: Improve ADC performance */
bladerf_lms_write( dev, 0x59, 0x29 );
/* LMS FAQ: Common mode voltage for ADC */
bladerf_lms_write( dev, 0x64, 0x36 );
/* LMS FAQ: Higher LNA Gain */
bladerf_lms_write( dev, 0x79, 0x37 );
/* FPGA workaround: Set IQ polarity for RX */
bladerf_lms_write( dev, 0x5a, 0xa0 );
/* Set a default saplerate */
bladerf_set_sample_rate( dev, BLADERF_MODULE_TX, 1000000, &actual );
bladerf_set_sample_rate( dev, BLADERF_MODULE_RX, 1000000, &actual );
/* Enable TX and RX */
bladerf_enable_module( dev, BLADERF_MODULE_TX, false );
bladerf_enable_module( dev, BLADERF_MODULE_RX, false );
/* Set a default frequency of 1GHz */
bladerf_set_frequency( dev, BLADERF_MODULE_TX, 1000000000 );
bladerf_set_frequency( dev, BLADERF_MODULE_RX, 1000000000 );
/* Set the calibrated VCTCXO DAC value */
bladerf_dac_write( dev, dev->dac_trim );
}
/* TODO: Read this return from the SPI calls */
return 0;
}
