/*
* Set up the logical address filter.
*/
void
bmac_setladrf(struct bmac_softc *sc)
{
struct arpcom *ac = &sc->arpcom;
struct ifnet *ifp = &sc->arpcom.ac_if;
struct ether_multi *enm;
struct ether_multistep step;
u_int32_t crc;
u_int16_t hash[4];
int x;
/*
* Set up multicast address filter by passing all multicast addresses
* through a crc generator, and then using the high order 6 bits as an
* index into the 64 bit logical address filter. The high order bit
* selects the word, while the rest of the bits select the bit within
* the word.
*/
if (ifp->if_flags & IFF_PROMISC) {
bmac_set_bits(sc, RXCFG, RxPromiscEnable);
return;
}
if (ac->ac_multirangecnt > 0)
ifp->if_flags |= IFF_ALLMULTI;
if (ifp->if_flags & IFF_ALLMULTI) {
hash[3] = hash[2] = hash[1] = hash[0] = 0xffff;
goto chipit;
}
hash[3] = hash[2] = hash[1] = hash[0] = 0;
ETHER_FIRST_MULTI(step, ac, enm);
while (enm != NULL) {
crc = ether_crc32_le(enm->enm_addrlo, ETHER_ADDR_LEN);
/* Just want the 6 most significant bits. */
crc >>= 26;
/* Set the corresponding bit in the filter. */
hash[crc >> 4] |= 1 << (crc & 0xf);
ETHER_NEXT_MULTI(step, enm);
}
ifp->if_flags &= ~IFF_ALLMULTI;
chipit:
bmac_write_reg(sc, HASH0, hash[0]);
bmac_write_reg(sc, HASH1, hash[1]);
bmac_write_reg(sc, HASH2, hash[2]);
bmac_write_reg(sc, HASH3, hash[3]);
x = bmac_read_reg(sc, RXCFG);
x &= ~RxPromiscEnable;
x |= RxHashFilterEnable;
bmac_write_reg(sc, RXCFG, x);
}
void
bmac_mbo_write(struct device *dev, u_int32_t val)
{
struct bmac_softc *sc = (void *)dev;
bmac_write_reg(sc, MIFCSR, val);
}
void
bmac_stop(struct bmac_softc *sc)
{
struct ifnet *ifp = &sc->arpcom.ac_if;
int s;
s = splnet();
/* timeout */
timeout_del(&sc->sc_tick_ch);
mii_down(&sc->sc_mii);
/* Disable TX/RX. */
bmac_reset_bits(sc, TXCFG, TxMACEnable);
bmac_reset_bits(sc, RXCFG, RxMACEnable);
/* Disable all interrupts. */
bmac_write_reg(sc, INTDISABLE, NoEventsMask);
dbdma_stop(sc->sc_txdma);
dbdma_stop(sc->sc_rxdma);
ifp->if_flags &= ~(IFF_UP | IFF_RUNNING);
ifp->if_timer = 0;
splx(s);
}
void
bmac_mii_statchg(struct device *dev)
{
struct bmac_softc *sc = (void *)dev;
int x;
/* Update duplex mode in TX configuration */
x = bmac_read_reg(sc, TXCFG);
if ((IFM_OPTIONS(sc->sc_mii.mii_media_active) & IFM_FDX) != 0)
x |= TxFullDuplex;
else
x &= ~TxFullDuplex;
bmac_write_reg(sc, TXCFG, x);
#ifdef BMAC_DEBUG
printf("bmac_mii_statchg 0x%x\n",
IFM_OPTIONS(sc->sc_mii.mii_media_active));
#endif
}
/*
* Set up the logical address filter.
*/
void
bmac_setladrf(struct bmac_softc *sc)
{
struct ifnet *ifp = &sc->arpcom.ac_if;
struct ether_multi *enm;
struct ether_multistep step;
u_int32_t crc;
u_int16_t hash[4];
int x;
/*
* Set up multicast address filter by passing all multicast addresses
* through a crc generator, and then using the high order 6 bits as an
* index into the 64 bit logical address filter. The high order bit
* selects the word, while the rest of the bits select the bit within
* the word.
*/
if (ifp->if_flags & IFF_PROMISC) {
bmac_set_bits(sc, RXCFG, RxPromiscEnable);
return;
}
if (ifp->if_flags & IFF_ALLMULTI) {
hash[3] = hash[2] = hash[1] = hash[0] = 0xffff;
goto chipit;
}
hash[3] = hash[2] = hash[1] = hash[0] = 0;
ETHER_FIRST_MULTI(step, &sc->arpcom, enm);
while (enm != NULL) {
if (bcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) {
/*
* We must listen to a range of multicast addresses.
* For now, just accept all multicasts, rather than
* trying to set only those filter bits needed to match
* the range. (At this time, the only use of address
* ranges is for IP multicast routing, for which the
* range is big enough to require all bits set.)
*/
hash[3] = hash[2] = hash[1] = hash[0] = 0xffff;
ifp->if_flags |= IFF_ALLMULTI;
goto chipit;
}
crc = ether_crc32_le(enm->enm_addrlo, ETHER_ADDR_LEN);
/* Just want the 6 most significant bits. */
crc >>= 26;
/* Set the corresponding bit in the filter. */
hash[crc >> 4] |= 1 << (crc & 0xf);
ETHER_NEXT_MULTI(step, enm);
}
ifp->if_flags &= ~IFF_ALLMULTI;
chipit:
bmac_write_reg(sc, HASH0, hash[0]);
bmac_write_reg(sc, HASH1, hash[1]);
bmac_write_reg(sc, HASH2, hash[2]);
bmac_write_reg(sc, HASH3, hash[3]);
x = bmac_read_reg(sc, RXCFG);
x &= ~RxPromiscEnable;
x |= RxHashFilterEnable;
bmac_write_reg(sc, RXCFG, x);
}
void
bmac_init(struct bmac_softc *sc)
{
struct ifnet *ifp = &sc->arpcom.ac_if;
struct ether_header *eh;
caddr_t data;
int tb;
int i, bmcr;
u_short *p;
bmac_reset_chip(sc);
/* XXX */
bmcr = bmac_mii_readreg((struct device *)sc, 0, MII_BMCR);
bmcr &= ~BMCR_ISO;
bmac_mii_writereg((struct device *)sc, 0, MII_BMCR, bmcr);
bmac_write_reg(sc, RXRST, RxResetValue);
bmac_write_reg(sc, TXRST, TxResetBit);
/* Wait for reset completion. */
for (i = 1000; i > 0; i -= 10) {
if ((bmac_read_reg(sc, TXRST) & TxResetBit) == 0)
break;
delay(10);
}
if (i <= 0)
printf("%s: reset timeout\n", ifp->if_xname);
if (! (sc->sc_flags & BMAC_BMACPLUS))
bmac_set_bits(sc, XCVRIF, ClkBit|SerialMode|COLActiveLow);
tb = ppc_mftbl();
bmac_write_reg(sc, RSEED, tb);
bmac_set_bits(sc, XIFC, TxOutputEnable);
bmac_read_reg(sc, PAREG);
/* Reset various counters. */
bmac_write_reg(sc, NCCNT, 0);
bmac_write_reg(sc, NTCNT, 0);
bmac_write_reg(sc, EXCNT, 0);
bmac_write_reg(sc, LTCNT, 0);
bmac_write_reg(sc, FRCNT, 0);
bmac_write_reg(sc, LECNT, 0);
bmac_write_reg(sc, AECNT, 0);
bmac_write_reg(sc, FECNT, 0);
bmac_write_reg(sc, RXCV, 0);
/* Set tx fifo information. */
bmac_write_reg(sc, TXTH, 4); /* 4 octets before tx starts */
bmac_write_reg(sc, TXFIFOCSR, 0);
bmac_write_reg(sc, TXFIFOCSR, TxFIFOEnable);
/* Set rx fifo information. */
bmac_write_reg(sc, RXFIFOCSR, 0);
bmac_write_reg(sc, RXFIFOCSR, RxFIFOEnable);
/* Clear status register. */
bmac_read_reg(sc, STATUS);
bmac_write_reg(sc, HASH3, 0);
bmac_write_reg(sc, HASH2, 0);
bmac_write_reg(sc, HASH1, 0);
bmac_write_reg(sc, HASH0, 0);
/* Set MAC address. */
p = (u_short *)sc->arpcom.ac_enaddr;
bmac_write_reg(sc, MADD0, *p++);
bmac_write_reg(sc, MADD1, *p++);
bmac_write_reg(sc, MADD2, *p);
bmac_write_reg(sc, RXCFG,
RxCRCEnable | RxHashFilterEnable | RxRejectOwnPackets);
if (ifp->if_flags & IFF_PROMISC)
bmac_set_bits(sc, RXCFG, RxPromiscEnable);
bmac_init_dma(sc);
/* Configure Media. */
mii_mediachg(&sc->sc_mii);
/* Enable TX/RX */
bmac_set_bits(sc, RXCFG, RxMACEnable);
bmac_set_bits(sc, TXCFG, TxMACEnable);
bmac_write_reg(sc, INTDISABLE, NormalIntEvents);
ifp->if_flags |= IFF_RUNNING;
ifp->if_flags &= ~IFF_OACTIVE;
ifp->if_timer = 0;
data = sc->sc_txbuf;
eh = (struct ether_header *)data;
bzero(data, sizeof(*eh) + ETHERMIN);
bcopy(sc->arpcom.ac_enaddr, eh->ether_dhost, ETHER_ADDR_LEN);
bcopy(sc->arpcom.ac_enaddr, eh->ether_shost, ETHER_ADDR_LEN);
bmac_transmit_packet(sc, sc->sc_txbuf_pa, sizeof(*eh) + ETHERMIN);
bmac_start(ifp);
timeout_add_sec(&sc->sc_tick_ch, 1);
}
void
bmac_attach(struct device *parent, struct device *self, void *aux)
{
struct confargs *ca = aux;
struct bmac_softc *sc = (void *)self;
struct ifnet *ifp = &sc->arpcom.ac_if;
struct mii_data *mii = &sc->sc_mii;
u_char laddr[6];
int nseg, error;
timeout_set(&sc->sc_tick_ch, bmac_mii_tick, sc);
sc->sc_flags =0;
if (strcmp(ca->ca_name, "ethernet") == 0) {
sc->sc_flags |= BMAC_BMACPLUS;
}
ca->ca_reg[0] += ca->ca_baseaddr;
ca->ca_reg[2] += ca->ca_baseaddr;
ca->ca_reg[4] += ca->ca_baseaddr;
sc->sc_regs = (vaddr_t)mapiodev(ca->ca_reg[0], NBPG);
bmac_write_reg(sc, INTDISABLE, NoEventsMask);
if (OF_getprop(ca->ca_node, "local-mac-address", laddr, 6) == -1 &&
OF_getprop(ca->ca_node, "mac-address", laddr, 6) == -1) {
printf(": cannot get mac-address\n");
return;
}
bcopy(laddr, sc->arpcom.ac_enaddr, 6);
sc->sc_dmat = ca->ca_dmat;
sc->sc_txdma = mapiodev(ca->ca_reg[2], 0x100);
sc->sc_rxdma = mapiodev(ca->ca_reg[4], 0x100);
sc->sc_txdbdma = dbdma_alloc(sc->sc_dmat, BMAC_TXBUFS);
sc->sc_txcmd = sc->sc_txdbdma->d_addr;
sc->sc_rxdbdma = dbdma_alloc(sc->sc_dmat, BMAC_RXBUFS + 1);
sc->sc_rxcmd = sc->sc_rxdbdma->d_addr;
error = bus_dmamem_alloc(sc->sc_dmat, BMAC_BUFSZ,
PAGE_SIZE, 0, sc->sc_bufseg, 1, &nseg, BUS_DMA_NOWAIT);
if (error) {
printf(": cannot allocate buffers (%d)\n", error);
return;
}
error = bus_dmamem_map(sc->sc_dmat, sc->sc_bufseg, nseg,
BMAC_BUFSZ, &sc->sc_txbuf, BUS_DMA_NOWAIT);
if (error) {
printf(": cannot map buffers (%d)\n", error);
bus_dmamem_free(sc->sc_dmat, sc->sc_bufseg, 1);
return;
}
error = bus_dmamap_create(sc->sc_dmat, BMAC_BUFSZ, 1, BMAC_BUFSZ, 0,
BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, &sc->sc_bufmap);
if (error) {
printf(": cannot create buffer dmamap (%d)\n", error);
bus_dmamem_unmap(sc->sc_dmat, sc->sc_txbuf, BMAC_BUFSZ);
bus_dmamem_free(sc->sc_dmat, sc->sc_bufseg, 1);
return;
}
error = bus_dmamap_load(sc->sc_dmat, sc->sc_bufmap, sc->sc_txbuf,
BMAC_BUFSZ, NULL, BUS_DMA_NOWAIT);
if (error) {
printf(": cannot load buffers dmamap (%d)\n", error);
bus_dmamap_destroy(sc->sc_dmat, sc->sc_bufmap);
bus_dmamem_unmap(sc->sc_dmat, sc->sc_txbuf, BMAC_BUFSZ);
bus_dmamem_free(sc->sc_dmat, sc->sc_bufseg, nseg);
return;
}
sc->sc_txbuf_pa = sc->sc_bufmap->dm_segs->ds_addr;
sc->sc_rxbuf = sc->sc_txbuf + BMAC_BUFLEN * BMAC_TXBUFS;
sc->sc_rxbuf_pa = sc->sc_txbuf_pa + BMAC_BUFLEN * BMAC_TXBUFS;
printf(" irq %d,%d: address %s\n", ca->ca_intr[0], ca->ca_intr[2],
ether_sprintf(laddr));
mac_intr_establish(parent, ca->ca_intr[0], IST_LEVEL, IPL_NET,
bmac_intr, sc, sc->sc_dev.dv_xname);
mac_intr_establish(parent, ca->ca_intr[2], IST_LEVEL, IPL_NET,
bmac_rint, sc, sc->sc_dev.dv_xname);
bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ);
ifp->if_softc = sc;
ifp->if_ioctl = bmac_ioctl;
ifp->if_start = bmac_start;
ifp->if_flags =
IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST;
ifp->if_watchdog = bmac_watchdog;
IFQ_SET_READY(&ifp->if_snd);
mii->mii_ifp = ifp;
mii->mii_readreg = bmac_mii_readreg;
mii->mii_writereg = bmac_mii_writereg;
mii->mii_statchg = bmac_mii_statchg;
ifmedia_init(&mii->mii_media, 0, bmac_mediachange, bmac_mediastatus);
mii_attach(&sc->sc_dev, mii, 0xffffffff, MII_PHY_ANY,
MII_OFFSET_ANY, 0);
/* Choose a default media. */
if (LIST_FIRST(&mii->mii_phys) == NULL) {
ifmedia_add(&mii->mii_media, IFM_ETHER|IFM_10_T, 0, NULL);
ifmedia_set(&mii->mii_media, IFM_ETHER|IFM_10_T);
} else
ifmedia_set(&mii->mii_media, IFM_ETHER|IFM_AUTO);
bmac_reset_chip(sc);
if_attach(ifp);
ether_ifattach(ifp);
}
void
bmac_reset_bits(struct bmac_softc *sc, int off, int val)
{
bmac_write_reg(sc, off, bmac_read_reg(sc, off) & ~val);
}
void
bmac_set_bits(struct bmac_softc *sc, int off, int val)
{
val |= bmac_read_reg(sc, off);
bmac_write_reg(sc, off, val);
}
void
bmac_attach(struct device *parent, struct device *self, void *aux)
{
struct confargs *ca = aux;
struct bmac_softc *sc = (void *)self;
struct ifnet *ifp = &sc->sc_if;
struct mii_data *mii = &sc->sc_mii;
u_char laddr[6];
callout_init(&sc->sc_tick_ch, 0);
sc->sc_flags =0;
if (strcmp(ca->ca_name, "ethernet") == 0) {
char name[64];
memset(name, 0, 64);
OF_package_to_path(ca->ca_node, name, sizeof(name));
OF_open(name);
sc->sc_flags |= BMAC_BMACPLUS;
}
ca->ca_reg[0] += ca->ca_baseaddr;
ca->ca_reg[2] += ca->ca_baseaddr;
ca->ca_reg[4] += ca->ca_baseaddr;
sc->sc_iot = ca->ca_tag;
if (bus_space_map(sc->sc_iot, ca->ca_reg[0], ca->ca_reg[1], 0,
&sc->sc_ioh) != 0) {
aprint_error(": couldn't map %#x", ca->ca_reg[0]);
return;
}
bmac_write_reg(sc, INTDISABLE, NoEventsMask);
if (OF_getprop(ca->ca_node, "local-mac-address", laddr, 6) == -1 &&
OF_getprop(ca->ca_node, "mac-address", laddr, 6) == -1) {
printf(": cannot get mac-address\n");
return;
}
memcpy(sc->sc_enaddr, laddr, 6);
sc->sc_txdma = mapiodev(ca->ca_reg[2], PAGE_SIZE);
sc->sc_rxdma = mapiodev(ca->ca_reg[4], PAGE_SIZE);
sc->sc_txcmd = dbdma_alloc(BMAC_TXBUFS * sizeof(dbdma_command_t));
sc->sc_rxcmd = dbdma_alloc((BMAC_RXBUFS + 1) * sizeof(dbdma_command_t));
sc->sc_txbuf = malloc(BMAC_BUFLEN * BMAC_TXBUFS, M_DEVBUF, M_NOWAIT);
sc->sc_rxbuf = malloc(BMAC_BUFLEN * BMAC_RXBUFS, M_DEVBUF, M_NOWAIT);
if (sc->sc_txbuf == NULL || sc->sc_rxbuf == NULL ||
sc->sc_txcmd == NULL || sc->sc_rxcmd == NULL) {
printf("cannot allocate memory\n");
return;
}
printf(" irq %d,%d: address %s\n", ca->ca_intr[0], ca->ca_intr[2],
ether_sprintf(laddr));
intr_establish(ca->ca_intr[0], IST_EDGE, IPL_NET, bmac_intr, sc);
intr_establish(ca->ca_intr[2], IST_EDGE, IPL_NET, bmac_rint, sc);
memcpy(ifp->if_xname, sc->sc_dev.dv_xname, IFNAMSIZ);
ifp->if_softc = sc;
ifp->if_ioctl = bmac_ioctl;
ifp->if_start = bmac_start;
ifp->if_flags =
IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST;
ifp->if_watchdog = bmac_watchdog;
IFQ_SET_READY(&ifp->if_snd);
mii->mii_ifp = ifp;
mii->mii_readreg = bmac_mii_readreg;
mii->mii_writereg = bmac_mii_writereg;
mii->mii_statchg = bmac_mii_statchg;
sc->sc_ethercom.ec_mii = mii;
ifmedia_init(&mii->mii_media, 0, ether_mediachange, ether_mediastatus);
mii_attach(&sc->sc_dev, mii, 0xffffffff, MII_PHY_ANY,
MII_OFFSET_ANY, 0);
/* Choose a default media. */
if (LIST_FIRST(&mii->mii_phys) == NULL) {
ifmedia_add(&mii->mii_media, IFM_ETHER|IFM_10_T, 0, NULL);
ifmedia_set(&mii->mii_media, IFM_ETHER|IFM_10_T);
} else
ifmedia_set(&mii->mii_media, IFM_ETHER|IFM_AUTO);
bmac_reset_chip(sc);
if_attach(ifp);
ether_ifattach(ifp, sc->sc_enaddr);
}
static inline void
bmac_reset_bits(struct bmac_softc *sc, bus_size_t off, uint16_t val)
{
bmac_write_reg(sc, off, bmac_read_reg(sc, off) & ~val);
}
