void stm32_boardinitialize(void)
{
/* Set start-up board voltage */
board_power_init();
vsn_muxbus_init();
/* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak function
* stm32_spiinitialize() has been brought into the link.
*/
#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2) || defined(CONFIG_STM32_SPI3)
if (stm32_spiinitialize) stm32_spiinitialize();
#endif
/* Initialize USB is 1) USBDEV is selected, 2) the USB controller is not
* disabled, and 3) the weak function stm32_usbinitialize() has been brought
* into the build.
*/
#if defined(CONFIG_USBDEV) && defined(CONFIG_STM32_USB)
if (stm32_usbinitialize) stm32_usbinitialize();
#endif
/* Configure on-board LEDs if LED support has been selected. */
#ifdef CONFIG_ARCH_LEDS
up_ledinit();
#endif
}
int board_early_init_f(void)
{
wdt_stop();
pmic_reset();
board_clock_init();
board_uart_init();
board_power_init();
return 0;
}
/*
* board_console_init()
*
* Add the console device and set it to be the primary
* console.
*
* Input parameters:
* nothing
*
* Return value:
* nothing
*/
void
board_console_init(void)
{
#if !CFG_MINIMAL_SIZE
cfe_set_console(CFE_BUFFER_CONSOLE);
#endif
/* Initialize SB access */
sih = si_kattach(SI_OSH);
ASSERT(sih);
/* Set this to a default value, since nvram_reset needs to use it in OSL_DELAY */
board_cfe_cpu_speed_upd(sih);
#if !CFG_SIM
board_pinmux_init(sih);
/* Check whether NVRAM reset needs be done */
if (nvram_reset((void *)sih) > 0)
restore_defaults = 1;
#endif
/*
* init gpio mode for leds and reset button
*/
recovery_button_init();
leds_gpio_init();
/* Initialize NVRAM access accordingly. In case of invalid NVRAM, load defaults */
if (nvram_init((void *)sih) > 0)
restore_defaults = 1;
#if CFG_SIM
restore_defaults = 0;
#else /* !CFG_SIM */
if (!restore_defaults)
board_clock_init(sih);
board_power_init(sih);
#endif /* !CFG_SIM */
board_cpu_init(sih);
/* Initialize UARTs */
si_serial_init(sih, board_console_add);
if (cfe_finddev("uart0"))
cfe_set_console("uart0");
}
/*
* board_console_init()
*
* Add the console device and set it to be the primary
* console.
*
* Input parameters:
* nothing
*
* Return value:
* nothing
*/
void
board_console_init(void)
{
#if !CFG_MINIMAL_SIZE
cfe_set_console(CFE_BUFFER_CONSOLE);
#endif
/* Initialize SB access */
sih = si_kattach(SI_OSH);
ASSERT(sih);
/* Set this to a default value, since nvram_reset needs to use it in OSL_DELAY */
board_cfe_cpu_speed_upd(sih);
#if !CFG_SIM
board_pinmux_init(sih);
/* Check whether NVRAM reset needs be done */
if (nvram_reset((void *)sih) > 0)
restore_defaults = 1;
#endif
/* Initialize NVRAM access accordingly. In case of invalid NVRAM, load defaults */
if (nvram_init((void *)sih) > 0)
restore_defaults = 1;
#if CFG_SIM
restore_defaults = 0;
#else /* !CFG_SIM */
if (!restore_defaults)
board_clock_init(sih);
board_power_init(sih);
#endif /* !CFG_SIM */
board_cpu_init(sih);
/* Initialize UARTs */
si_serial_init(sih, board_console_add);
if (cfe_finddev("uart0"))
cfe_set_console("uart0");
printf("Detect CPU turbo button... ");
detect_turbo_button();
if (cpu_turbo_mode && atoi(nvram_safe_get("btn_led_mode")))
board_clock_init(sih);
}