static void mainboard_init(device_t dev)
{
char **vpd_region_ptr = NULL;
u32 search_length = find_fmap_entry("RO_VPD", (void **)vpd_region_ptr);
u32 search_address = (unsigned long)(*vpd_region_ptr);
u16 io_base = 0;
struct device *ethernet_dev = NULL;
/* Initialize the Embedded Controller */
butterfly_ec_init();
/* Program EC Keyboard locale based on VPD data */
program_keyboard_type(search_address, search_length);
/* Get NIC's IO base address */
ethernet_dev = dev_find_device(BUTTERFLY_NIC_VENDOR_ID,
BUTTERFLY_NIC_DEVICE_ID, dev);
if (ethernet_dev != NULL) {
io_base = pci_read_config16(ethernet_dev, 0x10) & 0xfffe;
/*
* Battery life time - LAN PCIe should enter ASPM L1 to save
* power when LAN connection is idle.
* enable CLKREQ: LAN pci config space 0x81h=01
*/
pci_write_config8(ethernet_dev, 0x81, 0x01);
}
if (io_base) {
/* Program MAC address based on VPD data */
program_mac_address(io_base, search_address, search_length);
/*
* Program NIC LEDS
*
* RTL8105E Series EEPROM-Less Application Note,
* Section 5.6 LED Mode Configuration
*
* Step1: Write C0h to I/O register 0x50 via byte access to
* disable 'register protection'
* Step2: Write xx001111b to I/O register 0x52 via byte access
* (bit7 is LEDS1 and bit6 is LEDS0)
* Step3: Write 0x00 to I/O register 0x50 via byte access to
* enable 'register protection'
*/
outb(0xc0, io_base + 0x50); /* Disable protection */
outb((BUTTERFLY_NIC_LED_MODE << 6) | 0x0f, io_base + 0x52);
outb(0x00, io_base + 0x50); /* Enable register protection */
}
}
static void mainboard_init(device_t dev)
{
u32 search_address = 0x0;
size_t search_length = -1;
u16 io_base = 0;
struct device *ethernet_dev = NULL;
void *vpd_file;
if (IS_ENABLED(CONFIG_CHROMEOS)) {
struct region_device rdev;
if (fmap_locate_area_as_rdev("RO_VPD", &rdev) == 0) {
vpd_file = rdev_mmap_full(&rdev);
if (vpd_file != NULL) {
search_length = region_device_sz(&rdev);
search_address = (uintptr_t)vpd_file;
}
}
} else {
vpd_file = cbfs_boot_map_with_leak("vpd.bin", CBFS_TYPE_RAW,
&search_length);
if (vpd_file) {
search_address = (unsigned long)vpd_file;
} else {
search_length = -1;
search_address = 0;
}
}
/* Initialize the Embedded Controller */
butterfly_ec_init();
/* Program EC Keyboard locale based on VPD data */
program_keyboard_type(search_address, search_length);
/* Get NIC's IO base address */
ethernet_dev = dev_find_device(BUTTERFLY_NIC_VENDOR_ID,
BUTTERFLY_NIC_DEVICE_ID, dev);
if (ethernet_dev != NULL) {
io_base = pci_read_config16(ethernet_dev, 0x10) & 0xfffe;
/*
* Battery life time - LAN PCIe should enter ASPM L1 to save
* power when LAN connection is idle.
* enable CLKREQ: LAN pci config space 0x81h=01
*/
pci_write_config8(ethernet_dev, 0x81, 0x01);
}
if (io_base) {
/* Program MAC address based on VPD data */
program_mac_address(io_base, search_address, search_length);
/*
* Program NIC LEDS
*
* RTL8105E Series EEPROM-Less Application Note,
* Section 5.6 LED Mode Configuration
*
* Step1: Write C0h to I/O register 0x50 via byte access to
* disable 'register protection'
* Step2: Write xx001111b to I/O register 0x52 via byte access
* (bit7 is LEDS1 and bit6 is LEDS0)
* Step3: Write 0x00 to I/O register 0x50 via byte access to
* enable 'register protection'
*/
outb(0xc0, io_base + 0x50); /* Disable protection */
outb((BUTTERFLY_NIC_LED_MODE << 6) | 0x0f, io_base + 0x52);
outb(0x00, io_base + 0x50); /* Enable register protection */
}
}