// CLASS METHOD: Interpreter::exec_load_store_instr()
// PURPOSE: Load/store instructions move data between memory and the
// general registers. They are all encoded as "I-Type"
// instructions, and the only addressing mode implemented is base
// register plus signed, immediate offset. This directly enables
// the use of three distinct addressing modes: register plus
// offset; register direct; and immediate.
//
// ARGUMENTS: None.
// RETURNS: None.
void
Interpreter::exec_load_store_instr(void)
{
Word vaddr, paddr;
switch (op(curr_instr))
{
// LB -- Load Byte
//
// Sign-extend 16-bit `offset` and add to contents of register `base` to
// form address. Sign-extend contents of addressed byte and load into
// `rt`.
case LB:
vaddr = gpr[base(curr_instr)] + sign_ext(curr_instr);
paddr = translate_address(align(vaddr));
do_load(LOADREG, rt(curr_instr), sign_ext_byte(mem->read(vaddr, paddr), bytepos(vaddr)));
break;
// LBU -- Load Byte Unsigned
//
// Sign-extend 16-bit `offse` and add to contents of register `base` to
// form address. Zero-extend contents of addressed byte and load into
// `rt`.
case LBU:
vaddr = gpr[base(curr_instr)] + sign_ext(curr_instr);
paddr = translate_address(align(vaddr));
do_load(LOADREG, rt(curr_instr), zero_ext_byte(mem->read(vaddr, paddr), bytepos(vaddr)));
break;
// LH -- Load Halfword
//
// Sign-extend 16-bit `offset` and add to contents of register `base` to
// form address. Sign-extend contents of addressed byte and load into
// `rt`.
case LH:
vaddr = gpr[base(curr_instr)] + sign_ext(curr_instr);
paddr = translate_address(align(vaddr));
do_load(LOADREG, rt(curr_instr), sign_ext_hword(mem->read(vaddr, paddr), hwordpos(vaddr)));
break;
// LHU -- Load Halfword Unsigned
//
// Sign-extend 16-bit `offset` and add to contents of register `base` to
// form address. Zero-extend contents of addressed byte and load into
// `rt`.
case LHU:
vaddr = gpr[base(curr_instr)] + sign_ext(curr_instr);
paddr = translate_address(align(vaddr));
do_load(LOADREG, rt(curr_instr), zero_ext_hword(mem->read(vaddr, paddr), hwordpos(vaddr)));
break;
// LW -- Load Word
//
// Sign-extend 16-bit `offset` and add to contents of register `base` to
// form address. Load contents of addressed word into register `rt`.
case LW:
vaddr = gpr[base(curr_instr)] + sign_ext(curr_instr);
paddr = translate_address(align(vaddr));
do_load(LOADREG, rt(curr_instr), mem->read(vaddr, paddr));
break;
// LWL -- Load Word Left
//
// Sign-extend 16-bit `offset` and add to contents of register `base` to
// form address. Shift addressed word left so that addressed byte is
// leftmost byte of a word. Merge bytes from memory with contents of
// register `rt` and load result into register `rt`.
case LWL:
vaddr = gpr[base(curr_instr)] + sign_ext(curr_instr);
paddr = translate_address(align(vaddr));
do_load(LOADREG, rt(curr_instr), merge(gpr[rt(curr_instr)], mem->read(vaddr, paddr), bytepos(vaddr), true));
break;
// LWR -- Load Word Right
//
// Sign-extend 16-bit `offset` and add to contents of register `base` to
// form address. Shfit addressed word right so that addressed byte is
// rightmost byte of a word. Merge bytes from memory with contents of
// register `rt` and load result into register `rt`.
case LWR:
vaddr = gpr[base(curr_instr)] + sign_ext(curr_instr);
paddr = translate_address(align(vaddr));
do_load(LOADREG, rt(curr_instr), merge(gpr[rt(curr_instr)], mem->read(vaddr, paddr), bytepos(vaddr), false));
break;
// SB -- Store Byte
//
// Sign-extend 16-bit `offset` and add to contents of register `base` to
// form address. Store least significant byte of register `rt` at
// addressed location.
}
}
static void mdm_data_process_single_channel(void)
{
s32 offset = 0;
s32 data_len = 0;
char* substr;
char len_buf[8] = {0};
char tmp[64];
//eat_trace("L%d offset=%d, w_offset=%d r_offset=%d total=%d",__LINE__, offset, w_offset, r_offset,g_data_counter );
while(w_offset!=r_offset)
{
if(w_offset>r_offset)
{
substr = "+IPD,";
offset = bytepos(&g_buf[r_offset],w_offset-r_offset, substr , 0);
eat_trace("L%d offset=%d, w_offset=%d r_offset=%d total=%d",__LINE__, offset, w_offset, r_offset,g_data_counter );
if(offset != -1)
{
r_offset += offset+5; //+IPD,400:data
substr = ":";
offset = bytepos(&g_buf[r_offset],w_offset-r_offset, substr, 0);
eat_trace("L%d offset=%d, w_offset=%d r_offset=%d",__LINE__, offset, w_offset, r_offset);
memset(tmp,0,64);
if(offset != -1)
{
memset(len_buf,0,8);
memcpy(len_buf, &g_buf[r_offset], offset);
data_len = atoi(len_buf);
r_offset += offset+1; //:
eat_trace("L%d datalen=%d last_len=%d",__LINE__,data_len, w_offset-r_offset);
memset(tmp,0,64);
if(data_len<w_offset-r_offset)
{
//两个数据包在一起处理
//eat_uart_write(eat_uart_app, &g_buf[r_offset], data_len);
r_offset += data_len;
g_data_counter += data_len;
sprintf(tmp, "RECV:%d,%d\r\n",g_data_counter, data_len);
eat_uart_write(eat_uart_app, tmp, strlen(tmp));
eat_trace("L%d total=%d", __LINE__,g_data_counter );
continue;
}else if( data_len == w_offset-r_offset)
{
//eat_uart_write(eat_uart_app, &g_buf[r_offset], data_len);
g_data_counter += data_len;
sprintf(tmp, "RECV:%d,%d\r\n",g_data_counter, data_len);
eat_uart_write(eat_uart_app, tmp, strlen(tmp));
eat_trace("L%d total=%d", __LINE__,g_data_counter );
r_offset = 0;
w_offset = 0;
}
else
{
eat_trace("L%d calc data len ERROR!!!! w_offset=%d, r_offset=%d",__LINE__,w_offset,r_offset);
eat_trace("last data=%s",&g_buf[r_offset+data_len]);
w_offset=0;
r_offset=0;
}
}else
{
eat_trace("L%d finds tring ERROR!!!! w_offset=%d, r_offset=%d",__LINE__,w_offset,r_offset);
w_offset=0;
r_offset=0;
}
}else
{
r_offset = 0;
w_offset = 0;
}
}else
{
eat_trace("L%d w_offset=%d, r_offset=%d",__LINE__,w_offset,r_offset);
}
}
}
