void uart_init(void)
{
/* finish uart init to get rx going */
cbuf_initialize(&uart_rx_buf, 16);
register_int_handler(0x24, uart_irq_handler, NULL);
unmask_interrupt(0x24);
outp(uart_io_port + 1, 0x1); // enable receive data available interrupt
}
void stellaris_debug_init(void)
{
cbuf_initialize(&debug_rx_buf, 16);
/* Enable the UART interrupt. */
UARTIntEnable(DEBUG_UART, UART_INT_RX | UART_INT_RT);
NVIC_EnableIRQ(INT_UART0 - 16);
}
static void usart_init1(USART_TypeDef *usart, int irqn, cbuf_t *rxbuf, size_t rxsize)
{
cbuf_initialize(rxbuf, rxsize);
/* Enable the UART Parity Error Interrupt */
__HAL_UART_ENABLE_IT(&handle, UART_IT_PE);
/* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */
__HAL_UART_ENABLE_IT(&handle, UART_IT_ERR);
/* Enable the UART Data Register not empty Interrupt */
__HAL_UART_ENABLE_IT(&handle, UART_IT_RXNE);
HAL_NVIC_EnableIRQ(USART1_IRQn);
}
static void imx_uart_init(const void* driver_data, uint32_t length) {
uint32_t regVal;
// create circular buffer to hold received data
cbuf_initialize(&uart_rx_buf, RXBUF_SIZE);
// register uart irq
register_int_handler(uart_irq, &uart_irq_handler, NULL);
// set rx fifo threshold to 1 character
regVal = UARTREG(MX8_UFCR);
regVal &= ~UFCR_RXTL(UFCR_MASK);
regVal &= ~UFCR_TXTL(UFCR_MASK);
regVal |= UFCR_RXTL(1);
regVal |= UFCR_TXTL(0x2);
UARTREG(MX8_UFCR) = regVal;
// enable rx interrupt
regVal = UARTREG(MX8_UCR1);
regVal |= UCR1_RRDYEN;
if (dlog_bypass() == false) {
// enable tx interrupt
regVal |= UCR1_TRDYEN;
}
UARTREG(MX8_UCR1) = regVal;
// enable rx and tx transmisster
regVal = UARTREG(MX8_UCR2);
regVal |= UCR2_RXEN | UCR2_TXEN;
UARTREG(MX8_UCR2) = regVal;
if (dlog_bypass() == true) {
uart_tx_irq_enabled = false;
} else {
/* start up tx driven output */
printf("UART: started IRQ driven TX\n");
uart_tx_irq_enabled = true;
}
initialized = true;
// enable interrupts
unmask_interrupt(uart_irq);
}
void sam_debug_init(void)
{
cbuf_initialize(&debug_rx_buf, 16);
NVIC_EnableIRQ(UART_IRQn);
uart_enable_interrupt(UART, UART_IER_RXRDY);
}
