void m6502_set_reg (int regnum, unsigned val)
{
switch( regnum )
{
case REG_PC: PCW = val; change_pc16(PCD); break;
case M6502_PC: m6502.pc.w.l = val; break;
case REG_SP: S = val; break;
case M6502_S: m6502.sp.b.l = val; break;
case M6502_P: m6502.p = val; break;
case M6502_A: m6502.a = val; break;
case M6502_X: m6502.x = val; break;
case M6502_Y: m6502.y = val; break;
case M6502_EA: m6502.ea.w.l = val; break;
case M6502_ZP: m6502.zp.w.l = val; break;
case M6502_NMI_STATE: m6502_set_irq_line( IRQ_LINE_NMI, val ); break;
case M6502_IRQ_STATE: m6502_set_irq_line( 0, val ); break;
case M6502_SO_STATE: m6502_set_irq_line( M6502_SET_OVERFLOW, val ); break;
default:
if( regnum <= REG_SP_CONTENTS )
{
unsigned offset = S + 2 * (REG_SP_CONTENTS - regnum);
if( offset < 0x1ff )
{
WRMEM( offset, val & 0xfff );
WRMEM( offset + 1, (val >> 8) & 0xff );
}
}
void s2650_set_reg(int regnum, unsigned val)
{
switch( regnum )
{
case REG_PC:
S.page = val & PAGE;
S.iar = val & PMSK;
change_pc16(S.page + S.iar);
break;
case S2650_PC: S.page = val & PAGE; S.iar = val & PMSK; break;
case REG_SP: S.psu = (S.psu & ~SP) | (val & SP); break;
case S2650_PS: S.psl = val & 0xff; S.psu = val >> 8; break;
case S2650_R0: S.reg[0] = val; break;
case S2650_R1: S.reg[1] = val; break;
case S2650_R2: S.reg[2] = val; break;
case S2650_R3: S.reg[3] = val; break;
case S2650_R1A: S.reg[4] = val; break;
case S2650_R2A: S.reg[5] = val; break;
case S2650_R3A: S.reg[6] = val; break;
case S2650_HALT: S.halt = val; break;
case S2650_IRQ_STATE: s2650_set_irq_line(0, val); break;
case S2650_SI: s2650_set_sense(val); break;
case S2650_FO: s2650_set_flag(val); break;
default:
if( regnum <= REG_SP_CONTENTS )
{
unsigned offset = (REG_SP_CONTENTS - regnum);
if( offset < 8 )
S.ras[offset] = val;
}
}
}
void konami_set_reg(int regnum, unsigned val)
{
switch( regnum )
{
case REG_PC:
case KONAMI_PC: PC = val; change_pc16(PC); break;
case REG_SP:
case KONAMI_S: S = val; break;
case KONAMI_CC: CC = val; CHECK_IRQ_LINES; break;
case KONAMI_U: U = val; break;
case KONAMI_A: A = val; break;
case KONAMI_B: B = val; break;
case KONAMI_X: X = val; break;
case KONAMI_Y: Y = val; break;
case KONAMI_DP: DP = val; break;
case KONAMI_NMI_STATE: konami.nmi_state = val; break;
case KONAMI_IRQ_STATE: konami.irq_state[KONAMI_IRQ_LINE] = val; break;
case KONAMI_FIRQ_STATE: konami.irq_state[KONAMI_FIRQ_LINE] = val; break;
default:
if( regnum <= REG_SP_CONTENTS )
{
unsigned offset = S + 2 * (REG_SP_CONTENTS - regnum);
if( offset < 0xffff )
{
WM( offset, (val >> 8) & 0xff );
WM( offset+1, val & 0xff );
}
}
void CZ80_FASTCALL Cz80_Set_PC(cz80_struc *cpu, u32 val)
{
#ifdef CZ80_USE_MAME_CHANGE_PC
change_pc16(val);
#endif
cpu->PC = (u8*)&mame4all_cz80_rom[val];
}
/****************************************************************************
* Set all registers to given values
****************************************************************************/
void konami_set_context(void *src)
{
if( src )
konami = *(konami_Regs*)src;
change_pc16(PC); /* TS 971002 */
CHECK_IRQ_LINES;
}
void m6502_set_context (void *src)
{
if( src )
{
m6502 = *(m6502_Regs*)src;
change_pc16(PCD);
}
}
INLINE void M_CALL(UINT16 addr)
{
push(R.PC.b.l);
push((R.PC.b.h & 0x0f) | (R.PSW & 0xf0));
R.PC.w.l = addr;
#ifdef MESS
change_pc16(addr);
#endif
}
void s2650_set_context(void *src)
{
if( src )
{
S = *(s2650_Regs*)src;
S.page = S.page & PAGE;
S.iar = S.iar & PMSK;
change_pc16(S.page + S.iar);
}
}
static void jmp(void)
{
UINT8 i=M_RDOP(R.PC.w.l);
UINT16 oldpc,newpc;
oldpc = R.PC.w.l-1;
R.PC.w.l = i | R.A11;
#ifdef MESS
change_pc16(R.PC.w.l);
#endif
newpc = R.PC.w.l;
if (newpc == oldpc) { if (i8039_ICount > 0) i8039_ICount = 0; } /* speed up busy loop */
else if (newpc == oldpc-1 && M_RDOP(newpc) == 0x00) /* NOP - Gyruss */
{ if (i8039_ICount > 0) i8039_ICount = 0; }
}
void m6502_reset(void *param)
{
m6502.subtype = SUBTYPE_6502;
m6502.insn = insn6502;
/* wipe out the rest of the m6502 structure */
/* read the reset vector into PC */
PCL = RDMEM(M6502_RST_VEC);
PCH = RDMEM(M6502_RST_VEC+1);
m6502.sp.d = 0x0100 | (m6502.sp.b.l); /* stack pointer (always 100 - 1FF) */
m6502.p = F_T|F_I|F_Z; /* set T, I and Z flags */
m6502.pending_irq = 0; /* nonzero if an IRQ is pending */
m6502.after_cli = 0; /* pending IRQ and last insn cleared I */
m6502.irq_callback = NULL;
change_pc16(PCD);
}
void m6502_reset(void *param)
{
/* wipe out the rest of the m6502 structure */
/* read the reset vector into PC */
PCL = RDMEM(M6502_RST_VEC);
PCH = RDMEM(M6502_RST_VEC+1);
m6502.sp.d = 0x01ff; /* stack pointer starts at page 1 offset FF */
m6502.p = F_T|F_I|F_Z|F_B|(P&F_D); /* set T, I and Z flags */
m6502.pending_irq = 0; /* nonzero if an IRQ is pending */
m6502.after_cli = 0; /* pending IRQ and last insn cleared I */
m6502.irq_callback = NULL;
m6502.irq_state = 0;
m6502.nmi_state = 0;
change_pc16(PCD);
}
void m65ce02_reset (void *param)
{
c65_map=(void(*)(int a, int x, int y, int z))param;
m65ce02.insn = insn65ce02;
/* wipe out the rest of the m65ce02 structure */
/* read the reset vector into PC */
/* reset z index and b bank */
PCL = RDMEM(M65CE02_RST_VEC);
PCH = RDMEM(M65CE02_RST_VEC+1);
m65ce02.sp.d = 0x01ff;
m65ce02.p = F_T|F_I|F_Z; /* set T, I and Z flags */
m65ce02.pending_irq = 0; /* nonzero if an IRQ is pending */
m65ce02.after_cli = 0; /* pending IRQ and last insn cleared I */
m65ce02.irq_callback = NULL;
change_pc16(PCD);
}
static void retr(void)
{
UINT8 i=pull();
R.PC.w.l = ((i & 0x0f) << 8) | pull();
#ifdef MESS
change_pc16(R.PC.w.l);
#endif
// R.A11 = R.A11ff; /* NS990113 */
R.PSW = (R.PSW & 0x0f) | (i & 0xf0); /* Stack is already changed by pull */
regPTR = ((M_By) ? 24 : 0);
R.irq_executing = I8039_NO_INT;
/* Take an interrupt if a request is still being made */
if (R.irq_state == I8039_EXTERNAL_INT) {
R.irq_extra_cycles += Ext_IRQ(); /* Service External IRQ */
}
else if (R.pending_irq == I8039_TIMCNT_INT) {
R.irq_extra_cycles += Timer_IRQ(); /* Service pending Timer/Counter IRQ */
}
}
static void jmp_7(void) { UINT8 i=M_RDOP(R.PC.w.l); R.PC.w.l = i | 0x700 | R.A11; change_pc16(R.PC.w.l); }
/****************************************************************************
* Set program counter
****************************************************************************/
void konami_set_pc(unsigned val)
{
PC = val;
change_pc16(PC);
}
static void jmpp_xa(void) { UINT16 addr = (R.PC.w.l & 0xf00) | R.A; R.PC.w.l = (R.PC.w.l & 0xf00) | M_RDMEM(addr); change_pc16(R.PC.w.l); }
static void jni(void) { UINT8 i=M_RDMEM_OPCODE(); if (R.irq_state == I8039_EXTERNAL_INT) { R.PC.w.l = ((R.PC.w.l-1) & 0xf00) | i; change_pc16(R.PC.w.l); } else ADJUST_CYCLES }
static void jt_1(void) { UINT8 i=M_RDMEM_OPCODE(); if (test_r(1)) { R.PC.w.l = ((R.PC.w.l-1) & 0xf00) | i; change_pc16(R.PC.w.l); } else ADJUST_CYCLES }
static void djnz_r7(void) { UINT8 i=M_RDMEM_OPCODE(); R7--; if (R7 != 0) { R.PC.w.l = ((R.PC.w.l-1) & 0xf00) | i; change_pc16(R.PC.w.l); } else ADJUST_CYCLES }
static void ret(void) { R.PC.w.l = ((pull() & 0x0f) << 8); R.PC.w.l |= pull(); change_pc16(R.PC.w.l); }
static void jtf(void) { UINT8 i=M_RDMEM_OPCODE(); if (R.t_flag) { R.PC.w.l = ((R.PC.w.l-1) & 0xf00) | i; change_pc16(R.PC.w.l); R.t_flag = 0; } else ADJUST_CYCLES }
static void jz(void) { UINT8 i=M_RDMEM_OPCODE(); if (R.A == 0) { R.PC.w.l = ((R.PC.w.l-1) & 0xf00) | i; change_pc16(R.PC.w.l); } else ADJUST_CYCLES }
