Example #1
0
void
vec4_generator::generate_math_gen6(vec4_instruction *inst,
                                   struct brw_reg dst,
                                   struct brw_reg src0,
                                   struct brw_reg src1)
{
   /* Can't do writemask because math can't be align16. */
   assert(dst.dw1.bits.writemask == WRITEMASK_XYZW);
   /* Source swizzles are ignored. */
   check_gen6_math_src_arg(src0);
   if (src1.file == BRW_GENERAL_REGISTER_FILE)
      check_gen6_math_src_arg(src1);

   brw_set_default_access_mode(p, BRW_ALIGN_1);
   gen6_math(p, dst, brw_math_function(inst->opcode), src0, src1);
   brw_set_default_access_mode(p, BRW_ALIGN_16);
}
Example #2
0
void
vec4_generator::generate_math1_gen6(vec4_instruction *inst,
                                    struct brw_reg dst,
                                    struct brw_reg src)
{
    /* Can't do writemask because math can't be align16. */
    assert(dst.dw1.bits.writemask == WRITEMASK_XYZW);
    check_gen6_math_src_arg(src);

    brw_set_access_mode(p, BRW_ALIGN_1);
    brw_math(p,
             dst,
             brw_math_function(inst->opcode),
             inst->base_mrf,
             src,
             BRW_MATH_DATA_SCALAR,
             BRW_MATH_PRECISION_FULL);
    brw_set_access_mode(p, BRW_ALIGN_16);
}