void fill_dci_emos(DCI_PDU *DCI_pdu, uint8_t subframe, PHY_VARS_eNB *eNB)
{
//uint8_t cooperation_flag = eNB->cooperation_flag;
uint8_t transmission_mode = eNB->transmission_mode[0];
//uint32_t rballoc = 0x00F0;
//uint32_t rballoc2 = 0x000F;
/*
uint32_t rand = taus();
if ((subframe==8) || (subframe==9) || (subframe==0))
rand = (rand%5)+5;
else
rand = (rand%4)+5;
*/
DCI_pdu->Num_dci = 0;
switch (subframe) {
case 5:
DCI_pdu->Num_dci = 1;
if (transmission_mode<3) {
//user 1
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1_5MHz_TDD_t;
DCI_pdu->dci_alloc[0].L = 2;
DCI_pdu->dci_alloc[0].rnti = 0x1235;
DCI_pdu->dci_alloc[0].format = format1;
DCI_pdu->dci_alloc[0].ra_flag = 0;
DCI_pdu->dci_alloc[0].search_space = DCI_UE_SPACE;
DLSCH_alloc_pdu.rballoc = eNB->ue_dl_rb_alloc;
DLSCH_alloc_pdu.TPC = 0;
DLSCH_alloc_pdu.dai = 0;
DLSCH_alloc_pdu.harq_pid = 1;
DLSCH_alloc_pdu.mcs = eNB->target_ue_dl_mcs;
DLSCH_alloc_pdu.ndi = 1;
DLSCH_alloc_pdu.rv = 0;
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],(void *)&DLSCH_alloc_pdu,sizeof(DCI1_5MHz_TDD_t));
/*
//user2
DCI_pdu->dci_alloc[1].dci_length = sizeof_DCI1_5MHz_TDD_t;
DCI_pdu->dci_alloc[1].L = 2;
DCI_pdu->dci_alloc[1].rnti = 0x1236;
DCI_pdu->dci_alloc[1].format = format1;
DCI_pdu->dci_alloc[1].ra_flag = 0;
DCI_pdu->dci_alloc[1].search_space = DCI_UE_SPACE;
DLSCH_alloc_pdu.rballoc = rballoc2;
DLSCH_alloc_pdu.TPC = 0;
DLSCH_alloc_pdu.dai = 0;
DLSCH_alloc_pdu.harq_pid = 1;
DLSCH_alloc_pdu.mcs = eNB->target_ue_dl_mcs;
DLSCH_alloc_pdu.ndi = 1;
DLSCH_alloc_pdu.rv = 0;
memcpy((void*)&DCI_pdu->dci_alloc[1].dci_pdu[0],(void *)&DLSCH_alloc_pdu,sizeof(DCI1_5MHz_TDD_t));
*/
} else if (transmission_mode==5) {
DCI_pdu->Num_dci = 2;
// user 1
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1E_5MHz_2A_M10PRB_TDD_t;
DCI_pdu->dci_alloc[0].L = 2;
DCI_pdu->dci_alloc[0].rnti = 0x1235;
DCI_pdu->dci_alloc[0].format = format1E_2A_M10PRB;
DCI_pdu->dci_alloc[0].ra_flag = 0;
DCI_pdu->dci_alloc[0].search_space = DCI_UE_SPACE;
DLSCH_alloc_pdu1E.tpmi = 5; //5=use feedback
DLSCH_alloc_pdu1E.rv = 0;
DLSCH_alloc_pdu1E.ndi = 1;
DLSCH_alloc_pdu1E.mcs = eNB->target_ue_dl_mcs;
DLSCH_alloc_pdu1E.harq_pid = 1;
DLSCH_alloc_pdu1E.dai = 0;
DLSCH_alloc_pdu1E.TPC = 0;
DLSCH_alloc_pdu1E.rballoc = eNB->ue_dl_rb_alloc;
DLSCH_alloc_pdu1E.rah = 0;
DLSCH_alloc_pdu1E.dl_power_off = 0; //0=second user present
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],(void *)&DLSCH_alloc_pdu1E,sizeof(DCI1E_5MHz_2A_M10PRB_TDD_t));
//user 2
DCI_pdu->dci_alloc[1].dci_length = sizeof_DCI1E_5MHz_2A_M10PRB_TDD_t;
DCI_pdu->dci_alloc[1].L = 2;
DCI_pdu->dci_alloc[1].rnti = 0x1236;
DCI_pdu->dci_alloc[1].format = format1E_2A_M10PRB;
DCI_pdu->dci_alloc[1].ra_flag = 0;
DCI_pdu->dci_alloc[1].search_space = DCI_UE_SPACE;
memcpy((void*)&DCI_pdu->dci_alloc[1].dci_pdu[0],(void *)&DLSCH_alloc_pdu1E,sizeof(DCI1E_5MHz_2A_M10PRB_TDD_t));
// set the precoder of the second UE orthogonal to the first
eNB->UE_stats[1].DL_pmi_single = (eNB->UE_stats[0].DL_pmi_single ^ 0x1555);
}
break;
case 7:
DCI_pdu->Num_dci = 1;
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1A_5MHz_TDD_1_6_t;
DCI_pdu->dci_alloc[0].L = 2;
DCI_pdu->dci_alloc[0].rnti = 0xbeef;
DCI_pdu->dci_alloc[0].format = format1A;
DCI_pdu->dci_alloc[0].ra_flag = 1;
DCI_pdu->dci_alloc[0].search_space = DCI_COMMON_SPACE;
RA_alloc_pdu.type = 1;
RA_alloc_pdu.vrb_type = 0;
RA_alloc_pdu.rballoc = computeRIV(25,12,3);
RA_alloc_pdu.ndi = 1;
RA_alloc_pdu.rv = 1;
RA_alloc_pdu.mcs = 4;
RA_alloc_pdu.harq_pid = 0;
RA_alloc_pdu.TPC = 1;
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],&RA_alloc_pdu,sizeof(DCI1A_5MHz_TDD_1_6_t));
break;
case 9:
DCI_pdu->Num_dci = 1;
//user 1
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI0_5MHz_TDD_1_6_t ;
DCI_pdu->dci_alloc[0].L = 2;
DCI_pdu->dci_alloc[0].rnti = 0x1235;
DCI_pdu->dci_alloc[0].format = format0;
DCI_pdu->dci_alloc[0].ra_flag = 0;
DCI_pdu->dci_alloc[0].search_space = DCI_UE_SPACE;
UL_alloc_pdu.type = 0;
UL_alloc_pdu.hopping = 0;
UL_alloc_pdu.rballoc = computeRIV(25,0,eNB->ue_ul_nb_rb);
UL_alloc_pdu.mcs = eNB->target_ue_ul_mcs;
UL_alloc_pdu.ndi = 1;
UL_alloc_pdu.TPC = 0;
UL_alloc_pdu.cshift = 0;
UL_alloc_pdu.dai = 0;
UL_alloc_pdu.cqi_req = 1;
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],(void *)&UL_alloc_pdu,sizeof(DCI0_5MHz_TDD_1_6_t));
/*
//user 2
DCI_pdu->dci_alloc[1].dci_length = sizeof_DCI0_5MHz_TDD_1_6_t ;
DCI_pdu->dci_alloc[1].L = 2;
DCI_pdu->dci_alloc[1].rnti = 0x1236;
DCI_pdu->dci_alloc[1].format = format0;
DCI_pdu->dci_alloc[1].ra_flag = 0;
UL_alloc_pdu.type = 0;
UL_alloc_pdu.hopping = 0;
if (cooperation_flag==0)
UL_alloc_pdu.rballoc = computeRIV(25,2+eNB->ue_ul_nb_rb,eNB->ue_ul_nb_rb);
else
UL_alloc_pdu.rballoc = computeRIV(25,0,eNB->ue_ul_nb_rb);
UL_alloc_pdu.mcs = eNB->target_ue_ul_mcs;
UL_alloc_pdu.ndi = 1;
UL_alloc_pdu.TPC = 0;
if ((cooperation_flag==0) || (cooperation_flag==1))
UL_alloc_pdu.cshift = 0;
else
UL_alloc_pdu.cshift = 1;
UL_alloc_pdu.dai = 0;
UL_alloc_pdu.cqi_req = 1;
memcpy((void*)&DCI_pdu->dci_alloc[1].dci_pdu[0],(void *)&UL_alloc_pdu,sizeof(DCI0_5MHz_TDD_1_6_t));
*/
break;
default:
break;
}
/*
DCI_pdu->nCCE = 0;
for (i=0; i<DCI_pdu->Num_dci; i++) {
DCI_pdu->nCCE += (1<<(DCI_pdu->dci_alloc[i].L));
}
*/
}
void fill_dci(DCI_PDU *DCI_pdu,PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc)
{
/* SYRTEM */
uint8_t *dci_ndi_toggle_tmp = NULL;
uint8_t harq_pid_value = 0;
/* End of SYRTEM */
//uint8_t cooperation_flag = eNB->cooperation_flag;
uint8_t transmission_mode = eNB->transmission_mode[0];
uint32_t rballoc = 0x1FFFF;
//uint32_t rballoc2 = 0x000F;
int subframe = proc->subframe_tx;
/*
uint32_t rand = taus();
if ((subframe==8) || (subframe==9) || (subframe==0))
rand = (rand%5)+5;
else
rand = (rand%4)+5;
*/
uint32_t bcch_pdu;
uint64_t dlsch_pdu;
LOG_D(PHY,"frame %d, subframe %d, transmission_mode %d\n",proc->frame_tx,proc->subframe_tx,transmission_mode);
DCI_pdu->Num_dci = 0;
switch (subframe) {
case 5:
if ( !(proc->frame_tx&1) ) // SI message on even frame only (SFN mod 2 == 0)
{
DCI_pdu->Num_dci = 1;
DCI_pdu->dci_alloc[0].L = 2;
DCI_pdu->dci_alloc[0].firstCCE = 0;
DCI_pdu->dci_alloc[0].rnti = SI_RNTI;
DCI_pdu->dci_alloc[0].format = format1A;
DCI_pdu->dci_alloc[0].ra_flag = 0;
DCI_pdu->dci_alloc[0].search_space = DCI_COMMON_SPACE;
switch (eNB->frame_parms.N_RB_DL) {
case 6:
if (eNB->frame_parms.frame_type == FDD) {
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1A_1_5MHz_FDD_t;
((DCI1A_1_5MHz_FDD_t*)&bcch_pdu)->type = 1;
((DCI1A_1_5MHz_FDD_t*)&bcch_pdu)->vrb_type = 0;
((DCI1A_1_5MHz_FDD_t*)&bcch_pdu)->rballoc = computeRIV(25,10,3);
((DCI1A_1_5MHz_FDD_t*)&bcch_pdu)->ndi = proc->frame_tx&1;
((DCI1A_1_5MHz_FDD_t*)&bcch_pdu)->rv = 1;
((DCI1A_1_5MHz_FDD_t*)&bcch_pdu)->mcs = 1;
((DCI1A_1_5MHz_FDD_t*)&bcch_pdu)->harq_pid = 0;
((DCI1A_1_5MHz_FDD_t*)&bcch_pdu)->TPC = 1; // set to 3 PRB
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],&bcch_pdu,sizeof(DCI1A_1_5MHz_TDD_1_6_t));
} else {
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1A_1_5MHz_TDD_1_6_t;
((DCI1A_1_5MHz_TDD_1_6_t*)&bcch_pdu)->type = 1;
((DCI1A_1_5MHz_TDD_1_6_t*)&bcch_pdu)->vrb_type = 0;
((DCI1A_1_5MHz_TDD_1_6_t*)&bcch_pdu)->rballoc = computeRIV(25,10,3);
((DCI1A_1_5MHz_TDD_1_6_t*)&bcch_pdu)->ndi = proc->frame_tx&1;
((DCI1A_1_5MHz_TDD_1_6_t*)&bcch_pdu)->rv = 1;
((DCI1A_1_5MHz_TDD_1_6_t*)&bcch_pdu)->mcs = 1;
((DCI1A_1_5MHz_TDD_1_6_t*)&bcch_pdu)->harq_pid = 0;
((DCI1A_1_5MHz_TDD_1_6_t*)&bcch_pdu)->TPC = 1; // set to 3 PRB
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],&bcch_pdu,sizeof(DCI1A_1_5MHz_TDD_1_6_t));
}
break;
case 25:
default:
if (eNB->frame_parms.frame_type == FDD) {
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1A_5MHz_FDD_t;
((DCI1A_5MHz_FDD_t*)&bcch_pdu)->type = 1;
((DCI1A_5MHz_FDD_t*)&bcch_pdu)->vrb_type = 0;
((DCI1A_5MHz_FDD_t*)&bcch_pdu)->rballoc = computeRIV(25,10,3);
((DCI1A_5MHz_FDD_t*)&bcch_pdu)->ndi = proc->frame_tx&1;
((DCI1A_5MHz_FDD_t*)&bcch_pdu)->rv = 1;
((DCI1A_5MHz_FDD_t*)&bcch_pdu)->mcs = 1;
((DCI1A_5MHz_FDD_t*)&bcch_pdu)->harq_pid = 0;
((DCI1A_5MHz_FDD_t*)&bcch_pdu)->TPC = 1; // set to 3 PRB
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],&bcch_pdu,sizeof(DCI1A_5MHz_TDD_1_6_t));
} else {
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1A_5MHz_TDD_1_6_t;
((DCI1A_5MHz_TDD_1_6_t*)&bcch_pdu)->type = 1;
((DCI1A_5MHz_TDD_1_6_t*)&bcch_pdu)->vrb_type = 0;
((DCI1A_5MHz_TDD_1_6_t*)&bcch_pdu)->rballoc = computeRIV(25,10,3);
((DCI1A_5MHz_TDD_1_6_t*)&bcch_pdu)->ndi = proc->frame_tx&1;
((DCI1A_5MHz_TDD_1_6_t*)&bcch_pdu)->rv = 1;
((DCI1A_5MHz_TDD_1_6_t*)&bcch_pdu)->mcs = 1;
((DCI1A_5MHz_TDD_1_6_t*)&bcch_pdu)->harq_pid = 0;
((DCI1A_5MHz_TDD_1_6_t*)&bcch_pdu)->TPC = 1; // set to 3 PRB
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],&bcch_pdu,sizeof(DCI1A_5MHz_TDD_1_6_t));
}
break;
case 50:
if (eNB->frame_parms.frame_type == FDD) {
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1A_10MHz_FDD_t;
((DCI1A_10MHz_FDD_t*)&bcch_pdu)->type = 1;
((DCI1A_10MHz_FDD_t*)&bcch_pdu)->vrb_type = 0;
((DCI1A_10MHz_FDD_t*)&bcch_pdu)->rballoc = computeRIV(50,10,3);
((DCI1A_10MHz_FDD_t*)&bcch_pdu)->ndi = proc->frame_tx&1;
((DCI1A_10MHz_FDD_t*)&bcch_pdu)->rv = 1;
((DCI1A_10MHz_FDD_t*)&bcch_pdu)->mcs = 1;
((DCI1A_10MHz_FDD_t*)&bcch_pdu)->harq_pid = 0;
((DCI1A_10MHz_FDD_t*)&bcch_pdu)->TPC = 1; // set to 3 PRB
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],&bcch_pdu,sizeof(DCI1A_10MHz_TDD_1_6_t));
} else {
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1A_10MHz_TDD_1_6_t;
((DCI1A_10MHz_TDD_1_6_t*)&bcch_pdu)->type = 1;
((DCI1A_10MHz_TDD_1_6_t*)&bcch_pdu)->vrb_type = 0;
((DCI1A_10MHz_TDD_1_6_t*)&bcch_pdu)->rballoc = computeRIV(50,10,3);
((DCI1A_10MHz_TDD_1_6_t*)&bcch_pdu)->ndi = subframe / 5;
((DCI1A_10MHz_TDD_1_6_t*)&bcch_pdu)->rv = 1;
((DCI1A_10MHz_TDD_1_6_t*)&bcch_pdu)->mcs = 1;
((DCI1A_10MHz_TDD_1_6_t*)&bcch_pdu)->harq_pid = subframe % 5;
((DCI1A_10MHz_TDD_1_6_t*)&bcch_pdu)->TPC = 1; // set to 3 PRB
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],&bcch_pdu,sizeof(DCI1A_10MHz_TDD_1_6_t));
}
break;
case 100:
if (eNB->frame_parms.frame_type == FDD) {
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1A_20MHz_FDD_t;
((DCI1A_20MHz_FDD_t*)&bcch_pdu)->type = 1;
((DCI1A_20MHz_FDD_t*)&bcch_pdu)->vrb_type = 0;
((DCI1A_20MHz_FDD_t*)&bcch_pdu)->rballoc = computeRIV(100,10,3);
((DCI1A_20MHz_FDD_t*)&bcch_pdu)->ndi = proc->frame_tx&1;
((DCI1A_20MHz_FDD_t*)&bcch_pdu)->rv = 1;
((DCI1A_20MHz_FDD_t*)&bcch_pdu)->mcs = 1;
((DCI1A_20MHz_FDD_t*)&bcch_pdu)->harq_pid = 0;
((DCI1A_20MHz_FDD_t*)&bcch_pdu)->TPC = 1; // set to 3 PRB
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],&bcch_pdu,sizeof(DCI1A_20MHz_TDD_1_6_t));
} else {
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1A_20MHz_TDD_1_6_t;
((DCI1A_20MHz_TDD_1_6_t*)&bcch_pdu)->type = 1;
((DCI1A_20MHz_TDD_1_6_t*)&bcch_pdu)->vrb_type = 0;
((DCI1A_20MHz_TDD_1_6_t*)&bcch_pdu)->rballoc = computeRIV(100,10,3);
((DCI1A_20MHz_TDD_1_6_t*)&bcch_pdu)->ndi = proc->frame_tx&1;
((DCI1A_20MHz_TDD_1_6_t*)&bcch_pdu)->rv = 1;
((DCI1A_20MHz_TDD_1_6_t*)&bcch_pdu)->mcs = 1;
((DCI1A_20MHz_TDD_1_6_t*)&bcch_pdu)->harq_pid = 0;
((DCI1A_20MHz_TDD_1_6_t*)&bcch_pdu)->TPC = 1; // set to 3 PRB
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],&bcch_pdu,sizeof(DCI1A_20MHz_TDD_1_6_t));
}
break;
}
break; //subframe switch
} // if ( !(proc->frame_tx&1) )
else // No SI message on odd frame (SFN mod 2 == 1)
{
/* warning: work around to send dlsch on subframe 5 odd frame !!! */
/* todo: clean up, espacially if subframe cases are added next !!! */
}
/*
case 6:
DCI_pdu->Num_dci = 1;
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI2_5MHz_2A_M10PRB_TDD_t;
DCI_pdu->dci_alloc[0].L = 2;
DCI_pdu->dci_alloc[0].rnti = 0x1236;
DCI_pdu->dci_alloc[0].format = format2_2A_M10PRB;
DCI_pdu->dci_alloc[0].ra_flag = 0;
DCI_pdu->dci_alloc[0].search_space = DCI_UE_SPACE;
DLSCH_alloc_pdu1.rballoc = 0x00ff;
DLSCH_alloc_pdu1.TPC = 0;
DLSCH_alloc_pdu1.dai = 0;
DLSCH_alloc_pdu1.harq_pid = 0;
DLSCH_alloc_pdu1.tb_swap = 0;
DLSCH_alloc_pdu1.mcs1 = 0;
DLSCH_alloc_pdu1.ndi1 = 1;
DLSCH_alloc_pdu1.rv1 = 0;
DLSCH_alloc_pdu1.tpmi = 0;
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],(void *)&DLSCH_alloc_pdu1,sizeof(DCI2_5MHz_2A_M10PRB_TDD_t));
break;
*/
default:
case 7:
DCI_pdu->Num_dci = 1;
DCI_pdu->dci_alloc[0].L = 2;
DCI_pdu->dci_alloc[0].firstCCE = 0;
DCI_pdu->dci_alloc[0].rnti = 0x1235;
DCI_pdu->dci_alloc[0].format = format1;
DCI_pdu->dci_alloc[0].ra_flag = 0;
DCI_pdu->dci_alloc[0].search_space = DCI_UE_SPACE;
if (transmission_mode<3 || transmission_mode == 7) {
//user 1
switch (eNB->frame_parms.N_RB_DL) {
case 25:
if (eNB->frame_parms.frame_type == FDD) {
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1_5MHz_FDD_t;
harq_pid_value = ( ((proc->frame_tx * 10) + subframe) % 8 );
if (!(subframe&1)) // even subframe
dci_ndi_toggle_tmp = &(dci_ndi_toggle_even[harq_pid_value]);
else // odd subframe
dci_ndi_toggle_tmp = &(dci_ndi_toggle_odd[harq_pid_value]);
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rballoc = rballoc; //computeRIV(25,10,3);
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->TPC = 0;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->harq_pid = harq_pid_value;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = eNB->target_ue_dl_mcs;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->ndi = (*dci_ndi_toggle_tmp);
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rv = 0;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rah = 0;
(*dci_ndi_toggle_tmp) = ((*dci_ndi_toggle_tmp) + 1) & 1;
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],(void *)&dlsch_pdu,sizeof(DCI1_5MHz_FDD_t));
/*
//user2
DCI_pdu->dci_alloc[1].dci_length = sizeof_DCI1_5MHz_TDD_t;
DCI_pdu->dci_alloc[1].L = 2;
DCI_pdu->dci_alloc[1].rnti = 0x1236;
DCI_pdu->dci_alloc[1].format = format1;
DCI_pdu->dci_alloc[1].ra_flag = 0;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rballoc = rballoc2;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->TPC = 0;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->dai = 0;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->harq_pid = 1;
//((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((eNB->proc[subframe].frame%1024)%28);
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = eNB->target_ue_dl_mcs;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->ndi = 1;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rv = 0;
memcpy((void*)&DCI_pdu->dci_alloc[1].dci_pdu[0],(void *)&((DCI1_5MHz_FDD_t *)&dlsch_pdu)->,sizeof(DCI1_5MHz_TDD_t));
*/
} else {
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1_5MHz_TDD_t;
((DCI1_5MHz_TDD_t *)&dlsch_pdu)->rballoc = rballoc; //computeRIV(25,10,3);
((DCI1_5MHz_TDD_t *)&dlsch_pdu)->TPC = 0;
((DCI1_5MHz_TDD_t *)&dlsch_pdu)->dai = 0;
((DCI1_5MHz_TDD_t *)&dlsch_pdu)->harq_pid = subframe % 5;
((DCI1_5MHz_TDD_t *)&dlsch_pdu)->mcs = eNB->target_ue_dl_mcs;
//((DCI1_5MHz_TDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((eNB->frame%1024)%28);
((DCI1_5MHz_TDD_t *)&dlsch_pdu)->ndi = subframe / 5;
((DCI1_5MHz_TDD_t *)&dlsch_pdu)->rv = 0;
((DCI1_5MHz_TDD_t *)&dlsch_pdu)->rah = 0;
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],(void *)&dlsch_pdu,sizeof(DCI1_5MHz_TDD_t));
/*
//user2
DCI_pdu->dci_alloc[1].dci_length = sizeof_DCI1_5MHz_TDD_t;
DCI_pdu->dci_alloc[1].L = 2;
DCI_pdu->dci_alloc[1].rnti = 0x1236;
DCI_pdu->dci_alloc[1].format = format1;
DCI_pdu->dci_alloc[1].ra_flag = 0;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rballoc = rballoc2;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->TPC = 0;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->dai = 0;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->harq_pid = 1;
//((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((eNB->proc[subframe].frame%1024)%28);
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = eNB->target_ue_dl_mcs;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->ndi = 1;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rv = 0;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rah = 0;
memcpy((void*)&DCI_pdu->dci_alloc[1].dci_pdu[0],(void *)&((DCI1_5MHz_FDD_t *)&dlsch_pdu)->,sizeof(DCI1_5MHz_TDD_t));
*/
}
break;
case 50:
if (eNB->frame_parms.frame_type == FDD) {
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1_10MHz_FDD_t;
harq_pid_value = ( ((proc->frame_tx * 10) + subframe) % 8 );
if (!(subframe&1)) // even subframe
dci_ndi_toggle_tmp = &(dci_ndi_toggle_even[harq_pid_value]);
else // odd subframe
dci_ndi_toggle_tmp = &(dci_ndi_toggle_odd[harq_pid_value]);
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->rballoc = rballoc; //computeRIV(50,10,3);
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->TPC = 0;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->harq_pid = harq_pid_value;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->mcs = eNB->target_ue_dl_mcs;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->ndi = (*dci_ndi_toggle_tmp);
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->rv = 0;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->rah = 0;
(*dci_ndi_toggle_tmp) = ((*dci_ndi_toggle_tmp) + 1) & 1;
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],(void *)&dlsch_pdu,sizeof(DCI1_10MHz_FDD_t));
} else {
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1_10MHz_TDD_t;
((DCI1_10MHz_TDD_t *)&dlsch_pdu)->rballoc = rballoc; //computeRIV(50,10,3);
((DCI1_10MHz_TDD_t *)&dlsch_pdu)->TPC = 0;
((DCI1_10MHz_TDD_t *)&dlsch_pdu)->dai = 0;
((DCI1_10MHz_TDD_t *)&dlsch_pdu)->harq_pid = subframe % 5;
((DCI1_10MHz_TDD_t *)&dlsch_pdu)->mcs = eNB->target_ue_dl_mcs;
//((DCI1_10MHz_TDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((eNB->frame%1024)%28);
((DCI1_10MHz_TDD_t *)&dlsch_pdu)->ndi = subframe / 5;
((DCI1_10MHz_TDD_t *)&dlsch_pdu)->rv = 0;
((DCI1_10MHz_TDD_t *)&dlsch_pdu)->rah = 0;
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],(void *)&dlsch_pdu,sizeof(DCI1_10MHz_TDD_t));
/*
//user2
DCI_pdu->dci_alloc[1].dci_length = sizeof_DCI1_10MHz_TDD_t;
DCI_pdu->dci_alloc[1].L = 2;
DCI_pdu->dci_alloc[1].rnti = 0x1236;
DCI_pdu->dci_alloc[1].format = format1;
DCI_pdu->dci_alloc[1].ra_flag = 0;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->rballoc = rballoc2;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->TPC = 0;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->dai = 0;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->harq_pid = 1;
//((DCI1_10MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((eNB->proc[subframe].frame%1024)%28);
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->mcs = eNB->target_ue_dl_mcs;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->ndi = 1;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->rv = 0;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->rah = 0;
memcpy((void*)&DCI_pdu->dci_alloc[1].dci_pdu[0],(void *)&((DCI1_10MHz_FDD_t *)&dlsch_pdu)->,sizeof(DCI1_10MHz_TDD_t));
*/
}
break;
case 100:
if (eNB->frame_parms.frame_type == FDD) {
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1_20MHz_FDD_t;
harq_pid_value = ( ((proc->frame_tx * 10) + subframe) % 8 );
if (!(subframe&1)) // even subframe
dci_ndi_toggle_tmp = &(dci_ndi_toggle_even[harq_pid_value]);
else // odd subframe
dci_ndi_toggle_tmp = &(dci_ndi_toggle_odd[harq_pid_value]);
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->rballoc = 0x1ffffff; //rballoc; //computeRIV(100,10,3);
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->TPC = 0;
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->harq_pid = harq_pid_value;
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->mcs = eNB->target_ue_dl_mcs;
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->ndi = (*dci_ndi_toggle_tmp);
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->rv = 0;
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->rah = 0;
(*dci_ndi_toggle_tmp) = ((*dci_ndi_toggle_tmp) + 1) & 1;
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],(void *)&dlsch_pdu,sizeof(DCI1_20MHz_FDD_t));
/*
//user2
DCI_pdu->dci_alloc[1].dci_length = sizeof_DCI1_5MHz_TDD_t;
DCI_pdu->dci_alloc[1].L = 2;
DCI_pdu->dci_alloc[1].rnti = 0x1236;
DCI_pdu->dci_alloc[1].format = format1;
DCI_pdu->dci_alloc[1].ra_flag = 0;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rballoc = rballoc2;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->TPC = 0;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->dai = 0;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->harq_pid = 1;
//((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((eNB->proc[subframe].frame%1024)%28);
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = eNB->target_ue_dl_mcs;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->ndi = 1;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rv = 0;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rah = 0;
memcpy((void*)&DCI_pdu->dci_alloc[1].dci_pdu[0],(void *)&((DCI1_5MHz_FDD_t *)&dlsch_pdu)->,sizeof(DCI1_5MHz_TDD_t));
*/
} else {
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1_20MHz_TDD_t;
((DCI1_20MHz_TDD_t *)&dlsch_pdu)->rballoc = rballoc; //computeRIV(100,10,3);
((DCI1_20MHz_TDD_t *)&dlsch_pdu)->TPC = 0;
((DCI1_20MHz_TDD_t *)&dlsch_pdu)->dai = 0;
((DCI1_20MHz_TDD_t *)&dlsch_pdu)->harq_pid = subframe % 5;
((DCI1_20MHz_TDD_t *)&dlsch_pdu)->mcs = eNB->target_ue_dl_mcs;
//((DCI1_20MHz_TDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((eNB->frame%1024)%28);
((DCI1_20MHz_TDD_t *)&dlsch_pdu)->ndi = subframe / 5;
((DCI1_20MHz_TDD_t *)&dlsch_pdu)->rv = 0;
((DCI1_20MHz_TDD_t *)&dlsch_pdu)->rah = 0;
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],(void *)&dlsch_pdu,sizeof(DCI1_20MHz_TDD_t));
/*
//user2
DCI_pdu->dci_alloc[1].dci_length = sizeof_DCI1_20MHz_TDD_t;
DCI_pdu->dci_alloc[1].L = 2;
DCI_pdu->dci_alloc[1].rnti = 0x1236;
DCI_pdu->dci_alloc[1].format = format1;
DCI_pdu->dci_alloc[1].ra_flag = 0;
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->rballoc = rballoc2;
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->TPC = 0;
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->dai = 0;
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->harq_pid = 1;
//((DCI1_20MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((eNB->proc[subframe].frame%1024)%28);
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->mcs = eNB->target_ue_dl_mcs;
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->ndi = 1;
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->rv = 0;
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->rah = 0;
memcpy((void*)&DCI_pdu->dci_alloc[1].dci_pdu[0],(void *)&((DCI1_20MHz_FDD_t *)&dlsch_pdu)->,sizeof(DCI1_5MHz_TDD_t));
*/
}
break;
}
DCI_pdu->dci_alloc[1].L = 2;
DCI_pdu->dci_alloc[1].rnti = 0x1235;
DCI_pdu->dci_alloc[1].format = format0;
DCI_pdu->dci_alloc[1].ra_flag = 0;
DCI_pdu->dci_alloc[1].search_space = DCI_UE_SPACE;
if (eNB->frame_parms.frame_type == FDD) {
switch (eNB->frame_parms.N_RB_DL) {
case 6:
((DCI0_1_5MHz_FDD_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->type = 0;
((DCI0_1_5MHz_FDD_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->hopping = 0;
((DCI0_1_5MHz_FDD_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->rballoc = computeRIV(6,1,4);
((DCI0_1_5MHz_FDD_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->mcs = eNB->target_ue_ul_mcs;
((DCI0_1_5MHz_FDD_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->ndi = proc->frame_tx&1;
((DCI0_1_5MHz_FDD_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->TPC = 0;
((DCI0_1_5MHz_FDD_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->cshift = 0;
((DCI0_1_5MHz_FDD_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->cqi_req = 1;
break;
/* case 15:
((DCI0_3MHz_FDD_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->type = 0;
((DCI0_3MHz_FDD_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->hopping = 0;
((DCI0_3MHz_FDD_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->rballoc = computeRIV(25,2,eNB->ue_ul_nb_rb);
((DCI0_3MHz_FDD_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->mcs = eNB->target_ue_ul_mcs;
((DCI0_3MHz_FDD_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->ndi = proc->frame_tx&1;
((DCI0_3MHz_FDD_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->TPC = 0;
((DCI0_3MHz_FDD_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->cshift = 0;
((DCI0_3MHz_FDD_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->dai = 0;
((DCI0_3MHz_FDD_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->cqi_req = 1;
break;*/
case 25:
((DCI0_5MHz_FDD_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->type = 0;
((DCI0_5MHz_FDD_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->hopping = 0;
((DCI0_5MHz_FDD_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->rballoc = computeRIV(25,1,20);
printf("rballoc %d\n",((DCI0_5MHz_FDD_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->rballoc);
((DCI0_5MHz_FDD_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->mcs = eNB->target_ue_ul_mcs;
((DCI0_5MHz_FDD_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->ndi = proc->frame_tx&1;
((DCI0_5MHz_FDD_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->TPC = 0;
((DCI0_5MHz_FDD_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->cshift = 0;
((DCI0_5MHz_FDD_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->cqi_req = 1;
break;
case 50:
((DCI0_10MHz_FDD_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->type = 0;
((DCI0_10MHz_FDD_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->hopping = 0;
((DCI0_10MHz_FDD_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->rballoc = computeRIV(50,1,48);
((DCI0_10MHz_FDD_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->mcs = eNB->target_ue_ul_mcs;
((DCI0_10MHz_FDD_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->ndi = proc->frame_tx&1;
((DCI0_10MHz_FDD_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->TPC = 0;
((DCI0_10MHz_FDD_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->cshift = 0;
((DCI0_10MHz_FDD_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->cqi_req = 1;
break;
/* case 75:
((DCI0_15MHz_FDD_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->type = 0;
((DCI0_15MHz_FDD_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->hopping = 0;
((DCI0_15MHz_FDD_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->rballoc = computeRIV(25,2,eNB->ue_ul_nb_rb);
((DCI0_15MHz_FDD_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->mcs = eNB->target_ue_ul_mcs;
((DCI0_15MHz_FDD_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->ndi = proc->frame_tx&1;
((DCI0_15MHz_FDD_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->TPC = 0;
((DCI0_15MHz_FDD_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->cshift = 0;
((DCI0_15MHz_FDD_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->cqi_req = 1;
break;*/
case 100:
((DCI0_20MHz_FDD_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->type = 0;
((DCI0_20MHz_FDD_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->hopping = 0;
((DCI0_20MHz_FDD_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->rballoc = computeRIV(100,1,96);
((DCI0_20MHz_FDD_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->mcs = eNB->target_ue_ul_mcs;
((DCI0_20MHz_FDD_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->ndi = proc->frame_tx&1;
((DCI0_20MHz_FDD_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->TPC = 0;
((DCI0_20MHz_FDD_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->cshift = 0;
((DCI0_20MHz_FDD_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->cqi_req = 1;
break;
}
}
else {
switch (eNB->frame_parms.N_RB_DL) {
case 6:
((DCI0_1_5MHz_TDD_1_6_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->type = 0;
((DCI0_1_5MHz_TDD_1_6_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->hopping = 0;
((DCI0_1_5MHz_TDD_1_6_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->rballoc = computeRIV(6,1,5);
((DCI0_1_5MHz_TDD_1_6_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->mcs = eNB->target_ue_ul_mcs;
((DCI0_1_5MHz_TDD_1_6_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->ndi = proc->frame_tx&1;
((DCI0_1_5MHz_TDD_1_6_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->TPC = 0;
((DCI0_1_5MHz_TDD_1_6_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->cshift = 0;
((DCI0_1_5MHz_TDD_1_6_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->dai = 0;
((DCI0_1_5MHz_TDD_1_6_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->cqi_req = 1;
break;
/* case 15:
((DCI0_3MHz_TDD_1_6_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->type = 0;
((DCI0_3MHz_TDD_1_6_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->hopping = 0;
((DCI0_3MHz_TDD_1_6_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->rballoc = computeRIV(25,2,eNB->ue_ul_nb_rb);
((DCI0_3MHz_TDD_1_6_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->mcs = eNB->target_ue_ul_mcs;
((DCI0_3MHz_TDD_1_6_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->ndi = proc->frame_tx&1;
((DCI0_3MHz_TDD_1_6_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->TPC = 0;
((DCI0_3MHz_TDD_1_6_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->cshift = 0;
((DCI0_3MHz_TDD_1_6_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->dai = 0;
((DCI0_3MHz_TDD_1_6_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->cqi_req = 1;
break;*/
case 25:
((DCI0_5MHz_TDD_1_6_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->type = 0;
((DCI0_5MHz_TDD_1_6_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->hopping = 0;
((DCI0_5MHz_TDD_1_6_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->rballoc = computeRIV(25,2,20);
((DCI0_5MHz_TDD_1_6_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->mcs = eNB->target_ue_ul_mcs;
((DCI0_5MHz_TDD_1_6_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->ndi = proc->frame_tx&1;
((DCI0_5MHz_TDD_1_6_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->TPC = 0;
((DCI0_5MHz_TDD_1_6_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->cshift = 0;
((DCI0_5MHz_TDD_1_6_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->dai = 0;
((DCI0_5MHz_TDD_1_6_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->cqi_req = 1;
break;
case 50:
((DCI0_10MHz_TDD_1_6_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->type = 0;
((DCI0_10MHz_TDD_1_6_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->hopping = 0;
((DCI0_10MHz_TDD_1_6_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->rballoc = computeRIV(50,1,48);
((DCI0_10MHz_TDD_1_6_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->mcs = eNB->target_ue_ul_mcs;
((DCI0_10MHz_TDD_1_6_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->ndi = proc->frame_tx&1;
((DCI0_10MHz_TDD_1_6_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->TPC = 0;
((DCI0_10MHz_TDD_1_6_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->cshift = 0;
((DCI0_10MHz_TDD_1_6_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->dai = 0;
((DCI0_10MHz_TDD_1_6_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->cqi_req = 1;
break;
/* case 75:
((DCI0_15MHz_TDD_1_6_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->type = 0;
((DCI0_15MHz_TDD_1_6_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->hopping = 0;
((DCI0_15MHz_TDD_1_6_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->rballoc = computeRIV(25,2,eNB->ue_ul_nb_rb);
((DCI0_15MHz_TDD_1_6_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->mcs = eNB->target_ue_ul_mcs;
((DCI0_15MHz_TDD_1_6_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->ndi = proc->frame_tx&1;
((DCI0_15MHz_TDD_1_6_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->TPC = 0;
((DCI0_15MHz_TDD_1_6_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->cshift = 0;
((DCI0_15MHz_TDD_1_6_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->dai = 0;
((DCI0_15MHz_TDD_1_6_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->cqi_req = 1;
break;*/
case 100:
((DCI0_20MHz_TDD_1_6_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->type = 0;
((DCI0_20MHz_TDD_1_6_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->hopping = 0;
((DCI0_20MHz_TDD_1_6_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->rballoc = computeRIV(100,1,96);
((DCI0_20MHz_TDD_1_6_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->mcs = eNB->target_ue_ul_mcs;
((DCI0_20MHz_TDD_1_6_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->ndi = proc->frame_tx&1;
((DCI0_20MHz_TDD_1_6_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->TPC = 0;
((DCI0_20MHz_TDD_1_6_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->cshift = 0;
((DCI0_20MHz_TDD_1_6_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->dai = 0;
((DCI0_20MHz_TDD_1_6_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->cqi_req = 1;
break;
}
}
} else if (transmission_mode==4) {
DCI_pdu->Num_dci = 1;
// user 1
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI2_5MHz_2A_FDD_t;
DCI_pdu->dci_alloc[0].L = 3;
DCI_pdu->dci_alloc[0].rnti = 0x1235;
DCI_pdu->dci_alloc[0].format = format2;
DCI_pdu->dci_alloc[0].ra_flag = 0;
DCI_pdu->dci_alloc[0].search_space = DCI_UE_SPACE;
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->tpmi = 0;
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->rv1 = 0;
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->ndi1 = subframe / 5;
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->mcs1 = eNB->target_ue_dl_mcs;
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->rv2 = 0;
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->ndi2 = subframe / 5;
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->mcs2 = eNB->target_ue_dl_mcs;
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->tb_swap = 0;
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->harq_pid = subframe % 5;
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->TPC = 0;
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->rballoc = eNB->ue_dl_rb_alloc;
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->rah = 0;
} else if (transmission_mode==5) {
DCI_pdu->Num_dci = 2;
// user 1
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1E_5MHz_2A_M10PRB_TDD_t;
DCI_pdu->dci_alloc[0].L = 3;
DCI_pdu->dci_alloc[0].rnti = 0x1235;
DCI_pdu->dci_alloc[0].format = format1E_2A_M10PRB;
DCI_pdu->dci_alloc[0].ra_flag = 0;
DCI_pdu->dci_alloc[0].search_space = DCI_UE_SPACE;
DLSCH_alloc_pdu1E.tpmi = 5; //5=use feedback
DLSCH_alloc_pdu1E.rv = 0;
DLSCH_alloc_pdu1E.ndi = subframe / 5;
//DLSCH_alloc_pdu1E.mcs = cqi_to_mcs[eNB->UE_stats->DL_cqi[0]];
//DLSCH_alloc_pdu1E.mcs = (unsigned char) (taus()%28);
DLSCH_alloc_pdu1E.mcs = eNB->target_ue_dl_mcs;
//DLSCH_alloc_pdu1E.mcs = (unsigned char) ((eNB->proc[subframe].frame%1024)%28);
eNB->UE_stats[0].dlsch_mcs1 = DLSCH_alloc_pdu1E.mcs;
DLSCH_alloc_pdu1E.harq_pid = subframe % 5;
DLSCH_alloc_pdu1E.dai = 0;
DLSCH_alloc_pdu1E.TPC = 0;
DLSCH_alloc_pdu1E.rballoc = eNB->ue_dl_rb_alloc;
DLSCH_alloc_pdu1E.rah = 0;
DLSCH_alloc_pdu1E.dl_power_off = 0; //0=second user present
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],(void *)&DLSCH_alloc_pdu1E,sizeof(DCI1E_5MHz_2A_M10PRB_TDD_t));
//user 2
DCI_pdu->dci_alloc[1].dci_length = sizeof_DCI1E_5MHz_2A_M10PRB_TDD_t;
DCI_pdu->dci_alloc[1].L = 0;
DCI_pdu->dci_alloc[1].rnti = 0x1236;
DCI_pdu->dci_alloc[1].format = format1E_2A_M10PRB;
DCI_pdu->dci_alloc[1].ra_flag = 0;
DCI_pdu->dci_alloc[1].search_space = DCI_UE_SPACE;
//DLSCH_alloc_pdu1E.mcs = eNB->target_ue_dl_mcs;
//DLSCH_alloc_pdu1E.mcs = (unsigned char) (taus()%28);
//DLSCH_alloc_pdu1E.mcs = (unsigned char) ((eNB->frame%1024)%28);
DLSCH_alloc_pdu1E.mcs = (unsigned char) (((proc->frame_tx%1024)/3)%28);
eNB->UE_stats[1].dlsch_mcs1 = DLSCH_alloc_pdu1E.mcs;
memcpy((void*)&DCI_pdu->dci_alloc[1].dci_pdu[0],(void *)&DLSCH_alloc_pdu1E,sizeof(DCI1E_5MHz_2A_M10PRB_TDD_t));
// set the precoder of the second UE orthogonal to the first
eNB->UE_stats[1].DL_pmi_single = (eNB->UE_stats[0].DL_pmi_single ^ 0x1555);
}
break; //subframe switch
/*
case 8:
DCI_pdu->Num_dci = 1;
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1A_5MHz_TDD_1_6_t;
DCI_pdu->dci_alloc[0].L = 2;
DCI_pdu->dci_alloc[0].rnti = 0xbeef;
DCI_pdu->dci_alloc[0].format = format1A;
DCI_pdu->dci_alloc[0].ra_flag = 1;
DCI_pdu->dci_alloc[0].search_space = DCI_COMMON_SPACE;
RA_alloc_pdu.type = 1;
RA_alloc_pdu.vrb_type = 0;
RA_alloc_pdu.rballoc = computeRIV(25,12,3);
RA_alloc_pdu.ndi = 1;
RA_alloc_pdu.rv = 1;
RA_alloc_pdu.mcs = 4;
RA_alloc_pdu.harq_pid = 0;
RA_alloc_pdu.TPC = 1;
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],&RA_alloc_pdu,sizeof(DCI1A_5MHz_TDD_1_6_t));
break;
*/
// user 2
/*
DCI_pdu->dci_alloc[1].dci_length = sizeof_DCI0_5MHz_TDD_1_6_t ;
DCI_pdu->dci_alloc[1].L = 2;
DCI_pdu->dci_alloc[1].rnti = 0x1236;
DCI_pdu->dci_alloc[1].format = format0;
DCI_pdu->dci_alloc[1].ra_flag = 0;
UL_alloc_pdu.type = 0;
UL_alloc_pdu.hopping = 0;
if (cooperation_flag==0)
UL_alloc_pdu.rballoc = computeRIV(25,2+eNB->ue_ul_nb_rb,eNB->ue_ul_nb_rb);
else
UL_alloc_pdu.rballoc = computeRIV(25,0,eNB->ue_ul_nb_rb);
UL_alloc_pdu.mcs = eNB->target_ue_ul_mcs;
UL_alloc_pdu.ndi = proc->frame_tx&1;
UL_alloc_pdu.TPC = 0;
if ((cooperation_flag==0) || (cooperation_flag==1))
UL_alloc_pdu.cshift = 0;
else
UL_alloc_pdu.cshift = 1;
UL_alloc_pdu.dai = 0;
UL_alloc_pdu.cqi_req = 1;
memcpy((void*)&DCI_pdu->dci_alloc[1].dci_pdu[0],(void *)&UL_alloc_pdu,sizeof(DCI0_5MHz_TDD_1_6_t));
*/
}
/*
DCI_pdu->nCCE = 0;
for (i=0; i<DCI_pdu->Num_dci; i++) {
DCI_pdu->nCCE += (1<<(DCI_pdu->dci_alloc[i].L));
}
*/
}
//configure the processing in runtime
void configure_runtime(int new_mcs, short* iqr, short* iqi, int id){
uint32_t UL_alloc_pdu;
((DCI0_10MHz_FDD_t*)&UL_alloc_pdu)->type = 0;
((DCI0_10MHz_FDD_t*)&UL_alloc_pdu)->rballoc = computeRIV(PHY_vars_eNB[id]->lte_frame_parms.N_RB_UL,0,50);// 12 RBs from position 8
// printf("nb_rb %d/%d, rballoc %d (dci %x)\n",nb_rb,PHY_vars_eNB[id]->lte_frame_parms.N_RB_UL,((DCI0_10MHz_FDD_t*)&UL_alloc_pdu)->rballoc,*(uint32_t *)&UL_alloc_pdu);
((DCI0_10MHz_FDD_t*)&UL_alloc_pdu)->mcs = new_mcs;
((DCI0_10MHz_FDD_t*)&UL_alloc_pdu)->ndi = 1;
((DCI0_10MHz_FDD_t*)&UL_alloc_pdu)->TPC = 0;
((DCI0_10MHz_FDD_t*)&UL_alloc_pdu)->cqi_req = 0&1;
((DCI0_10MHz_FDD_t*)&UL_alloc_pdu)->cshift = 0;
((DCI0_10MHz_FDD_t*)&UL_alloc_pdu)->mcs = new_mcs;
generate_ue_ulsch_params_from_dci((void *)&UL_alloc_pdu,
14,
ul_subframe2pdcch_alloc_subframe(&PHY_vars_UE[id]->lte_frame_parms,subframe),
format0,
PHY_vars_UE[id],
SI_RNTI,
0,
P_RNTI,
CBA_RNTI,
0,
0);
if (PHY_vars_eNB[id]->ulsch_eNB[0] != NULL)
generate_eNB_ulsch_params_from_dci((void *)&UL_alloc_pdu,
14,
ul_subframe2pdcch_alloc_subframe(&PHY_vars_eNB[id]->lte_frame_parms,subframe),
format0,
0,
PHY_vars_eNB[id],
SI_RNTI,
0,
P_RNTI,
CBA_RNTI,
0);
// does not help
// int round = 0;
// harq_pid = subframe2harq_pid(&PHY_vars_UE[id]->lte_frame_parms,PHY_vars_UE[id]->frame_tx,subframe);
// // fflush(stdout);
// PHY_vars_eNB[id]->ulsch_eNB[0]->harq_processes[harq_pid]->round=round;
// PHY_vars_UE[id]->ulsch_ue[0]->harq_processes[harq_pid]->round=round;
// PHY_vars_eNB[id]->ulsch_eNB[0]->harq_processes[harq_pid]->rvidx = round>>1;
// PHY_vars_UE[id]->ulsch_ue[0]->harq_processes[harq_pid]->rvidx = round>>1;
int ii=0; int aa=0;
for(ii=0; ii< PHY_vars_eNB[id]->lte_frame_parms.samples_per_tti; ii++){
for (aa=0; aa < n_rx; aa++){
((short*) &PHY_vars_eNB[id]->lte_eNB_common_vars.rxdata[0][aa][PHY_vars_eNB[id]->lte_frame_parms.samples_per_tti*subframe])[2*ii] = iqr[ii];
((short*) &PHY_vars_eNB[id]->lte_eNB_common_vars.rxdata[0][aa][PHY_vars_eNB[id]->lte_frame_parms.samples_per_tti*subframe])[2*ii +1] = iqi[ii];
}
}
lte_eNB_I0_measurements(PHY_vars_eNB[id], 0, 1);
remove_7_5_kHz(PHY_vars_eNB[id],subframe<<1);
remove_7_5_kHz(PHY_vars_eNB[id],1+(subframe<<1));
}
DCI_PDU *get_dci(LTE_DL_FRAME_PARMS *lte_frame_parms,uint8_t log2L, uint8_t log2Lcommon, DCI_format_t format_selector[MAX_NUM_DCI], uint8_t num_dci, uint32_t rnti)
{
uint32_t BCCH_alloc_pdu[2];
uint32_t DLSCH_alloc_pdu[2];
uint32_t UL_alloc_pdu[2];
int ind;
int dci_length_bytes=0,dci_length=0;
int BCCH_pdu_size_bits=0, BCCH_pdu_size_bytes=0;
int UL_pdu_size_bits=0, UL_pdu_size_bytes=0;
int mcs = 3;
DCI_pdu.Num_dci = 0;
if (lte_frame_parms->frame_type == TDD) {
switch (lte_frame_parms->N_RB_DL) {
case 6:
dci_length = sizeof_DCI1_1_5MHz_TDD_t;
dci_length_bytes = sizeof(DCI1_1_5MHz_TDD_t);
((DCI1_1_5MHz_TDD_t *)&DLSCH_alloc_pdu[0])->rah = 0;
((DCI1_1_5MHz_TDD_t *)&DLSCH_alloc_pdu[0])->rballoc = DLSCH_RB_ALLOC;
((DCI1_1_5MHz_TDD_t *)&DLSCH_alloc_pdu[0])->mcs = mcs;
((DCI1_1_5MHz_TDD_t *)&DLSCH_alloc_pdu[0])->harq_pid = 0;
((DCI1_1_5MHz_TDD_t *)&DLSCH_alloc_pdu[0])->ndi = 1;
((DCI1_1_5MHz_TDD_t *)&DLSCH_alloc_pdu[0])->rv = 0;
((DCI1_1_5MHz_TDD_t *)&DLSCH_alloc_pdu[0])->TPC = 0;
((DCI1_1_5MHz_TDD_t *)&DLSCH_alloc_pdu[0])->dai = 0;
((DCI1A_1_5MHz_TDD_1_6_t*)&BCCH_alloc_pdu[0])->type = 1;
((DCI1A_1_5MHz_TDD_1_6_t*)&BCCH_alloc_pdu[0])->vrb_type = 0;
((DCI1A_1_5MHz_TDD_1_6_t*)&BCCH_alloc_pdu[0])->rballoc = computeRIV(lte_frame_parms->N_RB_DL, 0, 4);
((DCI1A_1_5MHz_TDD_1_6_t*)&BCCH_alloc_pdu[0])->ndi = 1;
((DCI1A_1_5MHz_TDD_1_6_t*)&BCCH_alloc_pdu[0])->rv = 0;
((DCI1A_1_5MHz_TDD_1_6_t*)&BCCH_alloc_pdu[0])->mcs = 2;
((DCI1A_1_5MHz_TDD_1_6_t*)&BCCH_alloc_pdu[0])->harq_pid = 0;
((DCI1A_1_5MHz_TDD_1_6_t*)&BCCH_alloc_pdu[0])->TPC = 1;
BCCH_pdu_size_bits = sizeof_DCI1A_1_5MHz_TDD_1_6_t;
BCCH_pdu_size_bytes = sizeof(DCI1A_1_5MHz_TDD_1_6_t);
((DCI0_1_5MHz_TDD_1_6_t*)&UL_alloc_pdu[0])->type = 0;
((DCI0_1_5MHz_TDD_1_6_t*)&UL_alloc_pdu[0])->hopping = 0;
((DCI0_1_5MHz_TDD_1_6_t*)&UL_alloc_pdu[0])->rballoc = DLSCH_RB_ALLOC;
((DCI0_1_5MHz_TDD_1_6_t*)&UL_alloc_pdu[0])->mcs = mcs;
((DCI0_1_5MHz_TDD_1_6_t*)&UL_alloc_pdu[0])->ndi = 1;
((DCI0_1_5MHz_TDD_1_6_t*)&UL_alloc_pdu[0])->TPC = 2;
((DCI0_1_5MHz_TDD_1_6_t*)&UL_alloc_pdu[0])->cshift = 3;
((DCI0_1_5MHz_TDD_1_6_t*)&UL_alloc_pdu[0])->dai = 1;
((DCI0_1_5MHz_TDD_1_6_t*)&UL_alloc_pdu[0])->cqi_req = 1;
UL_pdu_size_bits = sizeof_DCI0_1_5MHz_TDD_1_6_t;
UL_pdu_size_bytes = sizeof(DCI0_1_5MHz_TDD_1_6_t);
break;
case 25:
dci_length = sizeof_DCI1_5MHz_TDD_t;
dci_length_bytes = sizeof(DCI1_5MHz_TDD_t);
((DCI1_5MHz_TDD_t *)&DLSCH_alloc_pdu[0])->rah = 0;
((DCI1_5MHz_TDD_t *)&DLSCH_alloc_pdu[0])->rballoc = DLSCH_RB_ALLOC;
((DCI1_5MHz_TDD_t *)&DLSCH_alloc_pdu[0])->mcs = mcs;
((DCI1_5MHz_TDD_t *)&DLSCH_alloc_pdu[0])->harq_pid = 0;
((DCI1_5MHz_TDD_t *)&DLSCH_alloc_pdu[0])->ndi = 1;
((DCI1_5MHz_TDD_t *)&DLSCH_alloc_pdu[0])->rv = 0;
((DCI1_5MHz_TDD_t *)&DLSCH_alloc_pdu[0])->TPC = 0;
((DCI1_5MHz_TDD_t *)&DLSCH_alloc_pdu[0])->dai = 0;
((DCI1A_5MHz_TDD_1_6_t*)&BCCH_alloc_pdu[0])->type = 1;
((DCI1A_5MHz_TDD_1_6_t*)&BCCH_alloc_pdu[0])->vrb_type = 0;
((DCI1A_5MHz_TDD_1_6_t*)&BCCH_alloc_pdu[0])->rballoc = computeRIV(lte_frame_parms->N_RB_DL, 18, 4);
((DCI1A_5MHz_TDD_1_6_t*)&BCCH_alloc_pdu[0])->ndi = 1;
((DCI1A_5MHz_TDD_1_6_t*)&BCCH_alloc_pdu[0])->rv = 0;
((DCI1A_5MHz_TDD_1_6_t*)&BCCH_alloc_pdu[0])->mcs = 2;
((DCI1A_5MHz_TDD_1_6_t*)&BCCH_alloc_pdu[0])->harq_pid = 0;
((DCI1A_5MHz_TDD_1_6_t*)&BCCH_alloc_pdu[0])->TPC = 1;
BCCH_pdu_size_bits = sizeof_DCI1A_5MHz_TDD_1_6_t;
BCCH_pdu_size_bytes = sizeof(DCI1A_5MHz_TDD_1_6_t);
((DCI0_5MHz_TDD_1_6_t*)&UL_alloc_pdu[0])->type = 0;
((DCI0_5MHz_TDD_1_6_t*)&UL_alloc_pdu[0])->hopping = 0;
((DCI0_5MHz_TDD_1_6_t*)&UL_alloc_pdu[0])->rballoc = DLSCH_RB_ALLOC;
((DCI0_5MHz_TDD_1_6_t*)&UL_alloc_pdu[0])->mcs = mcs;
((DCI0_5MHz_TDD_1_6_t*)&UL_alloc_pdu[0])->ndi = 1;
((DCI0_5MHz_TDD_1_6_t*)&UL_alloc_pdu[0])->TPC = 2;
((DCI0_5MHz_TDD_1_6_t*)&UL_alloc_pdu[0])->cshift = 3;
((DCI0_5MHz_TDD_1_6_t*)&UL_alloc_pdu[0])->dai = 1;
((DCI0_5MHz_TDD_1_6_t*)&UL_alloc_pdu[0])->cqi_req = 1;
UL_pdu_size_bits = sizeof_DCI0_5MHz_TDD_1_6_t;
UL_pdu_size_bytes = sizeof(DCI0_5MHz_TDD_1_6_t);
break;
case 50:
dci_length = sizeof_DCI1_10MHz_TDD_t;
dci_length_bytes = sizeof(DCI1_10MHz_TDD_t);
((DCI1_10MHz_TDD_t *)&DLSCH_alloc_pdu[0])->rah = 0;
((DCI1_10MHz_TDD_t *)&DLSCH_alloc_pdu[0])->rballoc = DLSCH_RB_ALLOC;
((DCI1_10MHz_TDD_t *)&DLSCH_alloc_pdu[0])->mcs = mcs;
((DCI1_10MHz_TDD_t *)&DLSCH_alloc_pdu[0])->harq_pid = 0;
((DCI1_10MHz_TDD_t *)&DLSCH_alloc_pdu[0])->ndi = 1;
((DCI1_10MHz_TDD_t *)&DLSCH_alloc_pdu[0])->rv = 0;
((DCI1_10MHz_TDD_t *)&DLSCH_alloc_pdu[0])->TPC = 0;
((DCI1_10MHz_TDD_t *)&DLSCH_alloc_pdu[0])->dai = 0;
((DCI1A_10MHz_TDD_1_6_t*)&BCCH_alloc_pdu[0])->type = 1;
((DCI1A_10MHz_TDD_1_6_t*)&BCCH_alloc_pdu[0])->vrb_type = 0;
((DCI1A_10MHz_TDD_1_6_t*)&BCCH_alloc_pdu[0])->rballoc = computeRIV(lte_frame_parms->N_RB_DL, 30, 4);
((DCI1A_10MHz_TDD_1_6_t*)&BCCH_alloc_pdu[0])->ndi = 1;
((DCI1A_10MHz_TDD_1_6_t*)&BCCH_alloc_pdu[0])->rv = 0;
((DCI1A_10MHz_TDD_1_6_t*)&BCCH_alloc_pdu[0])->mcs = 2;
((DCI1A_10MHz_TDD_1_6_t*)&BCCH_alloc_pdu[0])->harq_pid = 0;
((DCI1A_10MHz_TDD_1_6_t*)&BCCH_alloc_pdu[0])->TPC = 1;
BCCH_pdu_size_bits = sizeof_DCI1A_10MHz_TDD_1_6_t;
BCCH_pdu_size_bytes = sizeof(DCI1A_10MHz_TDD_1_6_t);
((DCI0_10MHz_TDD_1_6_t*)&UL_alloc_pdu[0])->type = 0;
((DCI0_10MHz_TDD_1_6_t*)&UL_alloc_pdu[0])->hopping = 0;
((DCI0_10MHz_TDD_1_6_t*)&UL_alloc_pdu[0])->rballoc = DLSCH_RB_ALLOC;
((DCI0_10MHz_TDD_1_6_t*)&UL_alloc_pdu[0])->mcs = mcs;
((DCI0_10MHz_TDD_1_6_t*)&UL_alloc_pdu[0])->ndi = 1;
((DCI0_10MHz_TDD_1_6_t*)&UL_alloc_pdu[0])->TPC = 2;
((DCI0_10MHz_TDD_1_6_t*)&UL_alloc_pdu[0])->cshift = 3;
((DCI0_10MHz_TDD_1_6_t*)&UL_alloc_pdu[0])->dai = 1;
((DCI0_10MHz_TDD_1_6_t*)&UL_alloc_pdu[0])->cqi_req = 1;
UL_pdu_size_bits = sizeof_DCI0_10MHz_TDD_1_6_t;
UL_pdu_size_bytes = sizeof(DCI0_10MHz_TDD_1_6_t);
break;
case 100:
dci_length = sizeof_DCI1_20MHz_TDD_t;
dci_length_bytes = sizeof(DCI1_20MHz_TDD_t);
((DCI1_20MHz_TDD_t *)&DLSCH_alloc_pdu[0])->rah = 0;
((DCI1_20MHz_TDD_t *)&DLSCH_alloc_pdu[0])->rballoc = DLSCH_RB_ALLOC;
((DCI1_20MHz_TDD_t *)&DLSCH_alloc_pdu[0])->mcs = mcs;
((DCI1_20MHz_TDD_t *)&DLSCH_alloc_pdu[0])->harq_pid = 0;
((DCI1_20MHz_TDD_t *)&DLSCH_alloc_pdu[0])->ndi = 1;
((DCI1_20MHz_TDD_t *)&DLSCH_alloc_pdu[0])->rv = 0;
((DCI1_20MHz_TDD_t *)&DLSCH_alloc_pdu[0])->TPC = 0;
((DCI1_20MHz_TDD_t *)&DLSCH_alloc_pdu[0])->dai = 0;
((DCI1A_20MHz_TDD_1_6_t*)&BCCH_alloc_pdu[0])->type = 1;
((DCI1A_20MHz_TDD_1_6_t*)&BCCH_alloc_pdu[0])->vrb_type = 0;
((DCI1A_20MHz_TDD_1_6_t*)&BCCH_alloc_pdu[0])->rballoc = computeRIV(lte_frame_parms->N_RB_DL, 70, 4);
((DCI1A_20MHz_TDD_1_6_t*)&BCCH_alloc_pdu[0])->ndi = 1;
((DCI1A_20MHz_TDD_1_6_t*)&BCCH_alloc_pdu[0])->rv = 0;
((DCI1A_20MHz_TDD_1_6_t*)&BCCH_alloc_pdu[0])->mcs = 2;
((DCI1A_20MHz_TDD_1_6_t*)&BCCH_alloc_pdu[0])->harq_pid = 0;
((DCI1A_20MHz_TDD_1_6_t*)&BCCH_alloc_pdu[0])->TPC = 1;
BCCH_pdu_size_bits = sizeof_DCI1A_20MHz_TDD_1_6_t;
BCCH_pdu_size_bytes = sizeof(DCI1A_20MHz_TDD_1_6_t);
((DCI0_20MHz_TDD_1_6_t*)&UL_alloc_pdu[0])->type = 0;
((DCI0_20MHz_TDD_1_6_t*)&UL_alloc_pdu[0])->hopping = 0;
((DCI0_20MHz_TDD_1_6_t*)&UL_alloc_pdu[0])->rballoc = DLSCH_RB_ALLOC;
((DCI0_20MHz_TDD_1_6_t*)&UL_alloc_pdu[0])->mcs = mcs;
((DCI0_20MHz_TDD_1_6_t*)&UL_alloc_pdu[0])->ndi = 1;
((DCI0_20MHz_TDD_1_6_t*)&UL_alloc_pdu[0])->TPC = 2;
((DCI0_20MHz_TDD_1_6_t*)&UL_alloc_pdu[0])->cshift = 3;
((DCI0_20MHz_TDD_1_6_t*)&UL_alloc_pdu[0])->dai = 1;
((DCI0_20MHz_TDD_1_6_t*)&UL_alloc_pdu[0])->cqi_req = 1;
UL_pdu_size_bits = sizeof_DCI0_20MHz_TDD_1_6_t;
UL_pdu_size_bytes = sizeof(DCI0_20MHz_TDD_1_6_t);
break;
}
} else { //FDD
switch (lte_frame_parms->N_RB_DL) {
case 6:
dci_length = sizeof_DCI1_1_5MHz_FDD_t;
dci_length_bytes = sizeof(DCI1_1_5MHz_FDD_t);
((DCI1_1_5MHz_FDD_t *)&DLSCH_alloc_pdu[0])->rah = 0;
((DCI1_1_5MHz_FDD_t *)&DLSCH_alloc_pdu[0])->rballoc = DLSCH_RB_ALLOC;
((DCI1_1_5MHz_FDD_t *)&DLSCH_alloc_pdu[0])->mcs = mcs;
((DCI1_1_5MHz_FDD_t *)&DLSCH_alloc_pdu[0])->harq_pid = 0;
((DCI1_1_5MHz_FDD_t *)&DLSCH_alloc_pdu[0])->ndi = 1;
((DCI1_1_5MHz_FDD_t *)&DLSCH_alloc_pdu[0])->rv = 0;
((DCI1_1_5MHz_FDD_t *)&DLSCH_alloc_pdu[0])->TPC = 0;
((DCI1A_1_5MHz_FDD_t*)&BCCH_alloc_pdu[0])->type = 1;
((DCI1A_1_5MHz_FDD_t*)&BCCH_alloc_pdu[0])->vrb_type = 0;
((DCI1A_1_5MHz_FDD_t*)&BCCH_alloc_pdu[0])->rballoc = computeRIV(lte_frame_parms->N_RB_DL, 0, 4);
((DCI1A_1_5MHz_FDD_t*)&BCCH_alloc_pdu[0])->ndi = 1;
((DCI1A_1_5MHz_FDD_t*)&BCCH_alloc_pdu[0])->rv = 0;
((DCI1A_1_5MHz_FDD_t*)&BCCH_alloc_pdu[0])->mcs = 2;
((DCI1A_1_5MHz_FDD_t*)&BCCH_alloc_pdu[0])->harq_pid = 0;
((DCI1A_1_5MHz_FDD_t*)&BCCH_alloc_pdu[0])->TPC = 1;
BCCH_pdu_size_bits = sizeof_DCI1A_1_5MHz_FDD_t;
BCCH_pdu_size_bytes = sizeof(DCI1A_1_5MHz_FDD_t);
((DCI0_1_5MHz_FDD_t*)&UL_alloc_pdu[0])->type = 0;
((DCI0_1_5MHz_FDD_t*)&UL_alloc_pdu[0])->hopping = 0;
((DCI0_1_5MHz_FDD_t*)&UL_alloc_pdu[0])->rballoc = DLSCH_RB_ALLOC;
((DCI0_1_5MHz_FDD_t*)&UL_alloc_pdu[0])->mcs = mcs;
((DCI0_1_5MHz_FDD_t*)&UL_alloc_pdu[0])->ndi = 1;
((DCI0_1_5MHz_FDD_t*)&UL_alloc_pdu[0])->TPC = 2;
((DCI0_1_5MHz_FDD_t*)&UL_alloc_pdu[0])->cshift = 3;
((DCI0_1_5MHz_FDD_t*)&UL_alloc_pdu[0])->cqi_req = 1;
UL_pdu_size_bits = sizeof_DCI0_1_5MHz_FDD_t;
UL_pdu_size_bytes = sizeof(DCI0_1_5MHz_FDD_t);
break;
case 25:
dci_length = sizeof_DCI1_5MHz_FDD_t;
dci_length_bytes = sizeof(DCI1_5MHz_FDD_t);
((DCI1_5MHz_FDD_t *)&DLSCH_alloc_pdu[0])->rah = 0;
((DCI1_5MHz_FDD_t *)&DLSCH_alloc_pdu[0])->rballoc = DLSCH_RB_ALLOC;
((DCI1_5MHz_FDD_t *)&DLSCH_alloc_pdu[0])->mcs = mcs;
((DCI1_5MHz_FDD_t *)&DLSCH_alloc_pdu[0])->harq_pid = 0;
((DCI1_5MHz_FDD_t *)&DLSCH_alloc_pdu[0])->ndi = 1;
((DCI1_5MHz_FDD_t *)&DLSCH_alloc_pdu[0])->rv = 0;
((DCI1_5MHz_FDD_t *)&DLSCH_alloc_pdu[0])->TPC = 0;
((DCI1A_5MHz_FDD_t*)&BCCH_alloc_pdu[0])->type = 1;
((DCI1A_5MHz_FDD_t*)&BCCH_alloc_pdu[0])->vrb_type = 0;
((DCI1A_5MHz_FDD_t*)&BCCH_alloc_pdu[0])->rballoc = computeRIV(lte_frame_parms->N_RB_DL, 18, 4);
((DCI1A_5MHz_FDD_t*)&BCCH_alloc_pdu[0])->ndi = 1;
((DCI1A_5MHz_FDD_t*)&BCCH_alloc_pdu[0])->rv = 0;
((DCI1A_5MHz_FDD_t*)&BCCH_alloc_pdu[0])->mcs = 2;
((DCI1A_5MHz_FDD_t*)&BCCH_alloc_pdu[0])->harq_pid = 0;
((DCI1A_5MHz_FDD_t*)&BCCH_alloc_pdu[0])->TPC = 1;
BCCH_pdu_size_bits = sizeof_DCI1A_5MHz_FDD_t;
BCCH_pdu_size_bytes = sizeof(DCI1A_5MHz_FDD_t);
((DCI0_5MHz_FDD_t*)&UL_alloc_pdu[0])->type = 0;
((DCI0_5MHz_FDD_t*)&UL_alloc_pdu[0])->hopping = 0;
((DCI0_5MHz_FDD_t*)&UL_alloc_pdu[0])->rballoc = DLSCH_RB_ALLOC;
((DCI0_5MHz_FDD_t*)&UL_alloc_pdu[0])->mcs = mcs;
((DCI0_5MHz_FDD_t*)&UL_alloc_pdu[0])->ndi = 1;
((DCI0_5MHz_FDD_t*)&UL_alloc_pdu[0])->TPC = 2;
((DCI0_5MHz_FDD_t*)&UL_alloc_pdu[0])->cshift = 3;
((DCI0_5MHz_FDD_t*)&UL_alloc_pdu[0])->cqi_req = 1;
UL_pdu_size_bits = sizeof_DCI0_5MHz_FDD_t;
UL_pdu_size_bytes = sizeof(DCI0_5MHz_FDD_t);
break;
case 50:
dci_length = sizeof_DCI1_10MHz_FDD_t;
dci_length_bytes = sizeof(DCI1_10MHz_FDD_t);
((DCI1_10MHz_FDD_t *)&DLSCH_alloc_pdu[0])->rah = 0;
((DCI1_10MHz_FDD_t *)&DLSCH_alloc_pdu[0])->rballoc = DLSCH_RB_ALLOC;
((DCI1_10MHz_FDD_t *)&DLSCH_alloc_pdu[0])->mcs = mcs;
((DCI1_10MHz_FDD_t *)&DLSCH_alloc_pdu[0])->harq_pid = 0;
((DCI1_10MHz_FDD_t *)&DLSCH_alloc_pdu[0])->ndi = 1;
((DCI1_10MHz_FDD_t *)&DLSCH_alloc_pdu[0])->rv = 0;
((DCI1_10MHz_FDD_t *)&DLSCH_alloc_pdu[0])->TPC = 0;
((DCI1A_10MHz_FDD_t*)&BCCH_alloc_pdu[0])->type = 1;
((DCI1A_10MHz_FDD_t*)&BCCH_alloc_pdu[0])->vrb_type = 0;
((DCI1A_10MHz_FDD_t*)&BCCH_alloc_pdu[0])->rballoc = computeRIV(lte_frame_parms->N_RB_DL, 30, 4);
((DCI1A_10MHz_FDD_t*)&BCCH_alloc_pdu[0])->ndi = 1;
((DCI1A_10MHz_FDD_t*)&BCCH_alloc_pdu[0])->rv = 0;
((DCI1A_10MHz_FDD_t*)&BCCH_alloc_pdu[0])->mcs = 2;
((DCI1A_10MHz_FDD_t*)&BCCH_alloc_pdu[0])->harq_pid = 0;
((DCI1A_10MHz_FDD_t*)&BCCH_alloc_pdu[0])->TPC = 1;
BCCH_pdu_size_bits = sizeof_DCI1A_10MHz_FDD_t;
BCCH_pdu_size_bytes = sizeof(DCI1A_10MHz_FDD_t);
((DCI0_10MHz_FDD_t*)&UL_alloc_pdu[0])->type = 0;
((DCI0_10MHz_FDD_t*)&UL_alloc_pdu[0])->hopping = 0;
((DCI0_10MHz_FDD_t*)&UL_alloc_pdu[0])->rballoc = DLSCH_RB_ALLOC;
((DCI0_10MHz_FDD_t*)&UL_alloc_pdu[0])->mcs = mcs;
((DCI0_10MHz_FDD_t*)&UL_alloc_pdu[0])->ndi = 1;
((DCI0_10MHz_FDD_t*)&UL_alloc_pdu[0])->TPC = 2;
((DCI0_10MHz_FDD_t*)&UL_alloc_pdu[0])->cshift = 3;
((DCI0_10MHz_FDD_t*)&UL_alloc_pdu[0])->cqi_req = 1;
UL_pdu_size_bits = sizeof_DCI0_10MHz_FDD_t;
UL_pdu_size_bytes = sizeof(DCI0_10MHz_FDD_t);
break;
case 100:
dci_length = sizeof_DCI1_20MHz_FDD_t;
dci_length_bytes = sizeof(DCI1_20MHz_FDD_t);
((DCI1_20MHz_FDD_t *)&DLSCH_alloc_pdu[0])->rah = 0;
((DCI1_20MHz_FDD_t *)&DLSCH_alloc_pdu[0])->rballoc = DLSCH_RB_ALLOC;
((DCI1_20MHz_FDD_t *)&DLSCH_alloc_pdu[0])->mcs = mcs;
((DCI1_20MHz_FDD_t *)&DLSCH_alloc_pdu[0])->harq_pid = 0;
((DCI1_20MHz_FDD_t *)&DLSCH_alloc_pdu[0])->ndi = 1;
((DCI1_20MHz_FDD_t *)&DLSCH_alloc_pdu[0])->rv = 0;
((DCI1_20MHz_FDD_t *)&DLSCH_alloc_pdu[0])->TPC = 0;
((DCI1A_20MHz_FDD_t*)&BCCH_alloc_pdu[0])->type = 1;
((DCI1A_20MHz_FDD_t*)&BCCH_alloc_pdu[0])->vrb_type = 0;
((DCI1A_20MHz_FDD_t*)&BCCH_alloc_pdu[0])->rballoc = computeRIV(lte_frame_parms->N_RB_DL, 70, 4);
((DCI1A_20MHz_FDD_t*)&BCCH_alloc_pdu[0])->ndi = 1;
((DCI1A_20MHz_FDD_t*)&BCCH_alloc_pdu[0])->rv = 0;
((DCI1A_20MHz_FDD_t*)&BCCH_alloc_pdu[0])->mcs = 2;
((DCI1A_20MHz_FDD_t*)&BCCH_alloc_pdu[0])->harq_pid = 0;
((DCI1A_20MHz_FDD_t*)&BCCH_alloc_pdu[0])->TPC = 1;
BCCH_pdu_size_bits = sizeof_DCI1A_20MHz_FDD_t;
BCCH_pdu_size_bytes = sizeof(DCI1A_20MHz_FDD_t);
((DCI0_20MHz_FDD_t*)&UL_alloc_pdu[0])->type = 0;
((DCI0_20MHz_FDD_t*)&UL_alloc_pdu[0])->hopping = 0;
((DCI0_20MHz_FDD_t*)&UL_alloc_pdu[0])->rballoc = DLSCH_RB_ALLOC;
((DCI0_20MHz_FDD_t*)&UL_alloc_pdu[0])->mcs = mcs;
((DCI0_20MHz_FDD_t*)&UL_alloc_pdu[0])->ndi = 1;
((DCI0_20MHz_FDD_t*)&UL_alloc_pdu[0])->TPC = 2;
((DCI0_20MHz_FDD_t*)&UL_alloc_pdu[0])->cshift = 3;
((DCI0_20MHz_FDD_t*)&UL_alloc_pdu[0])->cqi_req = 1;
UL_pdu_size_bits = sizeof_DCI0_20MHz_FDD_t;
UL_pdu_size_bytes = sizeof(DCI0_20MHz_FDD_t);
break;
}
}
for (ind = 0; ind<num_dci; ind++) {
if (format_selector[ind]==format1A) {
// add common dci
DCI_pdu.dci_alloc[ind].dci_length = BCCH_pdu_size_bits;
DCI_pdu.dci_alloc[ind].L = log2Lcommon;
DCI_pdu.dci_alloc[ind].rnti = SI_RNTI;
DCI_pdu.dci_alloc[ind].format = format1A;
DCI_pdu.dci_alloc[ind].ra_flag = 0;
DCI_pdu.dci_alloc[ind].search_space = DCI_COMMON_SPACE;
memcpy((void*)&DCI_pdu.dci_alloc[ind].dci_pdu[0], &BCCH_alloc_pdu[0], BCCH_pdu_size_bytes);
DCI_pdu.Num_dci++;
printf("Added common dci (%d) for rnti %x\n",ind,SI_RNTI);
}
if (format_selector[ind]==format1) {
DCI_pdu.dci_alloc[ind].dci_length = dci_length;
DCI_pdu.dci_alloc[ind].L = log2L;
DCI_pdu.dci_alloc[ind].rnti = rnti;
DCI_pdu.dci_alloc[ind].format = format1;
DCI_pdu.dci_alloc[ind].ra_flag = 0;
DCI_pdu.dci_alloc[ind].search_space = DCI_UE_SPACE;
memcpy((void*)&DCI_pdu.dci_alloc[ind].dci_pdu[0], &DLSCH_alloc_pdu[0], dci_length_bytes);
DCI_pdu.Num_dci++;
}
if (format_selector[ind]==format0) {
DCI_pdu.dci_alloc[ind].dci_length = UL_pdu_size_bits;
DCI_pdu.dci_alloc[ind].L = log2L;
DCI_pdu.dci_alloc[ind].rnti = rnti;
DCI_pdu.dci_alloc[ind].format = format0;
DCI_pdu.dci_alloc[ind].ra_flag = 0;
DCI_pdu.dci_alloc[ind].search_space = DCI_UE_SPACE;
memcpy((void*)&DCI_pdu.dci_alloc[ind].dci_pdu[0], &UL_alloc_pdu[0], UL_pdu_size_bytes);
DCI_pdu.Num_dci++;
}
}
return(&DCI_pdu);
}
void configure(int argc, char **argv, int trials, short* iqr, short* iqi, int mmcs, int nrx, int num_bss){
mcs = mmcs;
/**************************************************************************/
char c;
int i, j,u;
double snr0=-2.0,snr1,rate;
double input_snr_step=.2,snr_int=30;
double forgetting_factor=0.0; //in [0,1] 0 means a new channel every time, 1 means keep the same channel
uint8_t extended_prefix_flag=0;
int eNB_id = 0;
int chMod = 0 ;
int UE_id = 0;
unsigned char l;
int **txdata;
unsigned char awgn_flag = 0 ;
SCM_t channel_model=Rice1;
unsigned int coded_bits_per_codeword,nsymb;
uint8_t transmission_mode=1,n_tx=1;
n_rx = nrx;
FILE *input_fdUL=NULL;
short input_val_str, input_val_str2;
int n_frames=1000;
int n_ch_rlz = 1;
int abstx = 0;
channel_desc_t *UE2eNB;
int delay = 0;
double maxDoppler = 0.0;
uint8_t srs_flag = 0;
uint8_t N_RB_DL=50,osf=1;
uint8_t beta_ACK=0,beta_RI=0,beta_CQI=2;
uint8_t tdd_config=3,frame_type=FDD;
uint8_t N0=30;
double tx_gain=1.0;
double cpu_freq_GHz;
int s;
int dump_perf=0;
int test_perf=0;
int dump_table =0;
double effective_rate=0.0;
char channel_model_input[10];
uint8_t max_turbo_iterations=4;
int nb_rb_set = 0;
int sf;
/***************************************************************************/
logInit();
while ((c = getopt (argc, argv, "hapZbm:n:Y:X:x:s:w:e:q:d:D:O:c:r:i:f:y:c:oA:C:R:g:N:l:S:T:QB:PI:L")) != -1) {
switch (c) {
case 'a':
channel_model = AWGN;
chMod = 1;
break;
case 'b':
bundling_flag = 0;
break;
case 'd':
delay = atoi(optarg);
break;
case 'D':
maxDoppler = atoi(optarg);
break;
case 'm':
mcs = atoi(optarg);
break;
case 'n':
n_frames = atoi(optarg);
break;
case 'Y':
n_ch_rlz = atoi(optarg);
break;
case 'X':
abstx= atoi(optarg);
break;
case 'g':
sprintf(channel_model_input,optarg,10);
switch((char)*optarg) {
case 'A':
channel_model=SCM_A;
chMod = 2;
break;
case 'B':
channel_model=SCM_B;
chMod = 3;
break;
case 'C':
channel_model=SCM_C;
chMod = 4;
break;
case 'D':
channel_model=SCM_D;
chMod = 5;
break;
case 'E':
channel_model=EPA;
chMod = 6;
break;
case 'F':
channel_model=EVA;
chMod = 7;
break;
case 'G':
channel_model=ETU;
chMod = 8;
break;
case 'H':
channel_model=Rayleigh8;
chMod = 9;
break;
case 'I':
channel_model=Rayleigh1;
chMod = 10;
break;
case 'J':
channel_model=Rayleigh1_corr;
chMod = 11;
break;
case 'K':
channel_model=Rayleigh1_anticorr;
chMod = 12;
break;
case 'L':
channel_model=Rice8;
chMod = 13;
break;
case 'M':
channel_model=Rice1;
chMod = 14;
break;
case 'N':
channel_model=AWGN;
chMod = 1;
break;
default:
msg("Unsupported channel model!\n");
exit(-1);
break;
}
break;
case 's':
snr0 = atof(optarg);
break;
case 'w':
snr_int = atof(optarg);
break;
case 'e':
input_snr_step= atof(optarg);
break;
case 'x':
transmission_mode=atoi(optarg);
if ((transmission_mode!=1) &&
(transmission_mode!=2)) {
msg("Unsupported transmission mode %d\n",transmission_mode);
exit(-1);
}
if (transmission_mode>1) {
n_tx = 1;
}
break;
case 'y':
n_rx = atoi(optarg);
break;
case 'S':
subframe = atoi(optarg);
break;
case 'T':
tdd_config=atoi(optarg);
frame_type=TDD;
break;
case 'p':
extended_prefix_flag=1;
break;
case 'r':
nb_rb = atoi(optarg);
nb_rb_set = 1;
break;
case 'f':
first_rb = atoi(optarg);
break;
case 'c':
cyclic_shift = atoi(optarg);
break;
case 'N':
N0 = atoi(optarg);
break;
case 'o':
srs_flag = 1;
break;
case 'i':
input_fdUL = fopen(optarg,"r");
printf("Reading in %s (%p)\n",optarg,input_fdUL);
if (input_fdUL == (FILE*)NULL) {
printf("Unknown file %s\n",optarg);
exit(-1);
}
// input_file=1;
break;
case 'A':
beta_ACK = atoi(optarg);
if (beta_ACK>15) {
printf("beta_ack must be in (0..15)\n");
exit(-1);
}
break;
case 'C':
beta_CQI = atoi(optarg);
if ((beta_CQI>15)||(beta_CQI<2)) {
printf("beta_cqi must be in (2..15)\n");
exit(-1);
}
break;
case 'R':
beta_RI = atoi(optarg);
if ((beta_RI>15)||(beta_RI<2)) {
printf("beta_ri must be in (0..13)\n");
exit(-1);
}
break;
case 'Q':
cqi_flag=1;
break;
case 'B':
N_RB_DL=atoi(optarg);
break;
case 'P':
dump_perf=1;
opp_enabled=1;
break;
case 'O':
test_perf=atoi(optarg);
//print_perf =1;
break;
case 'L':
llr8_flag=1;
break;
case 'I':
max_turbo_iterations=atoi(optarg);
break;
case 'Z':
dump_table = 1;
break;
case 'h':
default:
printf("%s -h(elp) -a(wgn on) -m mcs -n n_frames -s snr0 -t delay_spread -p (extended prefix on) -r nb_rb -f first_rb -c cyclic_shift -o (srs on) -g channel_model [A:M] Use 3GPP 25.814 SCM-A/B/C/D('A','B','C','D') or 36-101 EPA('E'), EVA ('F'),ETU('G') models (ignores delay spread and Ricean factor), Rayghleigh8 ('H'), Rayleigh1('I'), Rayleigh1_corr('J'), Rayleigh1_anticorr ('K'), Rice8('L'), Rice1('M'), -d Channel delay, -D maximum Doppler shift \n",
argv[0]);
exit(1);
break;
}
}
lte_param_init(1,n_rx,1,extended_prefix_flag,N_RB_DL,frame_type,tdd_config,osf, num_bss);
int loop = 0;
for (loop = 0; loop < num_bss; loop++){
if (nb_rb_set == 0){
nb_rb = PHY_vars_eNB[loop]->lte_frame_parms.N_RB_UL;
}
// frame_parms = &PHY_vars_eNB[loop]->lte_frame_parms;
txdata = PHY_vars_UE[loop]->lte_ue_common_vars.txdata;
nsymb = (PHY_vars_eNB[loop]->lte_frame_parms.Ncp == 0) ? 14 : 12;
coded_bits_per_codeword = nb_rb * (12 * get_Qm(mcs)) * nsymb;
rate = (double)2*dlsch_tbs25[get_I_TBS(mcs)][25-1]/(coded_bits_per_codeword);
PHY_vars_UE[loop]->lte_ue_pdcch_vars[0]->crnti = 14;
PHY_vars_UE[loop]->lte_frame_parms.soundingrs_ul_config_common.srs_BandwidthConfig = 2;
PHY_vars_UE[loop]->lte_frame_parms.soundingrs_ul_config_common.srs_SubframeConfig = 7;
PHY_vars_UE[loop]->soundingrs_ul_config_dedicated[eNB_id].srs_Bandwidth = 0;
PHY_vars_UE[loop]->soundingrs_ul_config_dedicated[eNB_id].transmissionComb = 0;
PHY_vars_UE[loop]->soundingrs_ul_config_dedicated[eNB_id].freqDomainPosition = 0;
PHY_vars_eNB[loop]->lte_frame_parms.soundingrs_ul_config_common.srs_BandwidthConfig = 2;
PHY_vars_eNB[loop]->lte_frame_parms.soundingrs_ul_config_common.srs_SubframeConfig = 7;
PHY_vars_eNB[loop]->soundingrs_ul_config_dedicated[UE_id].srs_ConfigIndex = 1;
PHY_vars_eNB[loop]->soundingrs_ul_config_dedicated[UE_id].srs_Bandwidth = 0;
PHY_vars_eNB[loop]->soundingrs_ul_config_dedicated[UE_id].transmissionComb = 0;
PHY_vars_eNB[loop]->soundingrs_ul_config_dedicated[UE_id].freqDomainPosition = 0;
PHY_vars_eNB[loop]->cooperation_flag = cooperation_flag;
// PHY_vars_eNB[loop]->eNB_UE_stats[0].SRS_parameters = PHY_vars_UE[loop]->SRS_parameters;
PHY_vars_eNB[loop]->pusch_config_dedicated[UE_id].betaOffset_ACK_Index = beta_ACK;
PHY_vars_eNB[loop]->pusch_config_dedicated[UE_id].betaOffset_RI_Index = beta_RI;
PHY_vars_eNB[loop]->pusch_config_dedicated[UE_id].betaOffset_CQI_Index = beta_CQI;
PHY_vars_UE[loop]->pusch_config_dedicated[eNB_id].betaOffset_ACK_Index = beta_ACK;
PHY_vars_UE[loop]->pusch_config_dedicated[eNB_id].betaOffset_RI_Index = beta_RI;
PHY_vars_UE[loop]->pusch_config_dedicated[eNB_id].betaOffset_CQI_Index = beta_CQI;
PHY_vars_UE[loop]->ul_power_control_dedicated[eNB_id].deltaMCS_Enabled = 1;
UE2eNB = new_channel_desc_scm(PHY_vars_eNB[loop]->lte_frame_parms.nb_antennas_tx,
PHY_vars_UE[loop]->lte_frame_parms.nb_antennas_rx,
channel_model,
BW,
forgetting_factor,
delay,
0);
// set Doppler
UE2eNB->max_Doppler = maxDoppler;
// NN: N_RB_UL has to be defined in ulsim
PHY_vars_eNB[loop]->ulsch_eNB[0] = new_eNB_ulsch(8,max_turbo_iterations,N_RB_DL,0);
PHY_vars_UE[loop]->ulsch_ue[0] = new_ue_ulsch(8,N_RB_DL,0);
// Create transport channel structures for 2 transport blocks (MIMO)
for (i=0; i<2; i++) {
PHY_vars_eNB[loop]->dlsch_eNB[0][i] = new_eNB_dlsch(1,8,N_RB_DL,0);
PHY_vars_UE[loop]->dlsch_ue[0][i] = new_ue_dlsch(1,8,MAX_TURBO_ITERATIONS,N_RB_DL,0);
if (!PHY_vars_eNB[loop]->dlsch_eNB[0][i]) {
printf("Can't get eNB dlsch structures\n");
exit(-1);
}
if (!PHY_vars_UE[loop]->dlsch_ue[0][i]) {
printf("Can't get ue dlsch structures\n");
exit(-1);
}
PHY_vars_eNB[loop]->dlsch_eNB[0][i]->rnti = 14;
PHY_vars_UE[loop]->dlsch_ue[0][i]->rnti = 14;
}
switch (PHY_vars_eNB[loop]->lte_frame_parms.N_RB_UL) {
case 6:
break;
case 50:
if (PHY_vars_eNB[loop]->lte_frame_parms.frame_type == TDD) {
((DCI0_10MHz_TDD_1_6_t*)&UL_alloc_pdu)->type = 0;
((DCI0_10MHz_TDD_1_6_t*)&UL_alloc_pdu)->rballoc = computeRIV(PHY_vars_eNB[loop]->lte_frame_parms.N_RB_UL,first_rb,nb_rb);// 12 RBs from position 8
printf("nb_rb %d/%d, rballoc %d (dci %x)\n",nb_rb,PHY_vars_eNB[loop]->lte_frame_parms.N_RB_UL,((DCI0_10MHz_TDD_1_6_t*)&UL_alloc_pdu)->rballoc,*(uint32_t *)&UL_alloc_pdu);
((DCI0_10MHz_TDD_1_6_t*)&UL_alloc_pdu)->mcs = mcs;
((DCI0_10MHz_TDD_1_6_t*)&UL_alloc_pdu)->ndi = 1;
((DCI0_10MHz_TDD_1_6_t*)&UL_alloc_pdu)->TPC = 0;
((DCI0_10MHz_TDD_1_6_t*)&UL_alloc_pdu)->cqi_req = cqi_flag&1;
((DCI0_10MHz_TDD_1_6_t*)&UL_alloc_pdu)->cshift = 0;
((DCI0_10MHz_TDD_1_6_t*)&UL_alloc_pdu)->dai = 1;
} else {
((DCI0_10MHz_FDD_t*)&UL_alloc_pdu)->type = 0;
((DCI0_10MHz_FDD_t*)&UL_alloc_pdu)->rballoc = computeRIV(PHY_vars_eNB[loop]->lte_frame_parms.N_RB_UL,first_rb,nb_rb);// 12 RBs from position 8
printf("nb_rb %d/%d, rballoc %d (dci %x)\n",nb_rb,PHY_vars_eNB[loop]->lte_frame_parms.N_RB_UL,((DCI0_10MHz_FDD_t*)&UL_alloc_pdu)->rballoc,*(uint32_t *)&UL_alloc_pdu);
((DCI0_10MHz_FDD_t*)&UL_alloc_pdu)->mcs = mcs;
((DCI0_10MHz_FDD_t*)&UL_alloc_pdu)->ndi = 1;
((DCI0_10MHz_FDD_t*)&UL_alloc_pdu)->TPC = 0;
((DCI0_10MHz_FDD_t*)&UL_alloc_pdu)->cqi_req = cqi_flag&1;
((DCI0_10MHz_FDD_t*)&UL_alloc_pdu)->cshift = 0;
}
break;
default:
break;
}
PHY_vars_UE[loop]->PHY_measurements.rank[0] = 0;
PHY_vars_UE[loop]->transmission_mode[0] = 2;
PHY_vars_UE[loop]->pucch_config_dedicated[0].tdd_AckNackFeedbackMode = bundling_flag == 1 ? bundling : multiplexing;
PHY_vars_eNB[loop]->transmission_mode[0] = 2;
PHY_vars_eNB[loop]->pucch_config_dedicated[0].tdd_AckNackFeedbackMode = bundling_flag == 1 ? bundling : multiplexing;
PHY_vars_UE[loop]->lte_frame_parms.pusch_config_common.ul_ReferenceSignalsPUSCH.groupHoppingEnabled = 1;
PHY_vars_eNB[loop]->lte_frame_parms.pusch_config_common.ul_ReferenceSignalsPUSCH.groupHoppingEnabled = 1;
PHY_vars_UE[loop]->lte_frame_parms.pusch_config_common.ul_ReferenceSignalsPUSCH.sequenceHoppingEnabled = 0;
PHY_vars_eNB[loop]->lte_frame_parms.pusch_config_common.ul_ReferenceSignalsPUSCH.sequenceHoppingEnabled = 0;
PHY_vars_UE[loop]->lte_frame_parms.pusch_config_common.ul_ReferenceSignalsPUSCH.groupAssignmentPUSCH = 0;
PHY_vars_eNB[loop]->lte_frame_parms.pusch_config_common.ul_ReferenceSignalsPUSCH.groupAssignmentPUSCH = 0;
PHY_vars_UE[loop]->frame_tx=1;
for (sf=0; sf<10; sf++) {
PHY_vars_eNB[loop]->proc[sf].frame_tx=1;
PHY_vars_eNB[loop]->proc[sf].subframe_tx=sf;
PHY_vars_eNB[loop]->proc[sf].frame_rx=1;
PHY_vars_eNB[loop]->proc[sf].subframe_rx=sf;
}
msg("Init UL hopping UE\n");
init_ul_hopping(&PHY_vars_UE[loop]->lte_frame_parms);
msg("Init UL hopping eNB\n");
init_ul_hopping(&PHY_vars_eNB[loop]->lte_frame_parms);
PHY_vars_eNB[loop]->proc[subframe].frame_rx = PHY_vars_UE[loop]->frame_tx;
if (ul_subframe2pdcch_alloc_subframe(&PHY_vars_eNB[loop]->lte_frame_parms,subframe) > subframe) // allocation was in previous frame
PHY_vars_eNB[loop]->proc[ul_subframe2pdcch_alloc_subframe(&PHY_vars_eNB[loop]->lte_frame_parms,subframe)].frame_tx = (PHY_vars_UE[loop]->frame_tx-1)&1023;
PHY_vars_UE[loop]->dlsch_ue[0][0]->harq_ack[ul_subframe2pdcch_alloc_subframe(&PHY_vars_eNB[loop]->lte_frame_parms,subframe)].send_harq_status = 1;
PHY_vars_UE[loop]->frame_tx = (PHY_vars_UE[loop]->frame_tx-1)&1023;
printf("**********************here=1**************************\n");
generate_ue_ulsch_params_from_dci((void *)&UL_alloc_pdu,
14,
ul_subframe2pdcch_alloc_subframe(&PHY_vars_UE[loop]->lte_frame_parms,subframe),
format0,
PHY_vars_UE[loop],
SI_RNTI,
0,
P_RNTI,
CBA_RNTI,
0,
srs_flag);
if (PHY_vars_eNB[loop]->ulsch_eNB[0] != NULL)
generate_eNB_ulsch_params_from_dci((void *)&UL_alloc_pdu,
14,
ul_subframe2pdcch_alloc_subframe(&PHY_vars_eNB[loop]->lte_frame_parms,subframe),
format0,
0,
PHY_vars_eNB[loop],
SI_RNTI,
0,
P_RNTI,
CBA_RNTI,
srs_flag);
PHY_vars_UE[loop]->frame_tx = (PHY_vars_UE[loop]->frame_tx+1)&1023;
printf("**********************here=2**************************\n");
int round = 0;
harq_pid = subframe2harq_pid(&PHY_vars_UE[loop]->lte_frame_parms,PHY_vars_UE[loop]->frame_tx,subframe);
// fflush(stdout);
PHY_vars_eNB[loop]->ulsch_eNB[0]->harq_processes[harq_pid]->round=round;
PHY_vars_UE[loop]->ulsch_ue[0]->harq_processes[harq_pid]->round=round;
PHY_vars_eNB[loop]->ulsch_eNB[0]->harq_processes[harq_pid]->rvidx = round>>1;
PHY_vars_UE[loop]->ulsch_ue[0]->harq_processes[harq_pid]->rvidx = round>>1;
/////////////////////
int aa = 0; int ii=0;
for(ii=0; ii< PHY_vars_eNB[loop]->lte_frame_parms.samples_per_tti; ii++){
for (aa=0; aa < n_rx; aa++){
((short*) &PHY_vars_eNB[loop]->lte_eNB_common_vars.rxdata[0][aa][PHY_vars_eNB[loop]->lte_frame_parms.samples_per_tti*subframe])[2*ii] = iqr[ii];
((short*) &PHY_vars_eNB[loop]->lte_eNB_common_vars.rxdata[0][aa][PHY_vars_eNB[loop]->lte_frame_parms.samples_per_tti*subframe])[2*ii +1] = iqi[ii];
}
}
printf("Loaded %d IQ samples\n", PHY_vars_eNB[loop]->lte_frame_parms.samples_per_tti);
lte_eNB_I0_measurements(PHY_vars_eNB[loop], 0, 1);
PHY_vars_eNB[loop]->ulsch_eNB[0]->cyclicShift = cyclic_shift;// cyclic shift for DMRS
remove_7_5_kHz(PHY_vars_eNB[loop],subframe<<1);
remove_7_5_kHz(PHY_vars_eNB[loop],1+(subframe<<1));
}
}