C++ (Cpp) control_bank_with_AND Examples

Example #1

File: mapper_74x161x161x32.c Project: punesemu/puNES

void extcl_cpu_wr_mem_74x161x161x32(WORD address, BYTE value) {
	/* bus conflict */
	const BYTE save = value &= prg_rom_rd(address);
	DBWORD bank;

	if (type == IC74X161X161X32B) {
		if (value & 0x80) {
			mirroring_SCR1();
		} else {
			mirroring_SCR0();
		}
	}

	control_bank_with_AND(0x0F, info.chr.rom[0].max.banks_8k)
	bank = value << 13;
	chr.bank_1k[0] = chr_chip_byte_pnt(0, bank);
	chr.bank_1k[1] = chr_chip_byte_pnt(0, bank | 0x0400);
	chr.bank_1k[2] = chr_chip_byte_pnt(0, bank | 0x0800);
	chr.bank_1k[3] = chr_chip_byte_pnt(0, bank | 0x0C00);
	chr.bank_1k[4] = chr_chip_byte_pnt(0, bank | 0x1000);
	chr.bank_1k[5] = chr_chip_byte_pnt(0, bank | 0x1400);
	chr.bank_1k[6] = chr_chip_byte_pnt(0, bank | 0x1800);
	chr.bank_1k[7] = chr_chip_byte_pnt(0, bank | 0x1C00);

	value = save >> 4;
	control_bank(info.prg.rom[0].max.banks_16k)
	map_prg_rom_8k(2, 0, value);
	map_prg_rom_8k_update();
}

Example #2

File: mapper_Bandai.c Project: punesemu/puNES

void extcl_cpu_wr_mem_Bandai_161x02x74(WORD address, BYTE value) {
    /* bus conflict */
    const BYTE save = value &= prg_rom_rd(address);
    DBWORD bank;

    control_bank_with_AND(0x03, info.prg.rom[0].max.banks_32k)
    map_prg_rom_8k(4, 0, value);
    map_prg_rom_8k_update();

    b161x02x74_chr_4k_update();
}

Example #3

File: mapper_CPROM.c Project: Dabil/puNES

void extcl_cpu_wr_mem_CPROM(WORD address, BYTE value) {
	DBWORD bank;

	/* bus conflict */
	value &= prg_rom_rd(address);

	control_bank_with_AND(0x03, info.chr.rom.max.banks_4k)
	bank = value << 12;
	chr.bank_1k[4] = chr_chip_byte_pnt(0, bank);
	chr.bank_1k[5] = chr_chip_byte_pnt(0, bank | 0x0400);
	chr.bank_1k[6] = chr_chip_byte_pnt(0, bank | 0x0800);
	chr.bank_1k[7] = chr_chip_byte_pnt(0, bank | 0x0C00);
}

Example #4

File: mapper_GxROM.c Project: bentley/puNES

void extcl_cpu_wr_mem_GxROM(WORD address, BYTE value) {
    /* bus conflict */
    BYTE save = value &= prg_rom_rd(address);
    DBWORD bank;

    value >>= 4;
    control_bank_with_AND(0x03, info.prg.rom.max.banks_32k)
    map_prg_rom_8k(4, 0, value);
    map_prg_rom_8k_update();

    value = save;
    control_bank_with_AND(0x03, info.chr.rom.max.banks_8k)
    bank = value << 13;
    chr.bank_1k[0] = chr_chip_byte_pnt(0, bank);
    chr.bank_1k[1] = chr_chip_byte_pnt(0, bank | 0x0400);
    chr.bank_1k[2] = chr_chip_byte_pnt(0, bank | 0x0800);
    chr.bank_1k[3] = chr_chip_byte_pnt(0, bank | 0x0C00);
    chr.bank_1k[4] = chr_chip_byte_pnt(0, bank | 0x1000);
    chr.bank_1k[5] = chr_chip_byte_pnt(0, bank | 0x1400);
    chr.bank_1k[6] = chr_chip_byte_pnt(0, bank | 0x1800);
    chr.bank_1k[7] = chr_chip_byte_pnt(0, bank | 0x1C00);
}

Example #5

File: mapper_Irem.c Project: punesemu/puNES

void extcl_cpu_wr_mem_Irem_LROG017(WORD address, BYTE value) {
	/* bus conflict */
	const BYTE save = value &= prg_rom_rd(address);
	DBWORD bank;

	control_bank_with_AND(0x0F, info.prg.rom[0].max.banks_32k)
	map_prg_rom_8k(4, 0, value);
	map_prg_rom_8k_update();

	value = save >> 4;
	control_bank(info.chr.rom[0].max.banks_2k)
	bank = value << 11;
	chr.bank_1k[0] = chr_chip_byte_pnt(0, bank);
	chr.bank_1k[1] = chr_chip_byte_pnt(0, bank | 0x0400);
}

Example #6

File: mapper_AxROM.c Project: Dabil/puNES

void extcl_cpu_wr_mem_AxROM(WORD address, BYTE value) {
	/* bus conflict */
	if (info.mapper.submapper == AMROM) {
		value &= prg_rom_rd(address);
	}

	if (value & 0x10) {
		mirroring_SCR0();
	} else {
		mirroring_SCR1();
	}

	control_bank_with_AND(0x0F, info.prg.rom.max.banks_32k)
	map_prg_rom_8k(4, 0, value);
	map_prg_rom_8k_update();
}

Example #7

File: mapper_VRC3.c Project: punesemu/puNES

void extcl_cpu_wr_mem_VRC3(WORD address, BYTE value) {
	switch (address & 0xF000) {
		case 0x8000:
			vrc3.reload = (vrc3.reload & 0xFFF0) | (value & 0x0F);
			return;
		case 0x9000:
			vrc3.reload = (vrc3.reload & 0xFF0F) | ((value & 0x0F) << 4);
			return;
		case 0xA000:
			vrc3.reload = (vrc3.reload & 0xF0FF) | ((value & 0x0F) << 8);
			return;
		case 0xB000:
			vrc3.reload = (vrc3.reload & 0x0FFF) | ((value & 0x0F) << 12);
			return;
		case 0xC000:
			vrc3.acknowledge = value & 0x01;
			vrc3.enabled = value & 0x02;
			vrc3.mode = value & 0x04;
			vrc3.mask = 0xFFFF;
			if (vrc3.mode) {
				vrc3.mask = 0x00FF;
			}
			if (vrc3.enabled) {
				vrc3.count = vrc3.reload;
			}
			irq.high &= ~EXT_IRQ;
			return;
		case 0xD000:
			vrc3.enabled = vrc3.acknowledge;
			irq.high &= ~EXT_IRQ;
			return;
		case 0xF000:
			control_bank_with_AND(0x0F, info.prg.rom[0].max.banks_16k)
			map_prg_rom_8k(2, 0, value);
			map_prg_rom_8k_update();
			return;
		default:
			return;
	}
}