void __init cpm_reset(void) { sysconf8xx_t __iomem *siu_conf; mpc8xx_immr = ioremap(get_immrbase(), 0x4000); if (!mpc8xx_immr) { printk(KERN_CRIT "Could not map IMMR\n"); return; } cpmp = &mpc8xx_immr->im_cpm; #ifndef CONFIG_PPC_EARLY_DEBUG_CPM out_be16(&cpmp->cp_cpcr, CPM_CR_RST | CPM_CR_FLG); while (in_be16(&cpmp->cp_cpcr) & CPM_CR_FLG); #endif #ifdef CONFIG_UCODE_PATCH cpm_load_patch(cpmp); #endif siu_conf = immr_map(im_siu_conf); out_be32(&siu_conf->sc_sdcr, 1); immr_unmap(siu_conf); cpm_muram_init(); }
void __init cpm2_reset(void) { #ifdef CONFIG_PPC_85xx cpm2_immr = ioremap(get_immrbase() + 0x80000, CPM_MAP_SIZE); #else cpm2_immr = ioremap(get_immrbase(), CPM_MAP_SIZE); #endif cpm_muram_init(); cpmp = &cpm2_immr->im_cpm; #ifndef CONFIG_PPC_EARLY_DEBUG_CPM cpm_command(CPM_CR_RST, 0); #endif }
void __init cpm_reset(void) { sysconf8xx_t __iomem *siu_conf; mpc8xx_immr = ioremap(get_immrbase(), 0x4000); if (!mpc8xx_immr) { printk(KERN_CRIT "Could not map IMMR\n"); return; } cpmp = &mpc8xx_immr->im_cpm; #ifndef CONFIG_PPC_EARLY_DEBUG_CPM /* Perform a reset. */ out_be16(&cpmp->cp_cpcr, CPM_CR_RST | CPM_CR_FLG); /* Wait for it. */ while (in_be16(&cpmp->cp_cpcr) & CPM_CR_FLG); #endif #ifdef CONFIG_UCODE_PATCH cpm_load_patch(cpmp); #endif /* Set SDMA Bus Request priority 5. * On 860T, this also enables FEC priority 6. I am not sure * this is what we really want for some applications, but the * manual recommends it. * Bit 25, FAM can also be set to use FEC aggressive mode (860T). */ siu_conf = immr_map(im_siu_conf); if ((mfspr(SPRN_IMMR) & 0xffff) == 0x0900) /* MPC885 */ out_be32(&siu_conf->sc_sdcr, 0x40); else out_be32(&siu_conf->sc_sdcr, 1); immr_unmap(siu_conf); cpm_muram_init(); }
void __init cpm2_reset(void) { #ifdef CONFIG_PPC_85xx cpm2_immr = ioremap(CPM_MAP_ADDR, CPM_MAP_SIZE); #else cpm2_immr = ioremap(get_immrbase(), CPM_MAP_SIZE); #endif /* Reclaim the DP memory for our use. */ cpm_muram_init(); /* Tell everyone where the comm processor resides. */ cpmp = &cpm2_immr->im_cpm; #ifndef CONFIG_PPC_EARLY_DEBUG_CPM /* Reset the CPM. */ cpm_command(CPM_CR_RST, 0); #endif }