void helper_rdtsc(CPUX86State *env) { uint64_t val; if ((env->cr[4] & CR4_TSD_MASK) && ((env->hflags & HF_CPL_MASK) != 0)) { raise_exception_ra(env, EXCP0D_GPF, GETPC()); } cpu_svm_check_intercept_param(env, SVM_EXIT_RDTSC, 0, GETPC()); #ifdef CONFIG_SOFTMMU RR_DO_RECORD_OR_REPLAY( /*action=*/val = cpu_get_tsc(env) + env->tsc_offset, /*record=*/rr_input_8(&val), /*replay=*/rr_input_8(&val), /*location=*/RR_CALLSITE_RDTSC); #else val = cpu_get_tsc(env) + env->tsc_offset; #endif env->regs[R_EAX] = (uint32_t)(val); env->regs[R_EDX] = (uint32_t)(val >> 32); }
void helper_rdtsc(CPUX86State *env) { uint64_t val; if ((env->cr[4] & CR4_TSD_MASK) && ((env->hflags & HF_CPL_MASK) != 0)) { raise_exception(env, EXCP0D_GPF); } cpu_svm_check_intercept_param(env, SVM_EXIT_RDTSC, 0); val = cpu_get_tsc(env) + env->tsc_offset; env->regs[R_EAX] = (uint32_t)(val); env->regs[R_EDX] = (uint32_t)(val >> 32); }