int mxs_iomux_setup_pad(iomux_cfg_t pad)
{
u32 reg, ofs, bp, bm;
void __iomem *iomux_base = MXS_IO_ADDRESS(MXS_PINCTRL_BASE_ADDR);
ofs = 0x100;
ofs += PAD_BANK(pad) * 0x20 + PAD_PIN(pad) / 16 * 0x10;
bp = PAD_PIN(pad) % 16 * 2;
bm = 0x3 << bp;
reg = __raw_readl(iomux_base + ofs);
reg &= ~bm;
reg |= PAD_MUXSEL(pad) << bp;
__raw_writel(reg, iomux_base + ofs);
ofs = cpu_is_mx23() ? 0x200 : 0x300;
ofs += PAD_BANK(pad) * 0x40 + PAD_PIN(pad) / 8 * 0x10;
if (PAD_MA_VALID(pad)) {
bp = PAD_PIN(pad) % 8 * 4;
bm = 0x3 << bp;
reg = __raw_readl(iomux_base + ofs);
reg &= ~bm;
reg |= PAD_MA(pad) << bp;
__raw_writel(reg, iomux_base + ofs);
}
if (PAD_VOL_VALID(pad)) {
bp = PAD_PIN(pad) % 8 * 4 + 2;
if (PAD_VOL(pad))
__mxs_setl(1 << bp, iomux_base + ofs);
else
__mxs_clrl(1 << bp, iomux_base + ofs);
}
if (PAD_PULL_VALID(pad)) {
ofs = cpu_is_mx23() ? 0x400 : 0x600;
ofs += PAD_BANK(pad) * 0x10;
bp = PAD_PIN(pad);
if (PAD_PULL(pad))
__mxs_setl(1 << bp, iomux_base + ofs);
else
__mxs_clrl(1 << bp, iomux_base + ofs);
}
return 0;
}
static int mxs_ocotp_probe(struct device_d *dev)
{
int err;
struct ocotp_priv *priv = xzalloc(sizeof (*priv));
priv->base = dev_request_mem_region(dev, 0);
if (IS_ERR(priv->base))
return PTR_ERR(priv->base);
priv->clk = clk_get(dev, NULL);
if (IS_ERR(priv->clk))
return PTR_ERR(priv->clk);
priv->cdev.dev = dev;
priv->cdev.ops = &mxs_ocotp_ops;
priv->cdev.priv = priv;
priv->cdev.size = cpu_is_mx23() ? 128 : 160;
priv->cdev.name = DRIVERNAME;
err = devfs_create(&priv->cdev);
if (err < 0)
return err;
if (IS_ENABLED(CONFIG_MXS_OCOTP_WRITABLE)) {
mxs_ocotp_ops.write = mxs_ocotp_cdev_write;
dev_add_param_bool(dev, "permanent_write_enable",
NULL, NULL, &priv->write_enable, NULL);
}
return 0;
}
void __init mxs_timer_init(int irq)
{
struct clk *timer_clk;
timer_clk = clk_get_sys("timrot", NULL);
if (IS_ERR(timer_clk)) {
pr_err("%s: failed to get clk\n", __func__);
return;
}
clk_prepare_enable(timer_clk);
/*
* Initialize timers to a known state
*/
mxs_reset_block(mxs_timrot_base + HW_TIMROT_ROTCTRL);
/* get timrot version */
timrot_major_version = __raw_readl(mxs_timrot_base +
(cpu_is_mx23() ? MX23_TIMROT_VERSION_OFFSET :
MX28_TIMROT_VERSION_OFFSET));
timrot_major_version >>= BP_TIMROT_MAJOR_VERSION;
/* one for clock_event */
__raw_writel((timrot_is_v1() ?
BV_TIMROTv1_TIMCTRLn_SELECT__32KHZ_XTAL :
BV_TIMROTv2_TIMCTRLn_SELECT__32KHZ_XTAL) |
BM_TIMROT_TIMCTRLn_UPDATE |
BM_TIMROT_TIMCTRLn_IRQ_EN,
mxs_timrot_base + HW_TIMROT_TIMCTRLn(0));
/* another for clocksource */
__raw_writel((timrot_is_v1() ?
BV_TIMROTv1_TIMCTRLn_SELECT__32KHZ_XTAL :
BV_TIMROTv2_TIMCTRLn_SELECT__32KHZ_XTAL) |
BM_TIMROT_TIMCTRLn_RELOAD,
mxs_timrot_base + HW_TIMROT_TIMCTRLn(1));
/* set clocksource timer fixed count to the maximum */
if (timrot_is_v1())
__raw_writel(0xffff,
mxs_timrot_base + HW_TIMROT_TIMCOUNTn(1));
else
__raw_writel(0xffffffff,
mxs_timrot_base + HW_TIMROT_FIXED_COUNTn(1));
/* init and register the timer to the framework */
mxs_clocksource_init(timer_clk);
mxs_clockevent_init(timer_clk);
/* Make irqs happen */
setup_irq(irq, &mxs_timer_irq);
}
static int __init mxs_arch_reset_init(void)
{
struct clk *clk;
mxs_clkctrl_reset_addr = MXS_IO_ADDRESS(MXS_CLKCTRL_BASE_ADDR) +
(cpu_is_mx23() ? MX23_CLKCTRL_RESET_OFFSET :
MX28_CLKCTRL_RESET_OFFSET);
clk = clk_get_sys("rtc", NULL);
if (!IS_ERR(clk))
clk_enable(clk);
return 0;
}
static int
utp_ioctl(struct inode *inode, struct file *file,
unsigned int cmd, unsigned long arg)
{
int cpu_id = 0;
switch (cmd) {
case UTP_GET_CPU_ID:
/* Currently, it only supports below SoC for manufacture tool
* The naming rule
* 1. The numberic for SoC string
* 2. If there is next SoC version, and the corresponding utp
* operation will be differ, then, need to add '1' next to SoC
* name. Such as the next 50 SoC version is: cpu_is = 501
*/
#ifdef CONFIG_ARCH_MXS
if (cpu_is_mx23())
cpu_id = 23;
else if (cpu_is_mx28())
cpu_id = 28;
#endif
#ifdef CONFIG_ARCH_MXC
if (cpu_is_mx25())
cpu_id = 25;
else if (cpu_is_mx35())
cpu_id = 35;
else if (cpu_is_mx51())
cpu_id = 51;
else if (cpu_is_mx53())
cpu_id = 53;
else if (cpu_is_mx50())
cpu_id = 50;
#endif
return put_user(cpu_id, (int __user *)arg);
default:
return -ENOIOCTLCMD;
}
}
