void __init msm_acpu_clock_init(struct msm_acpu_clock_platform_data *clkdata)
{
	unsigned int max_freq;
	mutex_init(&drv_state.lock);
	drv_state.acpu_switch_time_us = clkdata->acpu_switch_time_us;
	drv_state.max_speed_delta_khz = clkdata->max_speed_delta_khz;
	drv_state.max_vdd = clkdata->max_vdd;
	drv_state.acpu_set_vdd = clkdata->acpu_set_vdd;

	max_freq = msm_acpu_clock_fixup();

	/* Configure hardware. */
	move_off_scpll();
	scpll_init();

	lpj_init();

	/* Improve boot time */
	acpuclk_set_rate(smp_processor_id(), max_freq, SETRATE_CPUFREQ);

#ifdef CONFIG_CPU_FREQ_MSM
	cpufreq_table_init();
	cpufreq_frequency_table_get_attr(freq_table, smp_processor_id());
#endif
}
Example #2
0
void __init msm_acpu_clock_init(struct msm_acpu_clock_platform_data *clkdata)
{
	int cpu;

	mutex_init(&drv_state.lock);
	drv_state.acpu_switch_time_us = clkdata->acpu_switch_time_us;
	drv_state.vdd_switch_time_us = clkdata->vdd_switch_time_us;
	drv_state.max_speed_delta_khz = clkdata->max_speed_delta_khz;

	/* Configure hardware. */
	regulator_init();
	force_all_to_afab();
	scpll_set_refs();
	for_each_possible_cpu(cpu)
		scpll_init(cpu);
	scpll_init(L2);

	lpj_init();
	precompute_stepping();

	/* Improve boot time by ramping up CPUs immediately. */
	for_each_online_cpu(cpu)
		acpuclk_set_rate(cpu, 1080000, SETRATE_CPUFREQ);

	cpufreq_table_init();
}
static s32 balong_cpufreq_cpu_init(struct cpufreq_policy *policy)
{
	/*cpu_online 这里的作用是 ? */
	if (!cpu_online(policy->cpu))
		return -ENODEV;

	pr_info("cpufreq: balong_cpufreq_cpu_init.\n");
	
	cpufreq_table_init();
	policy->governor = &cpufreq_balong_ondemand;
	policy->max = policy->cpuinfo.max_freq = BALONG_CPUFREQUENCY_666;
	policy->min = policy->cpuinfo.min_freq = BALONG_CPUFREQUENCY_100;
	policy->cur = BALONG_CPUFREQUENCY_666;
	g_cur_freq = policy->cur;
	cpufreq_frequency_table_get_attr(&balong_clockrate_table[0],
					 policy->cpu);

	return cpufreq_frequency_table_cpuinfo(policy,
					    &balong_clockrate_table[0]);
}
int __init acpuclk_cortex_init(struct platform_device *pdev,
	struct acpuclk_drv_data *data)
{
	unsigned long max_cpu_khz = 0;
	int i, rc;

	acpuclk_init_data = data;
	mutex_init(&acpuclk_init_data->lock);

	bus_perf_client = msm_bus_scale_register_client(
		acpuclk_init_data->bus_scale);
	if (!bus_perf_client) {
		pr_err("Unable to register bus client\n");
		BUG();
	}

	for (i = 0; i < NUM_SRC; i++) {
		if (!acpuclk_init_data->src_clocks[i].name)
			continue;
		acpuclk_init_data->src_clocks[i].clk =
			clk_get(&pdev->dev,
				acpuclk_init_data->src_clocks[i].name);
		BUG_ON(IS_ERR(acpuclk_init_data->src_clocks[i].clk));
		/*
		 * Prepare the PLLs because we enable/disable them
		 * in atomic context during power collapse/restore.
		 */
		BUG_ON(clk_prepare(acpuclk_init_data->src_clocks[i].clk));
	}

	/* Improve boot time by ramping up CPU immediately */
	for (i = 0; acpuclk_init_data->freq_tbl[i].khz != 0 &&
			acpuclk_init_data->freq_tbl[i].use_for_scaling; i++)
		max_cpu_khz = acpuclk_init_data->freq_tbl[i].khz;

	/* Initialize regulators */
	rc = increase_vdd(acpuclk_init_data->freq_tbl[i].vdd_cpu,
		acpuclk_init_data->freq_tbl[i].vdd_mem);
	if (rc)
		goto err_vdd;

	rc = regulator_enable(acpuclk_init_data->vdd_mem);
	if (rc) {
		dev_err(&pdev->dev, "regulator_enable for mem failed\n");
		goto err_vdd;
	}

	rc = regulator_enable(acpuclk_init_data->vdd_cpu);
	if (rc) {
		dev_err(&pdev->dev, "regulator_enable for cpu failed\n");
		goto err_vdd_cpu;
	}

	acpuclk_cortex_set_rate(0, max_cpu_khz, SETRATE_INIT);

	acpuclk_register(&acpuclk_cortex_data);
	cpufreq_table_init();

	return 0;

err_vdd_cpu:
	regulator_disable(acpuclk_init_data->vdd_mem);
err_vdd:
	regulator_put(acpuclk_init_data->vdd_mem);
	regulator_put(acpuclk_init_data->vdd_cpu);

	for (i = 0; i < NUM_SRC; i++) {
		if (!acpuclk_init_data->src_clocks[i].name)
			continue;
		clk_unprepare(acpuclk_init_data->src_clocks[i].clk);
		clk_put(acpuclk_init_data->src_clocks[i].clk);
	}
	return rc;
}
void  cpufreq_init(void)
{
	/*lint --e{516}*/
	u32 i = 0;
	u32 retValue = 0;
	ST_PWC_SWITCH_STRU cpufreq_control_nv = {0} ;
    retValue = bsp_nvm_read(NV_ID_DRV_NV_DFS_SWITCH,(u8*)&g_stDfsSwitch,sizeof(ST_PWC_DFS_STRU));
    if (NV_OK != retValue)
    {
    	cpufreq_err("read nv failed use default value\n");
		g_stDfsSwitch.CcpuDownLimit = 60;
		g_stDfsSwitch.CcpuDownNum = 3;
		g_stDfsSwitch.CcpuUpLimit = 85;
		g_stDfsSwitch.CcpuUpNum = 1;
		g_stDfsSwitch.DFSTimerLen = 400;
		g_stDfsSwitch.Strategy = 0;/*使用4s检测一次的策略*/
		g_stDfsSwitch.DFSDdrUpLimit = 85;
		g_stDfsSwitch.DFSDdrDownLimit = 60;
		g_stDfsSwitch.DFSDdrprofile = 5;
		g_stDfsSwitch.reserved = 0;
    }
	retValue = bsp_nvm_read(NV_ID_DRV_NV_PWC_SWITCH,(u8*)&cpufreq_control_nv,sizeof(ST_PWC_SWITCH_STRU));
	if (NV_OK == retValue)
	{
		g_cpufreq_lock_status_flag = cpufreq_control_nv.dfs;
	}
	else
	{
		cpufreq_err("read nv failed %d\n", retValue);
	}

    memset(&g_stDfsCpuConfigInfo, 0, sizeof(g_stDfsCpuConfigInfo));
    memset(&g_stDfsCpuControl, 0, sizeof(g_stDfsCpuControl));
	g_stDfsCpuControl.enCurProfile = BALONG_FREQ_MAX;

	register_icc_for_cpufreq();
	cpufreq_table_init();
#ifdef CONFIG_CCORE_PM
    if (bsp_device_pm_add(&g_cpufreq_dpm_device))
    {
		cpufreq_err("register dpm failed,check it\n");
    }
#endif
    /*bit1 使用MS级调频策略*/
    if (g_stDfsSwitch.Strategy & 0x1)
    {
		  g_sem_calccpu_flag = semBCreate(SEM_Q_PRIORITY, SEM_FULL); /*lint !e64 */
		  if (NULL == g_sem_calccpu_flag)
		  {
		      cpufreq_err("Create g_sem_k3get_volt Failed %d\n", g_sem_calccpu_flag);
		  }
	}

    g_stDfsCpuConfigInfo.ulDFSFunEnableFlag = DFS_TRUE;
    g_stDfsCpuConfigInfo.usProfileDownTime = g_stDfsSwitch.CcpuDownNum;
    g_stDfsCpuConfigInfo.usProfileUpTime = g_stDfsSwitch.CcpuUpNum;
    g_stDfsCpuConfigInfo.ulProfileNum = DC_RESV;
    g_stDfsCpuConfigInfo.ulTimerLen = g_stDfsSwitch.DFSTimerLen;
    g_test_in_interr_times = g_stDfsSwitch.DFSTimerLen;

    for (i = 0; i < g_stDfsCpuConfigInfo.ulProfileNum; i++)
    {
        g_stDfsCpuConfigInfo.astThresHold[i].usProfileUpLimit   = g_stDfsSwitch.CcpuUpLimit;
        g_stDfsCpuConfigInfo.astThresHold[i].usProfileDownLimit = g_stDfsSwitch.CcpuDownLimit;
    }
    INIT_LIST_HEAD(&(g_v9_qos_list.entry));
    /*添加DDR调频请求*/
    (void)PWRCTRL_DfsQosRequest(DFS_QOS_ID_DDR_MINFREQ, BALONG_DDRFREQUENCY_MIN, &g_ddr_request_id);
    
    taskSpawn("dfs_task", 1, 0, 4096, (FUNCPTR)pwrctrl_dfs_mgrmsg_task, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0);/*lint !e64 !e119 */
	g_cpufreq_start_time = bsp_get_slice_value();
	cpufreq_err("cpufreq init ok\n");
    return;
}