static void cpu_clearintcallback(int cpunum)
{
int irqcount = cputype_get_interface(Machine->drv->cpu[cpunum].cpu_type)->num_irqs;
int irqline;
cpuintrf_push_context(cpunum);
/* clear NMI and all IRQs */
activecpu_set_irq_line(IRQ_LINE_NMI, INTERNAL_CLEAR_LINE);
for (irqline = 0; irqline < irqcount; irqline++)
activecpu_set_irq_line(irqline, INTERNAL_CLEAR_LINE);
cpuintrf_pop_context();
}
int cpu_init(void)
{
int cpunum;
/* initialize the interfaces first */
if (cpuintrf_init())
return 1;
/* loop over all our CPUs */
for (cpunum = 0; cpunum < MAX_CPU; cpunum++)
{
int cputype = Machine->drv->cpu[cpunum].cpu_type;
/* if this is a dummy, stop looking */
if (cputype == CPU_DUMMY)
break;
/* set the save state tag */
state_save_set_current_tag(cpunum + 1);
/* initialize the cpuinfo struct */
memset(&cpu[cpunum], 0, sizeof(cpu[cpunum]));
cpu[cpunum].suspend = SUSPEND_REASON_RESET;
cpu[cpunum].clockscale = cputype_get_interface(cputype)->overclock;
/* compute the cycle times */
sec_to_cycles[cpunum] = cpu[cpunum].clockscale * Machine->drv->cpu[cpunum].cpu_clock;
cycles_to_sec[cpunum] = 1.0 / sec_to_cycles[cpunum];
/* initialize this CPU */
if (cpuintrf_init_cpu(cpunum, cputype))
return 1;
}
/* compute the perfect interleave factor */
compute_perfect_interleave();
/* save some stuff in tag 0 */
state_save_set_current_tag(0);
state_save_register_INT32("cpu", 0, "watchdog count", &watchdog_counter, 1);
/* reset the IRQ lines and save those */
if (cpuint_init())
return 1;
return 0;
}
