/*
* Reset the chip using run bit, also lock PLL using ILRCK and
* put back AES3INPUT. This workaround is described in latest
* CS8427 datasheet, otherwise TXDSERIAL will not work.
*/
static void snd_cs8427_reset(struct cs8427 *chip)
{
unsigned long end_time;
int data, aes3input = 0;
unsigned char val = 0;
if (snd_BUG_ON(!chip))
return;
if ((chip->regmap[CS8427_REG_CLOCKSOURCE] & CS8427_RXDAES3INPUT) ==
CS8427_RXDAES3INPUT) /* AES3 bit is set */
aes3input = 1;
chip->regmap[CS8427_REG_CLOCKSOURCE] &= ~(CS8427_RUN | CS8427_RXDMASK);
cs8427_i2c_write(chip, CS8427_REG_CLOCKSOURCE,
1, &chip->regmap[CS8427_REG_CLOCKSOURCE]);
udelay(200);
chip->regmap[CS8427_REG_CLOCKSOURCE] |= CS8427_RUN | CS8427_RXDILRCK;
cs8427_i2c_write(chip, CS8427_REG_CLOCKSOURCE,
1, &chip->regmap[CS8427_REG_CLOCKSOURCE]);
udelay(200);
end_time = jiffies + chip->reset_timeout;
while (time_after_eq(end_time, jiffies)) {
data = cs8427_i2c_read(chip, CS8427_REG_RECVERRORS,
1, &val);
if (!(val & CS8427_UNLOCK))
break;
schedule_timeout_uninterruptible(1);
}
chip->regmap[CS8427_REG_CLOCKSOURCE] &= ~CS8427_RXDMASK;
if (aes3input)
chip->regmap[CS8427_REG_CLOCKSOURCE] |= CS8427_RXDAES3INPUT;
cs8427_i2c_write(chip, CS8427_REG_CLOCKSOURCE,
1, &chip->regmap[CS8427_REG_CLOCKSOURCE]);
}
static int snd_cs8427_qsubcode_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct cs8427 *chip = kcontrol->private_data;
unsigned char reg = CS8427_REG_QSUBCODE;
int err;
unsigned char val[20];
if (!chip) {
pr_err("%s: invalid device info\n", __func__);
return -ENODEV;
}
err = cs8427_i2c_write(chip, reg, 1, &val[0]);
if (err != 1) {
dev_err(&chip->client->dev, "unable to send register"
" 0x%x byte to CS8427\n", reg);
return err < 0 ? err : -EIO;
}
err = cs8427_i2c_read(chip, *ucontrol->value.bytes.data, 10, &val);
if (err != 10) {
dev_err(&chip->client->dev, "unable to read"
" Q-subcode bytes from CS8427\n");
return err < 0 ? err : -EIO;
}
return 0;
}
static int cs8427_hw_params(struct snd_pcm_substream *substream,
struct snd_pcm_hw_params *params,
struct snd_soc_dai *dai)
{
struct snd_soc_codec *codec = dai->codec;
struct cs8427 *chip = dev_get_drvdata(codec->dev);
int ret = 0;
if (chip == NULL) {
pr_err("invalid device private data\n");
return -ENODEV;
}
chip->regmap[CS8427_REG_SERIALINPUT] &= CS8427_BITWIDTH_MASK;
switch (params_format(params)) {
case SNDRV_PCM_FORMAT_S16_LE:
chip->regmap[CS8427_REG_SERIALINPUT] |= CS8427_SIRES16;
ret = cs8427_i2c_write(chip, CS8427_REG_SERIALINPUT, 1,
&chip->regmap[CS8427_REG_SERIALINPUT]);
break;
case SNDRV_PCM_FORMAT_S20_3LE:
chip->regmap[CS8427_REG_SERIALINPUT] |= CS8427_SIRES20;
ret = cs8427_i2c_write(chip, CS8427_REG_SERIALINPUT, 1,
&chip->regmap[CS8427_REG_SERIALINPUT]);
break;
case SNDRV_PCM_FORMAT_S24_LE:
chip->regmap[CS8427_REG_SERIALINPUT] |= CS8427_SIRES24;
ret = cs8427_i2c_write(chip, CS8427_REG_SERIALINPUT, 1,
&chip->regmap[CS8427_REG_SERIALINPUT]);
break;
default:
pr_err("invalid format\n");
break;
}
dev_dbg(&chip->client->dev,
"%s(): substream = %s stream = %d\n" , __func__,
substream->name, substream->stream);
return ret;
}
static int snd_cs8427_select_corudata(struct cs8427 *cs8427_i2c, int udata)
{
struct cs8427 *chip = cs8427_i2c;
int err;
udata = udata ? CS8427_BSEL : 0;
if (udata != (chip->regmap[CS8427_REG_CSDATABUF] & udata)) {
chip->regmap[CS8427_REG_CSDATABUF] &= ~CS8427_BSEL;
chip->regmap[CS8427_REG_CSDATABUF] |= udata;
err = cs8427_i2c_write(cs8427_i2c, CS8427_REG_CSDATABUF,
1, &chip->regmap[CS8427_REG_CSDATABUF]);
if (err < 0)
return err;
}
return 0;
}
static int snd_cs8427_send_corudata(struct cs8427 *obj,
int udata,
unsigned char *ndata,
int count)
{
struct cs8427 *chip = obj;
char *hw_data = udata ?
chip->playback.hw_udata : chip->playback.hw_status;
char data[32];
int err, idx;
unsigned char addr = 0;
int ret = 0;
if (!memcmp(hw_data, ndata, count))
return 0;
err = snd_cs8427_select_corudata(chip, udata);
if (err < 0)
return err;
memcpy(hw_data, ndata, count);
if (udata) {
memset(data, 0, sizeof(data));
if (count > sizeof(data)) {
count = sizeof(data);
}
if (memcmp(hw_data, data, count) == 0) {
chip->regmap[CS8427_REG_UDATABUF] &= ~CS8427_UBMMASK;
chip->regmap[CS8427_REG_UDATABUF] |= CS8427_UBMZEROS |
CS8427_EFTUI;
err = cs8427_i2c_write(chip, CS8427_REG_UDATABUF,
1, &chip->regmap[CS8427_REG_UDATABUF]);
return err < 0 ? err : 0;
}
}
idx = 0;
memcpy(data, ndata, CHANNEL_STATUS_SIZE);
addr = 0x20;
ret = cs8427_i2c_sendbytes(chip, &addr, data, count);
if (ret != count)
return -EIO;
return 1;
}
static __devinit int cs8427_i2c_probe(struct i2c_client *client,
const struct i2c_device_id *id)
{
static unsigned char initvals1[] = {
CS8427_REG_CONTROL1 | CS8427_REG_AUTOINC,
/* CS8427_REG_CONTROL1: RMCK to OMCK, valid PCM audio, disable mutes,
* TCBL=output
*/
CS8427_SWCLK | CS8427_TCBLDIR,
/* CS8427_REG_CONTROL2: hold last valid audio sample, RMCK=256*Fs,
* normal stereo operation
*/
0x08,
/* CS8427_REG_DATAFLOW:
* AES3 Transmitter data source => Serial Audio input port
* Serial audio output port data source => reserved
*/
CS8427_TXDSERIAL,
/* CS8427_REG_CLOCKSOURCE: Run off, CMCK=256*Fs,
* output time base = OMCK, input time base = recovered input clock,
* recovered input clock source is ILRCK changed to AES3INPUT
* (workaround, see snd_cs8427_reset)
*/
CS8427_RXDILRCK | CS8427_OUTC,
/* CS8427_REG_SERIALINPUT: Serial audio input port data format = I2S,
* 24-bit, 64*Fsi
*/
CS8427_SIDEL | CS8427_SILRPOL | CS8427_SORES16,
/* CS8427_REG_SERIALOUTPUT: Serial audio output port data format
* = I2S, 24-bit, 64*Fsi
*/
CS8427_SODEL | CS8427_SOLRPOL | CS8427_SIRES16,
};
static unsigned char initvals2[] = {
CS8427_REG_RECVERRMASK | CS8427_REG_AUTOINC,
/* CS8427_REG_RECVERRMASK: unmask the input PLL clock, V, confidence,
* biphase, parity status bits
* CS8427_UNLOCK | CS8427_V | CS8427_CONF | CS8427_BIP | CS8427_PAR,
*/
0xff, /* set everything */
/* CS8427_REG_CSDATABUF:
* Registers 32-55 window to CS buffer
* Inhibit D->E transfers from overwriting first 5 bytes of CS data.
* Inhibit D->E transfers (all) of CS data.
* Allow E->F transfer of CS data.
* One byte mode; both A/B channels get same written CB data.
* A channel info is output to chip's EMPH* pin.
*/
CS8427_CBMR | CS8427_DETCI,
/* CS8427_REG_UDATABUF:
* Use internal buffer to transmit User (U) data.
* Chip's U pin is an output.
* Transmit all O's for user data.
* Inhibit D->E transfers.
* Inhibit E->F transfers.
*/
CS8427_UD | CS8427_EFTUI | CS8427_DETUI,
};
int err;
unsigned char buf[CHANNEL_STATUS_SIZE];
unsigned char val = 0;
char addr = 0;
unsigned int reset_timeout = 1;
int ret = 0;
struct cs8427 *chip;
if (!client) {
pr_err("%s: invalid device info\n", __func__);
return -EINVAL;
}
chip = kzalloc(sizeof(struct cs8427), GFP_KERNEL);
if (chip == NULL) {
dev_err(&client->dev,
"%s: error, allocation failed\n", __func__);
return -ENOMEM;
}
chip->client = client;
dev_set_drvdata(&chip->client->dev, chip);
ret = poweron_cs8427(chip);
if (ret) {
dev_err(&chip->client->dev,
"failed to bring chip out of reset\n");
return -ENODEV;
}
err = cs8427_i2c_read(chip, CS8427_REG_ID_AND_VER, 1, &val);
if (err < 0) {
/* give second chance */
dev_err(&chip->client->dev,
"failed to read cs8427 trying once again\n");
err = cs8427_i2c_read(chip, CS8427_REG_ID_AND_VER,
1, &val);
if (err < 0) {
dev_err(&chip->client->dev,
"failed to read version number\n");
return -ENODEV;
}
dev_dbg(&chip->client->dev,
"version number read = %x\n", val);
}
if (val != CS8427_VER8427A) {
dev_err(&chip->client->dev,
"unable to find CS8427 signature "
"(expected 0x%x, read 0x%x),\n",
CS8427_VER8427A, val);
dev_err(&chip->client->dev,
" initialization is not completed\n");
return -EFAULT;
}
val = 0;
/* turn off run bit while making changes to configuration */
err = cs8427_i2c_write(chip, CS8427_REG_CLOCKSOURCE, 1, &val);
if (err < 0)
goto __fail;
/* send initial values */
memcpy(chip->regmap + (initvals1[0] & 0x7f), initvals1 + 1, 6);
addr = 1;
err = cs8427_i2c_sendbytes(chip, &addr, &initvals1[1], 6);
if (err != 6) {
err = err < 0 ? err : -EIO;
goto __fail;
}
/* Turn off CS8427 interrupt stuff that is not used in hardware */
memset(buf, 0, 7);
/* from address 9 to 15 */
addr = 9;
err = cs8427_i2c_sendbytes(chip, &addr, buf, 7);
if (err != 7)
goto __fail;
/* send transfer initialization sequence */
addr = 0x11;
memcpy(chip->regmap + (initvals2[0] & 0x7f), initvals2 + 1, 3);
err = cs8427_i2c_sendbytes(chip, &addr, &initvals2[1], 3);
if (err != 3) {
err = err < 0 ? err : -EIO;
goto __fail;
}
/* write default channel status bytes */
put_unaligned_le32(SNDRV_PCM_DEFAULT_CON_SPDIF, buf);
memset(buf + 4, 0, CHANNEL_STATUS_SIZE - 4);
if (snd_cs8427_send_corudata(chip, 0, buf, CHANNEL_STATUS_SIZE) < 0)
goto __fail;
memcpy(chip->playback.def_status, buf, CHANNEL_STATUS_SIZE);
memcpy(chip->playback.pcm_status, buf, CHANNEL_STATUS_SIZE);
/* turn on run bit and rock'n'roll */
if (reset_timeout < 1)
reset_timeout = 1;
chip->reset_timeout = reset_timeout;
snd_cs8427_reset(chip);
ret = snd_soc_register_codec(&chip->client->dev, &soc_codec_dev_cs8427,
cs8427_dai, ARRAY_SIZE(cs8427_dai));
return 0;
__fail:
kfree(chip);
return err < 0 ? err : -EIO;
}
static __devinit int cs8427_i2c_probe(struct i2c_client *client,
const struct i2c_device_id *id)
{
static unsigned char initvals1[] = {
CS8427_REG_CONTROL1 | CS8427_REG_AUTOINC,
CS8427_SWCLK | CS8427_TCBLDIR,
0x08,
CS8427_TXDSERIAL,
CS8427_RXDILRCK | CS8427_OUTC,
CS8427_SIDEL | CS8427_SILRPOL | CS8427_SORES16,
CS8427_SODEL | CS8427_SOLRPOL | CS8427_SIRES16,
};
static unsigned char initvals2[] = {
CS8427_REG_RECVERRMASK | CS8427_REG_AUTOINC,
0xff,
/* CS8427_REG_CSDATABUF:
* Registers 32-55 window to CS buffer
* Inhibit D->E transfers from overwriting first 5 bytes of CS data.
* Inhibit D->E transfers (all) of CS data.
* Allow E->F transfer of CS data.
* One byte mode; both A/B channels get same written CB data.
* A channel info is output to chip's EMPH* pin.
*/
CS8427_CBMR | CS8427_DETCI,
CS8427_UD | CS8427_EFTUI | CS8427_DETUI,
};
int err;
unsigned char buf[CHANNEL_STATUS_SIZE];
unsigned char val = 0;
char addr = 0;
unsigned int reset_timeout = 100;
int ret = 0;
struct cs8427 *chip;
if (!client) {
pr_err("%s: invalid device info\n", __func__);
return -EINVAL;
}
chip = kzalloc(sizeof(struct cs8427), GFP_KERNEL);
if (chip == NULL) {
dev_err(&client->dev,
"%s: error, allocation failed\n", __func__);
return -ENOMEM;
}
chip->client = client;
dev_set_drvdata(&chip->client->dev, chip);
ret = poweron_cs8427(chip);
if (ret) {
dev_err(&chip->client->dev,
"failed to bring chip out of reset\n");
return -ENODEV;
}
err = cs8427_i2c_read(chip, CS8427_REG_ID_AND_VER, 1, &val);
if (err < 0) {
dev_err(&chip->client->dev,
"failed to read cs8427 trying once again\n");
err = cs8427_i2c_read(chip, CS8427_REG_ID_AND_VER,
1, &val);
if (err < 0) {
dev_err(&chip->client->dev,
"failed to read version number\n");
return -ENODEV;
}
dev_dbg(&chip->client->dev,
"version number read = %x\n", val);
}
if (val != CS8427_VER8427A) {
dev_err(&chip->client->dev,
"unable to find CS8427 signature "
"(expected 0x%x, read 0x%x),\n",
CS8427_VER8427A, val);
dev_err(&chip->client->dev,
" initialization is not completed\n");
return -EFAULT;
}
val = 0;
err = cs8427_i2c_write(chip, CS8427_REG_CLOCKSOURCE, 1, &val);
if (err < 0)
goto __fail;
memcpy(chip->regmap + (initvals1[0] & 0x7f), initvals1 + 1, 6);
addr = 1;
err = cs8427_i2c_sendbytes(chip, &addr, &initvals1[1], 6);
if (err != 6) {
err = err < 0 ? err : -EIO;
goto __fail;
}
memset(buf, 0, 7);
addr = 9;
err = cs8427_i2c_sendbytes(chip, &addr, buf, 7);
if (err != 7)
goto __fail;
addr = 0x11;
memcpy(chip->regmap + (initvals2[0] & 0x7f), initvals2 + 1, 3);
err = cs8427_i2c_sendbytes(chip, &addr, &initvals2[1], 3);
if (err != 3) {
err = err < 0 ? err : -EIO;
goto __fail;
}
put_unaligned_le32(SNDRV_PCM_DEFAULT_CON_SPDIF, buf);
memset(buf + 4, 0, CHANNEL_STATUS_SIZE - 4);
if (snd_cs8427_send_corudata(chip, 0, buf, CHANNEL_STATUS_SIZE) < 0)
goto __fail;
memcpy(chip->playback.def_status, buf, CHANNEL_STATUS_SIZE);
memcpy(chip->playback.pcm_status, buf, CHANNEL_STATUS_SIZE);
if (reset_timeout < 1)
reset_timeout = 1;
chip->reset_timeout = reset_timeout;
snd_cs8427_reset(chip);
ret = snd_soc_register_codec(&chip->client->dev, &soc_codec_dev_cs8427,
cs8427_dai, ARRAY_SIZE(cs8427_dai));
return 0;
__fail:
kfree(chip);
return err < 0 ? err : -EIO;
}
