/* * csi2_isr_buffer - Does buffer handling at end-of-frame * when writing to memory. */ static void csi2_isr_buffer(struct iss_csi2_device *csi2) { struct iss_buffer *buffer; csi2_ctx_enable(csi2, 0, 0); buffer = omap4iss_video_buffer_next(&csi2->video_out); /* * Let video queue operation restart engine if there is an underrun * condition. */ if (buffer == NULL) return; csi2_set_outaddr(csi2, buffer->iss_addr); csi2_ctx_enable(csi2, 0, 1); }
/* * csi2_queue - Queues the first buffer when using memory output * @video: The video node * @buffer: buffer to queue */ static int csi2_queue(struct isp_video *video, struct isp_buffer *buffer) { struct isp_device *isp = video->isp; struct isp_csi2_device *csi2 = &isp->isp_csi2a; csi2_set_outaddr(csi2, buffer->dma); /* * If streaming was enabled before there was a buffer queued * or underrun happened in the ISR, the hardware was not enabled * and DMA queue flag ISP_VIDEO_DMAQUEUE_UNDERRUN is still set. * Enable it now. */ if (csi2->video_out.dmaqueue_flags & ISP_VIDEO_DMAQUEUE_UNDERRUN) { /* Enable / disable context 0 and IRQs */ csi2_if_enable(isp, csi2, 1); csi2_ctx_enable(isp, csi2, 0, 1); isp_video_dmaqueue_flags_clr(&csi2->video_out); } return 0; }