/* ==========================================================================
//
// Function Name: csl_audio_render_get_current_buffer
//
// Description: Get the current render buffer for this streamID
//
// =========================================================================*/
UInt16 csl_audio_render_get_current_buffer(UInt32 streamID)
{
CSL_CAPH_Render_Drv_t *audDrv = NULL;
if (streamID != CSL_CAPH_STREAM_NONE)
audDrv = &sRenderDrv[streamID];
else
return 0;
if ((audDrv->dmaCH < CSL_CAPH_DMA_CH1)
|| (audDrv->dmaCH > CSL_CAPH_DMA_CH16))
return 0;
if (FALSE == csl_caph_QueryHWClock()) {
/*the CAPH clock may be not turned on.*/
aError(
"csl_audio_render_get_current_position caph clock is not ON!! audDrv %x, streamID %d, audDrv->dmaCH %d ",
(int)audDrv, (int)streamID, audDrv->dmaCH);
return 0;
}
if (audDrv->dmaCH != CSL_CAPH_DMA_NONE)
return csl_caph_dma_check_dmabuffer(audDrv->dmaCH);
else
return 0;
}
int AtMaudTst(brcm_alsa_chip_t *pChip, Int32 ParamCount, Int32 *Params)
{
aTrace(LOG_AUDIO_DRIVER, "%s P1-P6=%ld %ld %ld %ld %ld %ld cnt=%ld.\n",
__func__, Params[0], Params[1], Params[2],
Params[3], Params[4], Params[5], ParamCount);
/* test command 110/101 is to control the HW clock.
In this case, dont enable the clock */
if (Params[0] != 110 && Params[0] != 101)
csl_caph_ControlHWClock(TRUE);
switch (Params[0]) {
case 50: /* set audio debug level */
gAudioDebugLevel = Params[1];
break;
case 51: /* print audio debug level */
pr_info("audio debug level is 0x%x\n", gAudioDebugLevel);
break;
case 98:
#ifdef CONFIG_BCM_MODEM
DJB_GetStatistics();
#endif
break;
case 99:
if (voip_running) {
AUDTST_VoIP_Stop();
voip_running = FALSE;
}
break;
case 100:
if (!voip_running) {
/* Params[1] - Mic
Params[2] - speaker
Params[3] - Delay (msec)
Params[4] - Codectype:
Params[5] - Codec bit rate: */
AUDTST_VoIP(Params[1],
Params[2], Params[3], Params[4], Params[5]);
voip_running = TRUE;
}
break;
case 101:
Params[0] = (Int32) csl_caph_QueryHWClock();
aTrace(LOG_AUDIO_DRIVER,
"csl_caph_QueryHWClock %ld.\n", Params[0]);
break;
case 110:
if (Params[1] == 1) {
aTrace(LOG_AUDIO_DRIVER, "Enable CAPH clock\n");
csl_caph_ControlHWClock(TRUE);
} else if (Params[1] == 0) {
aTrace(LOG_AUDIO_DRIVER, "Disable CAPH clock\n");
csl_caph_ControlHWClock(FALSE);
}
break;
case 500: /*at*maudtst=500, */
{
char *address;
unsigned int value = 0, gain1 = 0, gain2 = 0,
gain3 = 0, gain4 = 0;
unsigned int index;
#define CHAL_CAPH_SRCM_MAX_FIFOS 15
#define SRCMIXER_A SRCMIXER_SRC_M1D1_CH1M_GAIN_CTRL_OFFSET
#define SRCMIXER_B SRCMIXER_SRC_M1D0_CH1M_GAIN_CTRL_OFFSET
/* 4 bytes */
#define SRCMIXER_MIX_CH_GAIN_CTRL_OFFSET ((SRCMIXER_A - SRCMIXER_B)/4)
address = (char *)ioremap_nocache((UInt32)
(AUDIOH_BASE_ADDR +
AUDIOH_AUDIORX_VRX1_OFFSET),
sizeof(UInt32));
if (!address) {
pr_err(" address ioremap failed\n");
return 0;
}
value = ioread32(address);
iounmap(address);
gain1 = value;
gain1 &=
(AUDIOH_AUDIORX_VRX1_AUDIORX_VRX_GAINCTRL_MASK);
gain1 >>=
(AUDIOH_AUDIORX_VRX1_AUDIORX_VRX_GAINCTRL_SHIFT);
pr_err("AUDIOH_AUDIORX_VRX1=0x%x, AMIC_PGA=0x%x\n",
value, gain1);
address = (char *)ioremap_nocache((UInt32)
(AUDIOH_BASE_ADDR +
AUDIOH_VIN_FILTER_CTRL_OFFSET),
sizeof(UInt32));
if (!address) {
pr_err(" address ioremap failed\n");
return 0;
}
value = ioread32(address);
iounmap(address);
gain1 = value;
gain1 &=
(AUDIOH_VIN_FILTER_CTRL_DMIC1_CIC_BIT_SEL_MASK);
gain1 >>=
(AUDIOH_VIN_FILTER_CTRL_DMIC1_CIC_BIT_SEL_SHIFT);
gain2 = value;
gain2 &=
(AUDIOH_VIN_FILTER_CTRL_DMIC1_CIC_FINE_SCL_MASK);
gain2 >>=
(AUDIOH_VIN_FILTER_CTRL_DMIC1_CIC_FINE_SCL_SHIFT);
gain3 = value;
gain3 &=
(AUDIOH_VIN_FILTER_CTRL_DMIC2_CIC_BIT_SEL_MASK);
gain3 >>=
(AUDIOH_VIN_FILTER_CTRL_DMIC2_CIC_BIT_SEL_SHIFT);
gain4 = value;
gain4 &=
(AUDIOH_VIN_FILTER_CTRL_DMIC2_CIC_FINE_SCL_MASK);
gain4 >>=
(AUDIOH_VIN_FILTER_CTRL_DMIC2_CIC_FINE_SCL_SHIFT);
pr_err(" AUDIOH_VIN_FILTER_CTRL=0x%x\n", value);
pr_err("DMIC1_CIC_BIT_SEL=0x%x, DMIC1_CIC_FINE=0x%x\n",
gain1, gain2);
pr_err("DMIC2_CIC_BIT_SEL=0x%x, "
"DMIC2_CIC_FINE_SCL=0x%x\n", gain3, gain4);
address = (char *)ioremap_nocache((UInt32)
(AUDIOH_BASE_ADDR +
AUDIOH_NVIN_FILTER_CTRL_OFFSET),
sizeof(UInt32));
if (!address) {
pr_err(" address ioremap failed\n");
return 0;
}
value = ioread32(address);
iounmap(address);
gain1 = value;
gain1 &=
(AUDIOH_NVIN_FILTER_CTRL_DMIC3_CIC_BIT_SEL_MASK);
gain1 >>=
(AUDIOH_NVIN_FILTER_CTRL_DMIC3_CIC_BIT_SEL_SHIFT);
gain2 = value;
gain2 &=
(AUDIOH_NVIN_FILTER_CTRL_DMIC3_CIC_FINE_SCL_MASK);
gain2 >>=
(AUDIOH_NVIN_FILTER_CTRL_DMIC3_CIC_FINE_SCL_SHIFT);
gain3 = value;
gain3 &=
(AUDIOH_NVIN_FILTER_CTRL_DMIC4_CIC_BIT_SEL_MASK);
gain3 >>=
(AUDIOH_NVIN_FILTER_CTRL_DMIC4_CIC_BIT_SEL_SHIFT);
gain4 = value;
gain4 &=
(AUDIOH_NVIN_FILTER_CTRL_DMIC4_CIC_FINE_SCL_MASK);
gain4 >>=
(AUDIOH_NVIN_FILTER_CTRL_DMIC4_CIC_FINE_SCL_SHIFT);
pr_err(" AUDIOH_VIN_FILTER_CTRL=0x%x\n", value);
pr_err("DMIC3_CIC_BIT_SEL=0x%x, DMIC3_CIC_FINE=0x%x\n",
gain1, gain2);
pr_err("DMIC4_CIC_BIT_SEL=0x%x, "
"DMIC4_CIC_FINE_SCL=0x%x\n", gain3, gain4);
address = (char *)
ioremap_nocache((UInt32)
(SRCMIXER_BASE_ADDR +
SRCMIXER_SRC_M1D0_CH1M_GAIN_CTRL_OFFSET),
sizeof(UInt32));
if (!address) {
pr_err(" address ioremap failed\n");
return 0;
}
value = ioread32(address);
iounmap(address);
gain1 = value;
gain1 &=
(SRCMIXER_SRC_M1D0_CH1M_GAIN_CTRL_SRC_M1D0_CH1M_GAIN_RAMPSTEP_MASK);
gain1 >>=
(SRCMIXER_SRC_M1D0_CH1M_GAIN_CTRL_SRC_M1D0_CH1M_GAIN_RAMPSTEP_SHIFT);
gain2 = value;
gain2 &=
(SRCMIXER_SRC_M1D0_CH1M_GAIN_CTRL_SRC_M1D0_CH1M_TARGET_GAIN_MASK);
gain2 >>=
(SRCMIXER_SRC_M1D0_CH1M_GAIN_CTRL_SRC_M1D0_CH1M_TARGET_GAIN_SHIFT);
pr_err("MIXER 1 D0, channel 1, Target_Gain"
"=0x%x, Gain_RampStep=0x%x\n", gain2, gain1);
address = (char *)ioremap_nocache((UInt32)
(SRCMIXER_BASE_ADDR +
SRCMIXER_SRC_M1D0_CH2M_GAIN_CTRL_OFFSET),
sizeof(UInt32));
value = ioread32(address);
iounmap(address);
gain1 = value;
gain1 &=
(SRCMIXER_SRC_M1D0_CH2M_GAIN_CTRL_SRC_M1D0_CH2M_GAIN_RAMPSTEP_MASK);
gain1 >>=
(SRCMIXER_SRC_M1D0_CH2M_GAIN_CTRL_SRC_M1D0_CH2M_GAIN_RAMPSTEP_SHIFT);
gain2 = value;
gain2 &=
(SRCMIXER_SRC_M1D0_CH2M_GAIN_CTRL_SRC_M1D0_CH2M_TARGET_GAIN_MASK);
gain2 >>=
(SRCMIXER_SRC_M1D0_CH2M_GAIN_CTRL_SRC_M1D0_CH2M_TARGET_GAIN_SHIFT);
pr_err("MIXER 1 D0, channel 2, Target_Gain"
"=0x%x, Gain_RampStep=0x%x\n", gain2, gain1);
address = (char *)ioremap_nocache((UInt32)
(SRCMIXER_BASE_ADDR +
SRCMIXER_SRC_M1D0_CH3M_GAIN_CTRL_OFFSET),
sizeof(UInt32));
value = ioread32(address);
iounmap(address);
gain1 = value;
gain1 &=
(SRCMIXER_SRC_M1D0_CH2M_GAIN_CTRL_SRC_M1D0_CH2M_GAIN_RAMPSTEP_MASK);
gain1 >>=
(SRCMIXER_SRC_M1D0_CH2M_GAIN_CTRL_SRC_M1D0_CH2M_GAIN_RAMPSTEP_SHIFT);
gain2 = value;
gain2 &=
(SRCMIXER_SRC_M1D0_CH2M_GAIN_CTRL_SRC_M1D0_CH2M_TARGET_GAIN_MASK);
gain2 >>=
(SRCMIXER_SRC_M1D0_CH2M_GAIN_CTRL_SRC_M1D0_CH2M_TARGET_GAIN_SHIFT);
pr_err("MIXER 1 D0, channel 3, Target_Gain"
"=0x%x, Gain_RampStep=0x%x\n", gain2, gain1);
address = (char *)ioremap_nocache((UInt32)
(SRCMIXER_BASE_ADDR +
SRCMIXER_SRC_M1D0_CH4M_GAIN_CTRL_OFFSET),
sizeof(UInt32));
value = ioread32(address);
iounmap(address);
gain1 = value;
gain1 &=
(SRCMIXER_SRC_M1D0_CH2M_GAIN_CTRL_SRC_M1D0_CH2M_GAIN_RAMPSTEP_MASK);
gain1 >>=
(SRCMIXER_SRC_M1D0_CH2M_GAIN_CTRL_SRC_M1D0_CH2M_GAIN_RAMPSTEP_SHIFT);
gain2 = value;
gain2 &=
(SRCMIXER_SRC_M1D0_CH2M_GAIN_CTRL_SRC_M1D0_CH2M_TARGET_GAIN_MASK);
gain2 >>=
(SRCMIXER_SRC_M1D0_CH2M_GAIN_CTRL_SRC_M1D0_CH2M_TARGET_GAIN_SHIFT);
pr_err("MIXER 1 D0, channel 4, Target_Gain"
"=0x%x, Gain_RampStep=0x%x\n", gain2, gain1);
address = (char *)ioremap_nocache((UInt32)
(SRCMIXER_BASE_ADDR +
SRCMIXER_SRC_M1D0_CH5L_GAIN_CTRL_OFFSET),
sizeof(UInt32));
value = ioread32(address);
iounmap(address);
gain1 = value;
gain1 &=
(SRCMIXER_SRC_M1D0_CH2M_GAIN_CTRL_SRC_M1D0_CH2M_GAIN_RAMPSTEP_MASK);
gain1 >>=
(SRCMIXER_SRC_M1D0_CH2M_GAIN_CTRL_SRC_M1D0_CH2M_GAIN_RAMPSTEP_SHIFT);
gain2 = value;
gain2 &=
(SRCMIXER_SRC_M1D0_CH2M_GAIN_CTRL_SRC_M1D0_CH2M_TARGET_GAIN_MASK);
gain2 >>=
(SRCMIXER_SRC_M1D0_CH2M_GAIN_CTRL_SRC_M1D0_CH2M_TARGET_GAIN_SHIFT);
pr_err("MIXER 1 D0, channel 5 left, "
"Target_Gain=0x%x, Gain_RampStep=0x%x\n",
gain2, gain1);
address = (char *)ioremap_nocache((UInt32)
(SRCMIXER_BASE_ADDR +
SRCMIXER_SRC_M1D0_CH5R_GAIN_CTRL_OFFSET),
sizeof(UInt32));
value = ioread32(address);
iounmap(address);
gain1 = value;
gain1 &=
(SRCMIXER_SRC_M1D0_CH2M_GAIN_CTRL_SRC_M1D0_CH2M_GAIN_RAMPSTEP_MASK);
gain1 >>=
(SRCMIXER_SRC_M1D0_CH2M_GAIN_CTRL_SRC_M1D0_CH2M_GAIN_RAMPSTEP_SHIFT);
gain2 = value;
gain2 &=
(SRCMIXER_SRC_M1D0_CH2M_GAIN_CTRL_SRC_M1D0_CH2M_TARGET_GAIN_MASK);
gain2 >>=
(SRCMIXER_SRC_M1D0_CH2M_GAIN_CTRL_SRC_M1D0_CH2M_TARGET_GAIN_SHIFT);
pr_err("MIXER 1 D0, channel 5 right, "
"Target_Gain=0x%x, Gain_RampStep=0x%x\n",
gain2, gain1);
address = (char *)ioremap_nocache((UInt32)
(SRCMIXER_BASE_ADDR +
SRCMIXER_SRC_M1D0_CH6L_GAIN_CTRL_OFFSET),
sizeof(UInt32));
value = ioread32(address);
iounmap(address);
gain1 = value;
gain1 &=
(SRCMIXER_SRC_M1D0_CH2M_GAIN_CTRL_SRC_M1D0_CH2M_GAIN_RAMPSTEP_MASK);
gain1 >>=
(SRCMIXER_SRC_M1D0_CH2M_GAIN_CTRL_SRC_M1D0_CH2M_GAIN_RAMPSTEP_SHIFT);
gain2 = value;
gain2 &=
(SRCMIXER_SRC_M1D0_CH2M_GAIN_CTRL_SRC_M1D0_CH2M_TARGET_GAIN_MASK);
gain2 >>=
(SRCMIXER_SRC_M1D0_CH2M_GAIN_CTRL_SRC_M1D0_CH2M_TARGET_GAIN_SHIFT);
pr_err("MIXER 1 D0, channel 6 left, "
"Target_Gain=0x%x, Gain_RampStep=0x%x\n",
gain2, gain1);
address = (char *)ioremap_nocache((UInt32)
(SRCMIXER_BASE_ADDR +
SRCMIXER_SRC_M1D0_CH6R_GAIN_CTRL_OFFSET),
sizeof(UInt32));
value = ioread32(address);
iounmap(address);
gain1 = value;
gain1 &=
(SRCMIXER_SRC_M1D0_CH2M_GAIN_CTRL_SRC_M1D0_CH2M_GAIN_RAMPSTEP_MASK);
gain1 >>=
(SRCMIXER_SRC_M1D0_CH2M_GAIN_CTRL_SRC_M1D0_CH2M_GAIN_RAMPSTEP_SHIFT);
gain2 = value;
gain2 &=
(SRCMIXER_SRC_M1D0_CH2M_GAIN_CTRL_SRC_M1D0_CH2M_TARGET_GAIN_MASK);
gain2 >>=
(SRCMIXER_SRC_M1D0_CH2M_GAIN_CTRL_SRC_M1D0_CH2M_TARGET_GAIN_SHIFT);
pr_err("MIXER 1 D0, channel 6 right, "
"Target_Gain=0x%x, Gain_RampStep=0x%x\n",
gain2, gain1);
address = (char *)ioremap_nocache((UInt32)
(SRCMIXER_BASE_ADDR +
SRCMIXER_SRC_M1D0_CH7L_GAIN_CTRL_OFFSET),
sizeof(UInt32));
value = ioread32(address);
iounmap(address);
gain1 = value;
gain1 &=
(SRCMIXER_SRC_M1D0_CH2M_GAIN_CTRL_SRC_M1D0_CH2M_GAIN_RAMPSTEP_MASK);
gain1 >>=
(SRCMIXER_SRC_M1D0_CH2M_GAIN_CTRL_SRC_M1D0_CH2M_GAIN_RAMPSTEP_SHIFT);
gain2 = value;
gain2 &=
(SRCMIXER_SRC_M1D0_CH2M_GAIN_CTRL_SRC_M1D0_CH2M_TARGET_GAIN_MASK);
gain2 >>=
(SRCMIXER_SRC_M1D0_CH2M_GAIN_CTRL_SRC_M1D0_CH2M_TARGET_GAIN_SHIFT);
pr_err("MIXER 1 D0, channel 7 left, "
"Target_Gain=0x%x, Gain_RampStep=0x%x\n",
gain2, gain1);
address = (char *)ioremap_nocache((UInt32)
(SRCMIXER_BASE_ADDR +
SRCMIXER_SRC_M1D0_CH7R_GAIN_CTRL_OFFSET),
sizeof(UInt32));
value = ioread32(address);
iounmap(address);
gain1 = value;
gain1 &=
(SRCMIXER_SRC_M1D0_CH2M_GAIN_CTRL_SRC_M1D0_CH2M_GAIN_RAMPSTEP_MASK);
gain1 >>=
(SRCMIXER_SRC_M1D0_CH2M_GAIN_CTRL_SRC_M1D0_CH2M_GAIN_RAMPSTEP_SHIFT);
gain2 = value;
gain2 &=
(SRCMIXER_SRC_M1D0_CH2M_GAIN_CTRL_SRC_M1D0_CH2M_TARGET_GAIN_MASK);
gain2 >>=
(SRCMIXER_SRC_M1D0_CH2M_GAIN_CTRL_SRC_M1D0_CH2M_TARGET_GAIN_SHIFT);
pr_err("MIXER 1 D0, channel 7 right, "
"Target_Gain=0x%x, Gain_RampStep=0x%x\n",
gain2, gain1);
/********/
address = (char *)ioremap_nocache((UInt32)
(SRCMIXER_BASE_ADDR +
SRCMIXER_SRC_M1D1_CH1M_GAIN_CTRL_OFFSET),
sizeof(UInt32));
value = ioread32(address);
iounmap(address);
gain1 = value;
gain1 &=
(SRCMIXER_SRC_M1D0_CH1M_GAIN_CTRL_SRC_M1D0_CH1M_GAIN_RAMPSTEP_MASK);
gain1 >>=
(SRCMIXER_SRC_M1D0_CH1M_GAIN_CTRL_SRC_M1D0_CH1M_GAIN_RAMPSTEP_SHIFT);
gain2 = value;
gain2 &=
(SRCMIXER_SRC_M1D0_CH1M_GAIN_CTRL_SRC_M1D0_CH1M_TARGET_GAIN_MASK);
gain2 >>=
(SRCMIXER_SRC_M1D0_CH1M_GAIN_CTRL_SRC_M1D0_CH1M_TARGET_GAIN_SHIFT);
pr_err("MIXER 1 D1, channel 1, Target_Gain"
"=0x%x, Gain_RampStep=0x%x\n", gain2, gain1);
address = (char *)ioremap_nocache((UInt32)
(SRCMIXER_BASE_ADDR +
SRCMIXER_SRC_M1D1_CH2M_GAIN_CTRL_OFFSET),
sizeof(UInt32));
value = ioread32(address);
iounmap(address);
gain1 = value;
gain1 &=
(SRCMIXER_SRC_M1D0_CH2M_GAIN_CTRL_SRC_M1D0_CH2M_GAIN_RAMPSTEP_MASK);
gain1 >>=
(SRCMIXER_SRC_M1D0_CH2M_GAIN_CTRL_SRC_M1D0_CH2M_GAIN_RAMPSTEP_SHIFT);
gain2 = value;
gain2 &=
(SRCMIXER_SRC_M1D0_CH2M_GAIN_CTRL_SRC_M1D0_CH2M_TARGET_GAIN_MASK);
gain2 >>=
(SRCMIXER_SRC_M1D0_CH2M_GAIN_CTRL_SRC_M1D0_CH2M_TARGET_GAIN_SHIFT);
pr_err("MIXER 1 D1, channel 2, Target_Gain"
"=0x%x, Gain_RampStep=0x%x\n", gain2, gain1);
address = (char *)ioremap_nocache((UInt32)
(SRCMIXER_BASE_ADDR +
SRCMIXER_SRC_M1D1_CH3M_GAIN_CTRL_OFFSET),
sizeof(UInt32));
value = ioread32(address);
iounmap(address);
gain1 = value;
gain1 &=
(SRCMIXER_SRC_M1D0_CH2M_GAIN_CTRL_SRC_M1D0_CH2M_GAIN_RAMPSTEP_MASK);
gain1 >>=
(SRCMIXER_SRC_M1D0_CH2M_GAIN_CTRL_SRC_M1D0_CH2M_GAIN_RAMPSTEP_SHIFT);
gain2 = value;
gain2 &=
(SRCMIXER_SRC_M1D0_CH2M_GAIN_CTRL_SRC_M1D0_CH2M_TARGET_GAIN_MASK);
gain2 >>=
(SRCMIXER_SRC_M1D0_CH2M_GAIN_CTRL_SRC_M1D0_CH2M_TARGET_GAIN_SHIFT);
pr_err("MIXER 1 D1, channel 3, Target_Gain"
"=0x%x, Gain_RampStep=0x%x\n", gain2, gain1);
address = (char *)ioremap_nocache((UInt32)
(SRCMIXER_BASE_ADDR +
SRCMIXER_SRC_M1D1_CH4M_GAIN_CTRL_OFFSET),
sizeof(UInt32));
value = ioread32(address);
iounmap(address);
gain1 = value;
gain1 &=
(SRCMIXER_SRC_M1D0_CH2M_GAIN_CTRL_SRC_M1D0_CH2M_GAIN_RAMPSTEP_MASK);
gain1 >>=
(SRCMIXER_SRC_M1D0_CH2M_GAIN_CTRL_SRC_M1D0_CH2M_GAIN_RAMPSTEP_SHIFT);
gain2 = value;
gain2 &=
(SRCMIXER_SRC_M1D0_CH2M_GAIN_CTRL_SRC_M1D0_CH2M_TARGET_GAIN_MASK);
gain2 >>=
(SRCMIXER_SRC_M1D0_CH2M_GAIN_CTRL_SRC_M1D0_CH2M_TARGET_GAIN_SHIFT);
pr_err("MIXER 1 D1, channel 4, "
"Target_Gain=0x%x, Gain_RampStep=0x%x\n",
gain2, gain1);
address = (char *)ioremap_nocache((UInt32)
(SRCMIXER_BASE_ADDR +
SRCMIXER_SRC_M1D1_CH5L_GAIN_CTRL_OFFSET),
sizeof(UInt32));
value = ioread32(address);
iounmap(address);
gain1 = value;
gain1 &=
(SRCMIXER_SRC_M1D0_CH2M_GAIN_CTRL_SRC_M1D0_CH2M_GAIN_RAMPSTEP_MASK);
gain1 >>=
(SRCMIXER_SRC_M1D0_CH2M_GAIN_CTRL_SRC_M1D0_CH2M_GAIN_RAMPSTEP_SHIFT);
gain2 = value;
gain2 &=
(SRCMIXER_SRC_M1D0_CH2M_GAIN_CTRL_SRC_M1D0_CH2M_TARGET_GAIN_MASK);
gain2 >>=
(SRCMIXER_SRC_M1D0_CH2M_GAIN_CTRL_SRC_M1D0_CH2M_TARGET_GAIN_SHIFT);
pr_err("MIXER 1 D1, channel 5 left, "
"Target_Gain=0x%x, Gain_RampStep=0x%x\n",
gain2, gain1);
address = (char *)ioremap_nocache((UInt32)
(SRCMIXER_BASE_ADDR +
SRCMIXER_SRC_M1D1_CH5R_GAIN_CTRL_OFFSET),
sizeof(UInt32));
value = ioread32(address);
iounmap(address);
gain1 = value;
gain1 &=
(SRCMIXER_SRC_M1D0_CH2M_GAIN_CTRL_SRC_M1D0_CH2M_GAIN_RAMPSTEP_MASK);
gain1 >>=
(SRCMIXER_SRC_M1D0_CH2M_GAIN_CTRL_SRC_M1D0_CH2M_GAIN_RAMPSTEP_SHIFT);
gain2 = value;
gain2 &=
(SRCMIXER_SRC_M1D0_CH2M_GAIN_CTRL_SRC_M1D0_CH2M_TARGET_GAIN_MASK);
gain2 >>=
(SRCMIXER_SRC_M1D0_CH2M_GAIN_CTRL_SRC_M1D0_CH2M_TARGET_GAIN_SHIFT);
pr_err("MIXER 1 D1, channel 5 right, "
"Target_Gain=0x%x, Gain_RampStep=0x%x\n",
gain2, gain1);
address = (char *)ioremap_nocache((UInt32)
(SRCMIXER_BASE_ADDR +
SRCMIXER_SRC_M1D1_CH6L_GAIN_CTRL_OFFSET),
sizeof(UInt32));
value = ioread32(address);
iounmap(address);
gain1 = value;
gain1 &=
(SRCMIXER_SRC_M1D0_CH2M_GAIN_CTRL_SRC_M1D0_CH2M_GAIN_RAMPSTEP_MASK);
gain1 >>=
(SRCMIXER_SRC_M1D0_CH2M_GAIN_CTRL_SRC_M1D0_CH2M_GAIN_RAMPSTEP_SHIFT);
gain2 = value;
gain2 &=
(SRCMIXER_SRC_M1D0_CH2M_GAIN_CTRL_SRC_M1D0_CH2M_TARGET_GAIN_MASK);
gain2 >>=
(SRCMIXER_SRC_M1D0_CH2M_GAIN_CTRL_SRC_M1D0_CH2M_TARGET_GAIN_SHIFT);
pr_err("MIXER 1 D1, channel 6 left, "
"Target_Gain=0x%x, Gain_RampStep=0x%x\n",
gain2, gain1);
address = (char *)ioremap_nocache((UInt32)
(SRCMIXER_BASE_ADDR +
SRCMIXER_SRC_M1D1_CH6R_GAIN_CTRL_OFFSET),
sizeof(UInt32));
value = ioread32(address);
iounmap(address);
gain1 = value;
gain1 &=
(SRCMIXER_SRC_M1D0_CH2M_GAIN_CTRL_SRC_M1D0_CH2M_GAIN_RAMPSTEP_MASK);
gain1 >>=
(SRCMIXER_SRC_M1D0_CH2M_GAIN_CTRL_SRC_M1D0_CH2M_GAIN_RAMPSTEP_SHIFT);
gain2 = value;
gain2 &=
(SRCMIXER_SRC_M1D0_CH2M_GAIN_CTRL_SRC_M1D0_CH2M_TARGET_GAIN_MASK);
gain2 >>=
(SRCMIXER_SRC_M1D0_CH2M_GAIN_CTRL_SRC_M1D0_CH2M_TARGET_GAIN_SHIFT);
pr_err("MIXER 1 D1, channel 6 right, "
"Target_Gain=0x%x, Gain_RampStep=0x%x\n",
gain2, gain1);
address = (char *)ioremap_nocache((UInt32)
(SRCMIXER_BASE_ADDR +
SRCMIXER_SRC_M1D1_CH7L_GAIN_CTRL_OFFSET),
sizeof(UInt32));
value = ioread32(address);
iounmap(address);
gain1 = value;
gain1 &=
(SRCMIXER_SRC_M1D0_CH2M_GAIN_CTRL_SRC_M1D0_CH2M_GAIN_RAMPSTEP_MASK);
gain1 >>=
(SRCMIXER_SRC_M1D0_CH2M_GAIN_CTRL_SRC_M1D0_CH2M_GAIN_RAMPSTEP_SHIFT);
gain2 = value;
gain2 &=
(SRCMIXER_SRC_M1D0_CH2M_GAIN_CTRL_SRC_M1D0_CH2M_TARGET_GAIN_MASK);
gain2 >>=
(SRCMIXER_SRC_M1D0_CH2M_GAIN_CTRL_SRC_M1D0_CH2M_TARGET_GAIN_SHIFT);
pr_err("MIXER 1 D1, channel 7 left, "
"Target_Gain=0x%x, Gain_RampStep=0x%x\n",
gain2, gain1);
address = (char *)ioremap_nocache((UInt32)
(SRCMIXER_BASE_ADDR +
SRCMIXER_SRC_M1D1_CH7R_GAIN_CTRL_OFFSET),
sizeof(UInt32));
value = ioread32(address);
iounmap(address);
gain1 = value;
gain1 &=
(SRCMIXER_SRC_M1D0_CH2M_GAIN_CTRL_SRC_M1D0_CH2M_GAIN_RAMPSTEP_MASK);
gain1 >>=
(SRCMIXER_SRC_M1D0_CH2M_GAIN_CTRL_SRC_M1D0_CH2M_GAIN_RAMPSTEP_SHIFT);
gain2 = value;
gain2 &=
(SRCMIXER_SRC_M1D0_CH2M_GAIN_CTRL_SRC_M1D0_CH2M_TARGET_GAIN_MASK);
gain2 >>=
(SRCMIXER_SRC_M1D0_CH2M_GAIN_CTRL_SRC_M1D0_CH2M_TARGET_GAIN_SHIFT);
pr_err("MIXER 1 D1, channel 7 right, "
"Target_Gain=0x%x, Gain_RampStep=0x%x\n",
gain2, gain1);
/**********/
for (index = 0x00000160; index <= 0x00000270;
index = index + 4) {
address = (char *)
ioremap_nocache((UInt32)
(SRCMIXER_BASE_ADDR +
index), sizeof(UInt32));
value = ioread32(address);
iounmap(address);
pr_err("SRCMIXER_BASE_ADDR + offset 0x%x, "
"value = 0x%x\n", index, value);
}
} /* 500 cmd */
break;
case 1000: /*at*maudtst=1000,addr,len */
{
u32 value, index, phy_addr, size;
char *addr;
if (Params[2] == 0)
size = 1;
else
size = Params[2] >> 2;
phy_addr = Params[1];
if (!phy_addr) {
pr_err("invalid addr 0\n");
return 0;
}
addr = ioremap_nocache(phy_addr, sizeof(u32));
if (!addr) {
pr_err(" addr ioremap failed\n");
return 0;
}
pr_err("Read phy_addr 0x%08x (virtual %p), "
"size = 0x%08x bytes\n",
phy_addr, addr, size << 2);
iounmap(addr);
for (index = 0; index < size; index++) {
addr = ioremap_nocache(phy_addr, sizeof(u32));
if (addr) {
value = ioread32(addr);
iounmap(addr);
pr_err("[%08x] = %08x\n", phy_addr,
value);
}
phy_addr += 4;
}
}
break;
default:
aTrace(LOG_AUDIO_DRIVER,
"%s Not supported command\n", __func__);
return -1;
}
return 0;
}
