void cyg_hal_plf_comms_init(void) { static int initialized = 0; if (initialized) return; initialized = 1; cyg_hal_plf_scif_init(0, 0, CYGNUM_HAL_INTERRUPT_SCIF_RXI, SCI_BASE); }
void cyg_hal_plf_comms_init(void) { static int initialized = 0; if (initialized) return; initialized = 1; // COM1 is SCIF2. cyg_hal_plf_scif_init(0, 0, CYGNUM_HAL_INTERRUPT_SCIF_RXI, (cyg_uint8*)CYGARC_REG_SCIF_SCSMR2); // SuperIO claims channel 1 for the COM2 connector // cyg_hal_plf_serial_init(); }
void cyg_hal_plf_comms_init(void) { static int initialized = 0; if (initialized) return; initialized = 1; // SuperIO claims channel 0 for the COM1 connector cyg_hal_plf_serial_init(); // Debug connector on mainboard is SCIF2. cyg_hal_plf_scif_init(0, 1, CYGNUM_HAL_INTERRUPT_SCIF_RXI2, (cyg_uint8*)CYGARC_REG_SCIF_SCSMR2); }
void cyg_hal_plf_comms_init(void) { static int initialized = 0; if (initialized) return; initialized = 1; // SuperIO claims channels 0-1 for COM1/COM2 connectors on // the back of the chassis. cyg_hal_plf_serial_init(); // Debug connector on mainboard is SCIF2. cyg_hal_plf_scif_init(0, 2, CYGNUM_HAL_INTERRUPT_SCIF_RXI2, (cyg_uint8*)CYGARC_REG_SCIF_SCSMR2); }