static bool flash( void ) { cyg_handle_t handle; cyg_interrupt intr; cyg_interrupt_create(CYGNUM_HAL_ISR_MIN, PRIO_A, (cyg_addrword_t)333, isr0, dsr0, &handle, &intr ); cyg_interrupt_delete(handle); return true; }
/*------------------------------------------- | Name:dev_at91sam9261_spi_close | Description: | Parameters: | Return Type: | Comments: | See: ---------------------------------------------*/ int dev_at91sam9261_spi_close(desc_t desc){ #ifdef USE_DMA_INTERUPT_TRANSMISSION //masquer l'it SPI cyg_interrupt_mask(CYGNUM_HAL_INTERRUPT_SPI0); //supprimer l'IT cyg_interrupt_delete(_at91sam9261_spi_handle); //detruire le semaphore d'attente kernel_sem_destroy(&spi_sem_tx_end); #endif //destruction du timer rttmr_delete(&dev_at91sam9261_spi_timer); }
void capInit(BOOL bCapEngEnable, BOOL bCapIntEnable) #endif { int j; int i=sizeof(VCEInit)/sizeof(T_REG_INFO); for (j=0; j<i ;j++) outpw((CAP_BA+VCEInit[j].uAddr),VCEInit[j].uValue); if(bCapEngEnable==TRUE) { outpw(REG_CAPEngine,inpw(REG_CAPEngine)|0x01); } else { outpw(REG_CAPEngine,inpw(REG_CAPEngine)&0xfffffffe); } if(bCapIntEnable==TRUE) { #ifdef ECOS cyg_interrupt_disable(); cyg_interrupt_create(IRQ_VCE, 1, 0, capIntHandler, capIntHandlerDSR, &(t_eCos->cap_int_handle), &(t_eCos->cap_int)); cyg_interrupt_attach(t_eCos->cap_int_handle); cyg_interrupt_unmask(IRQ_VCE); cyg_interrupt_enable(); #else sysInstallISR(IRQ_LEVEL_1, IRQ_VCE, (PVOID)capIntHandler); // sysEnableInterrupt(IRQ_VCE); #endif outpw(REG_CAPFuncEnable,inpw(REG_CAPFuncEnable)|0x2); } else { #ifdef ECOS cyg_interrupt_mask(IRQ_VCE); cyg_interrupt_detach(t_eCos->cap_int_handle); cyg_interrupt_delete(t_eCos->cap_int_handle); #else sysDisableInterrupt(IRQ_VCE); #endif outpw(REG_CAPFuncEnable,inpw(REG_CAPFuncEnable)&0xfffffffd); } }