int board_late_init(void) { unsigned char buf[2]; int ret; /* PinMux for HALTEN */ if (davinci_configure_pin_mux(halten_pin, ARRAY_SIZE(halten_pin)) != 0) return 1; /* Set HALTEN to high */ gpio_direction_output(134, 1); /* Set fixed contrast settings for LCD via I2C potentiometer */ buf[0] = 0x00; buf[1] = 0xd7; ret = i2c_write(0x2e, 6, 1, buf, 2); if (ret) puts("\nContrast Settings FAILED\n"); /* Set LCD_B_PWR high to power up LCD Backlight*/ gpio_set_value(102, 1); return 0; }
int board_early_init_f(void) { /* PinMux for GPIO */ if (davinci_configure_pin_mux(gpio_pins, ARRAY_SIZE(gpio_pins)) != 0) return 1; /* Set DISP_ON high to enable LCD output*/ gpio_direction_output(97, 1); /* Set the RESETOUTn low */ gpio_direction_output(111, 0); /* Set U0_SW0 low for UART0 as console*/ gpio_direction_output(106, 0); /* Set U0_SW1 low for UART0 as console*/ gpio_direction_output(108, 0); /* Set LCD_B_PWR low to power down LCD Backlight*/ gpio_direction_output(102, 0); #ifndef CONFIG_USE_IRQ irq_init(); #endif /* * NAND CS setup - cycle counts based on da850evm NAND timings in the * Linux kernel @ 25MHz EMIFA */ #ifdef CONFIG_NAND_DAVINCI writel((DAVINCI_ABCR_WSETUP(0) | DAVINCI_ABCR_WSTROBE(1) | DAVINCI_ABCR_WHOLD(0) | DAVINCI_ABCR_RSETUP(0) | DAVINCI_ABCR_RSTROBE(1) | DAVINCI_ABCR_RHOLD(0) | DAVINCI_ABCR_TA(0) | DAVINCI_ABCR_ASIZE_8BIT), &davinci_emif_regs->ab1cr); /* CS2 */ #endif /* * Power on required peripherals * ARM does not have access by default to PSC0 and PSC1 * assuming here that the DSP bootloader has set the IOPU * such that PSC access is available to ARM */ if (da8xx_configure_lpsc_items(lpsc, ARRAY_SIZE(lpsc))) return 1; /* setup the SUSPSRC for ARM to control emulation suspend */ writel(readl(&davinci_syscfg_regs->suspsrc) & ~(DAVINCI_SYSCFG_SUSPSRC_EMAC | DAVINCI_SYSCFG_SUSPSRC_I2C | DAVINCI_SYSCFG_SUSPSRC_SPI1 | DAVINCI_SYSCFG_SUSPSRC_TIMER0 | DAVINCI_SYSCFG_SUSPSRC_UART0), &davinci_syscfg_regs->suspsrc); /* configure pinmux settings */ if (davinci_configure_pin_mux_items(pinmuxes, ARRAY_SIZE(pinmuxes))) return 1; #ifdef CONFIG_DRIVER_TI_EMAC if (davinci_configure_pin_mux(emac_pins, ARRAY_SIZE(emac_pins)) != 0) return 1; davinci_emac_mii_mode_sel(HAS_RMII); #endif /* CONFIG_DRIVER_TI_EMAC */ /* enable the console UART */ writel((DAVINCI_UART_PWREMU_MGMT_FREE | DAVINCI_UART_PWREMU_MGMT_URRST | DAVINCI_UART_PWREMU_MGMT_UTRST), &davinci_uart0_ctrl_regs->pwremu_mgmt); /* * Reconfigure the LCDC priority to the highest to ensure that * the throughput/latency requirements for the LCDC are met. */ writel(readl(&davinci_syscfg_regs->mstpri[2]) & 0x0fffffff, &davinci_syscfg_regs->mstpri[2]); return 0; }
/** * rmii_hw_init * * DA850/OMAP-L138 EVM can interface to a daughter card for * additional features. This card has an I2C GPIO Expander TCA6416 * to select the required functions like camera, RMII Ethernet, * character LCD, video. * * Initialization of the expander involves configuring the * polarity and direction of the ports. P07-P05 are used here. * These ports are connected to a Mux chip which enables only one * functionality at a time. * * For RMII phy to respond, the MII MDIO clock has to be disabled * since both the PHY devices have address as zero. The MII MDIO * clock is controlled via GPIO2[6]. * * This code is valid for Beta version of the hardware */ int rmii_hw_init(void) { const struct pinmux_config gpio_pins[] = { { pinmux(6), 8, 1 } }; u_int8_t buf[2]; unsigned int temp; int ret; /* PinMux for GPIO */ if (davinci_configure_pin_mux(gpio_pins, ARRAY_SIZE(gpio_pins)) != 0) return 1; /* I2C Exapnder configuration */ /* Set polarity to non-inverted */ buf[0] = 0x0; buf[1] = 0x0; ret = i2c_write(CONFIG_SYS_I2C_EXPANDER_ADDR, 4, 1, buf, 2); if (ret) { printf("\nExpander @ 0x%02x write FAILED!!!\n", CONFIG_SYS_I2C_EXPANDER_ADDR); return ret; } /* Configure P07-P05 as outputs */ buf[0] = 0x1f; buf[1] = 0xff; ret = i2c_write(CONFIG_SYS_I2C_EXPANDER_ADDR, 6, 1, buf, 2); if (ret) { printf("\nExpander @ 0x%02x write FAILED!!!\n", CONFIG_SYS_I2C_EXPANDER_ADDR); } /* For Ethernet RMII selection * P07(SelA)=0 * P06(SelB)=1 * P05(SelC)=1 */ if (i2c_read(CONFIG_SYS_I2C_EXPANDER_ADDR, 2, 1, buf, 1)) { printf("\nExpander @ 0x%02x read FAILED!!!\n", CONFIG_SYS_I2C_EXPANDER_ADDR); } buf[0] &= 0x1f; buf[0] |= (0 << 7) | (1 << 6) | (1 << 5); if (i2c_write(CONFIG_SYS_I2C_EXPANDER_ADDR, 2, 1, buf, 1)) { printf("\nExpander @ 0x%02x write FAILED!!!\n", CONFIG_SYS_I2C_EXPANDER_ADDR); } /* Set the output as high */ temp = REG(GPIO_BANK2_REG_SET_ADDR); temp |= (0x01 << 6); REG(GPIO_BANK2_REG_SET_ADDR) = temp; /* Set the GPIO direction as output */ temp = REG(GPIO_BANK2_REG_DIR_ADDR); temp &= ~(0x01 << 6); REG(GPIO_BANK2_REG_DIR_ADDR) = temp; return 0; }
int board_init(void) { #ifdef CONFIG_USE_NOR u32 val; #endif #ifndef CONFIG_USE_IRQ irq_init(); #endif #ifdef CONFIG_NAND_DAVINCI /* * NAND CS setup - cycle counts based on da850evm NAND timings in the * Linux kernel @ 25MHz EMIFA */ writel((DAVINCI_ABCR_WSETUP(0) | DAVINCI_ABCR_WSTROBE(1) | DAVINCI_ABCR_WHOLD(0) | DAVINCI_ABCR_RSETUP(0) | DAVINCI_ABCR_RSTROBE(1) | DAVINCI_ABCR_RHOLD(0) | DAVINCI_ABCR_TA(1) | DAVINCI_ABCR_ASIZE_8BIT), &davinci_emif_regs->ab2cr); /* CS3 */ #endif /* arch number of the board */ gd->bd->bi_arch_number = MACH_TYPE_DAVINCI_DA850_EVM; /* address of boot parameters */ gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR; /* * Power on required peripherals * ARM does not have access by default to PSC0 and PSC1 * assuming here that the DSP bootloader has set the IOPU * such that PSC access is available to ARM */ if (da8xx_configure_lpsc_items(lpsc, ARRAY_SIZE(lpsc))) return 1; /* setup the SUSPSRC for ARM to control emulation suspend */ writel(readl(&davinci_syscfg_regs->suspsrc) & ~(DAVINCI_SYSCFG_SUSPSRC_EMAC | DAVINCI_SYSCFG_SUSPSRC_I2C | DAVINCI_SYSCFG_SUSPSRC_SPI1 | DAVINCI_SYSCFG_SUSPSRC_TIMER0 | DAVINCI_SYSCFG_SUSPSRC_UART2), &davinci_syscfg_regs->suspsrc); /* configure pinmux settings */ if (davinci_configure_pin_mux_items(pinmuxes, ARRAY_SIZE(pinmuxes))) return 1; #ifdef CONFIG_USE_NOR /* Set the GPIO direction as output */ clrbits_be32((u32 *)GPIO_BANK0_REG_DIR_ADDR, (0x01 << 11)); /* Set the output as low */ val = readl(GPIO_BANK0_REG_SET_ADDR); val |= (0x01 << 11); writel(val, GPIO_BANK0_REG_CLR_ADDR); #endif #ifdef CONFIG_DRIVER_TI_EMAC if (davinci_configure_pin_mux(emac_pins, ARRAY_SIZE(emac_pins)) != 0) return 1; davinci_emac_mii_mode_sel(HAS_RMII); #endif /* CONFIG_DRIVER_TI_EMAC */ /* enable the console UART */ writel((DAVINCI_UART_PWREMU_MGMT_FREE | DAVINCI_UART_PWREMU_MGMT_URRST | DAVINCI_UART_PWREMU_MGMT_UTRST), &davinci_uart2_ctrl_regs->pwremu_mgmt); return 0; }
int board_init(void) { unsigned int temp; int j; #ifndef CONFIG_USE_IRQ /* * Mask all IRQs by clearing the global enable and setting * the enable clear for all the 90 interrupts. */ writel(0, &davinci_aintc_regs->ger); writel(0, &davinci_aintc_regs->hier); writel(0xffffffff, &davinci_aintc_regs->ecr1); writel(0xffffffff, &davinci_aintc_regs->ecr2); writel(0xffffffff, &davinci_aintc_regs->ecr3); #endif /* arch number of the board */ gd->bd->bi_arch_number = MACH_TYPE_DAVINCI_DA850_EVM; /* address of boot parameters */ gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR; /* * Power on required peripherals * ARM does not have access by default to PSC0 and PSC1 * assuming here that the DSP bootloader has set the IOPU * such that PSC access is available to ARM */ lpsc_on(DAVINCI_LPSC_AEMIF); /* NAND, NOR */ lpsc_on(DAVINCI_LPSC_SPI1); /* Serial Flash */ lpsc_on(DAVINCI_LPSC_EMAC); /* image download */ lpsc_on(DAVINCI_LPSC_UART2); /* console */ lpsc_on(DAVINCI_LPSC_GPIO); #ifdef CONFIG_DAVINCI_MMC lpsc_on(DAVINCI_LPSC_MMC_SD); #endif /* setup the SUSPSRC for ARM to control emulation suspend */ writel(readl(&davinci_syscfg_regs->suspsrc) & ~(DAVINCI_SYSCFG_SUSPSRC_EMAC | DAVINCI_SYSCFG_SUSPSRC_I2C | DAVINCI_SYSCFG_SUSPSRC_SPI1 | DAVINCI_SYSCFG_SUSPSRC_TIMER0 | DAVINCI_SYSCFG_SUSPSRC_UART2), &davinci_syscfg_regs->suspsrc); #ifdef CONFIG_SPI_FLASH if (davinci_configure_pin_mux(spi1_pins, ARRAY_SIZE(spi1_pins)) != 0) return 1; #endif #ifdef CONFIG_DAVINCI_MMC if (davinci_configure_pin_mux(mmc0_pins, ARRAY_SIZE(mmc0_pins)) != 0) return 1; /* Set the GPIO direction as output */ temp = REG(GPIO_BANK0_REG_DIR_ADDR); temp &= ~(0x01 << 11); REG(GPIO_BANK0_REG_DIR_ADDR) = temp; /* Set the output as high */ temp = REG(GPIO_BANK0_REG_SET_ADDR); temp |= (0x01 << 11); REG(GPIO_BANK0_REG_SET_ADDR) = temp; #endif if (davinci_configure_pin_mux(uart_pins, ARRAY_SIZE(uart_pins)) != 0) return 1; if (davinci_configure_pin_mux(i2c_pins, ARRAY_SIZE(i2c_pins)) != 0) return 1; #ifdef CONFIG_DRIVER_TI_EMAC if (davinci_configure_pin_mux(emac_pins, ARRAY_SIZE(emac_pins)) != 0) return 1; #ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII REG(CFGCHIP3) |= (1 << 8); #else /* set cfgchip3 to selct MII */ REG(CFGCHIP3) &= ~(1 << 8); #endif /* CONFIG_DRIVER_TI_EMAC_USE_RMII */ #endif /* CONFIG_DRIVER_TI_EMAC */ #ifdef CONFIG_USE_NAND if (davinci_configure_pin_mux(aemif_pins, ARRAY_SIZE(aemif_pins)) != 0) return 1; #elif defined(CONFIG_SYS_USE_NOR) if (davinci_configure_pin_mux(nor_pins, ARRAY_SIZE(nor_pins)) != 0) return 1; /* Set the GPIO direction as output */ temp = REG(GPIO_BANK0_REG_DIR_ADDR); temp &= ~(0x01 << 11); REG(GPIO_BANK0_REG_DIR_ADDR) = temp; /* Set the output as low */ temp = REG(GPIO_BANK0_REG_SET_ADDR); temp |= (0x01 << 11); REG(GPIO_BANK0_REG_CLR_ADDR) = temp; #endif /* * If we boot over UART, Terminal doesn't display characters * Reset the values set by Boot ROM */ for(j=0;j<15;){ REG(DAVINCI_UART2_BASE + (j*4)) = 0; j=j+1; } /* enable the console UART */ writel((DAVINCI_UART_PWREMU_MGMT_FREE | DAVINCI_UART_PWREMU_MGMT_URRST | DAVINCI_UART_PWREMU_MGMT_UTRST), &davinci_uart2_ctrl_regs->pwremu_mgmt); if (davinci_configure_pin_mux(button_pins, ARRAY_SIZE(button_pins)) != 0) return 1; return(0); }
int board_init(void) { #ifndef CONFIG_USE_IRQ /* * Mask all IRQs by clearing the global enable and setting * the enable clear for all the 90 interrupts. */ writel(0, &davinci_aintc_regs->ger); writel(0, &davinci_aintc_regs->hier); writel(0xffffffff, &davinci_aintc_regs->ecr1); writel(0xffffffff, &davinci_aintc_regs->ecr2); writel(0xffffffff, &davinci_aintc_regs->ecr3); #endif /* arch number of the board */ gd->bd->bi_arch_number = MACH_TYPE_DAVINCI_DA830_EVM; /* address of boot parameters */ gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR; /* * Power on required peripherals * ARM does not have access by default to PSC0 and PSC1 * assuming here that the DSP bootloader has set the IOPU * such that PSC access is available to ARM */ lpsc_on(DAVINCI_LPSC_AEMIF); /* NAND, NOR */ lpsc_on(DAVINCI_LPSC_SPI0); /* Serial Flash */ lpsc_on(DAVINCI_LPSC_EMAC); /* image download */ lpsc_on(DAVINCI_LPSC_UART2); /* console */ lpsc_on(DAVINCI_LPSC_GPIO); /* setup the SUSPSRC for ARM to control emulation suspend */ writel(readl(&davinci_syscfg_regs->suspsrc) & ~(DAVINCI_SYSCFG_SUSPSRC_EMAC | DAVINCI_SYSCFG_SUSPSRC_I2C | DAVINCI_SYSCFG_SUSPSRC_SPI0 | DAVINCI_SYSCFG_SUSPSRC_TIMER0 | DAVINCI_SYSCFG_SUSPSRC_UART2), &davinci_syscfg_regs->suspsrc); #ifdef CONFIG_SPI_FLASH if (davinci_configure_pin_mux(spi0_pins, ARRAY_SIZE(spi0_pins)) != 0) return 1; #endif if (davinci_configure_pin_mux(uart_pins, ARRAY_SIZE(uart_pins)) != 0) return 1; if (davinci_configure_pin_mux(i2c_pins, ARRAY_SIZE(i2c_pins)) != 0) return 1; if (davinci_configure_pin_mux(usb_pins, ARRAY_SIZE(usb_pins)) != 0) return 1; /* enable the console UART */ writel((DAVINCI_UART_PWREMU_MGMT_FREE | DAVINCI_UART_PWREMU_MGMT_URRST | DAVINCI_UART_PWREMU_MGMT_UTRST), &davinci_uart2_ctrl_regs->pwremu_mgmt); return(0); }