static void main(unsigned long bist) { unsigned long x; device_t dev; /* Enable multifunction for northbridge. */ pci_write_config8(ctrl.d0f0, 0x4f, 0x01); w83697hf_set_clksel_48(DUMMY_DEV); w83697hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); console_init(); enable_smbus(); smbus_fixup(&ctrl); /* Halt if there was a built-in self test failure. */ report_bist_failure(bist); print_debug("Enabling mainboard devices\n"); enable_mainboard_devices(); print_debug("Enable F-ROM Shadow RAM\n"); enable_shadow_ram(); print_debug("Setup CPU Interface\n"); c3_cpu_setup(ctrl.d0f2); ddr_ram_setup(); if (bist == 0) early_mtrr_init(); }
void main(unsigned long bist) { /* Enable multifunction for northbridge. */ pci_write_config8(ctrl.d0f0, 0x4f, 0x01); ite_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); console_init(); enable_smbus(); smbus_fixup(&ctrl); report_bist_failure(bist); ddr_ram_setup(&ctrl); }
void main(unsigned long bist) { /* Enable multifunction for northbridge. */ pci_write_config8(ctrl.d0f0, 0x4f, 0x01); fintek_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); console_init(); enable_smbus(); smbus_fixup(&ctrl); /* Halt if there was a built-in self test failure. */ report_bist_failure(bist); enable_mainboard_devices(); ddr_ram_setup(&ctrl); }
static void main(unsigned long bist) { device_t dev; /* Enable VGA; 32MB buffer. */ pci_write_config8(0, 0xe1, 0xdd); /* * Disable the firewire stuff, which apparently steps on IO 0+ on * reset. Doh! */ dev = pci_locate_device_on_bus(PCI_ID(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_6305), 0); if (dev != PCI_DEV_INVALID) pci_write_config8(dev, 0x15, 0x1c); enable_vt8235_serial(); console_init(); enable_smbus(); /* Halt if there was a built in self test failure */ report_bist_failure(bist); // init_timer(); post_code(0x05); print_debug(" Enabling mainboard devices\n"); enable_mainboard_devices(); print_debug(" Enabling shadow ram\n"); enable_shadow_ram(); ddr_ram_setup((const struct mem_controller *)0); if (bist == 0) early_mtrr_init(); //dump_pci_devices(); }