C++ (Cpp) ddr_write Examples

Example #1

File: cmd_ddr_test.c Project: matt0526/matt_uboot

int do_ddr_test(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
    char *endp;
    unsigned long loop = 1;
    unsigned char lflag = 0;
    unsigned start_addr = DDR_TEST_START_ADDR;

    if(!argc)
        goto DDR_TEST_START;

    if (strcmp(argv[1], "l") == 0){
        lflag = 1;
    }
    else if (strcmp(argv[1], "h") == 0){
        goto usage;
    }
    else{
        loop = simple_strtoul(argv[1], &endp, 10);
        if (*argv[1] == 0 || *endp != 0)
            loop = 1;
    }
    
    if(argc > 2){
        start_addr = simple_strtoul(argv[2], &endp, 16);
        if (*argv[2] == 0 || *endp != 0)
            start_addr = DDR_TEST_START_ADDR;
    }
    
DDR_TEST_START:

    do{
        if(lflag)
            loop = 888;
        printf("\rStart writing at 0x%08x - 0x%08x...", start_addr, start_addr + DDR_TEST_SIZE);
        ddr_write((void *)start_addr, DDR_TEST_SIZE);
	    printf("\rEnd write.                                 ");
	    printf("\rStart 1st reading...                       ");
	    ddr_read((void *)start_addr, DDR_TEST_SIZE);
	    printf("\rEnd 1st read.                              ");
	    printf("\rStart 2nd reading...                       ");
	    ddr_read((void *)start_addr, DDR_TEST_SIZE);
	    printf("\rEnd 2nd read.                              ");
	    printf("\rStart 3rd reading...                       ");
	    ddr_read((void *)start_addr, DDR_TEST_SIZE);
	    printf("\rEnd 3rd read.                              \n");
	  }while(--loop);

	  return 0;

usage:
	cmd_usage(cmdtp);
	return 1;
}

Example #2

File: s3c64x_clock.c Project: astwish/witrom

int mem_init(void)
{
	__u32 val;
	__u32 rcd, rfc, rp;

	ddr_write(P1MEMCCMD, 0x4);

	ddr_write(P1REFRESH, TIME2CYCLE(tREF));
	ddr_write(P1CASLAT, CASL << 1);
	ddr_write(P1T_DQSS, tDQSS);
	ddr_write(P1T_MRD, tMRD);
	ddr_write(P1T_RAS, TIME2CYCLE(tRAS));
	ddr_write(P1T_RC, TIME2CYCLE(tRC));

	rcd = TIME2CYCLE(tRCD);
	ddr_write(P1T_RCD, TIME_SUB3(rcd) << 3 | rcd);

	rfc = TIME2CYCLE(tRFC);
	ddr_write(P1T_RFC, TIME_SUB3(rfc) << 3 | rfc);

	rp = TIME2CYCLE(tRP);
	ddr_write(P1T_RP, TIME_SUB3(rp) << 3 | rp);

	ddr_write(P1T_RRD, TIME2CYCLE(tRRD));
	ddr_write(P1T_WR, TIME2CYCLE(tWR));
	ddr_write(P1T_WTR, 2);
	ddr_write(P1T_XP, 2);

	ddr_write(P1T_XSR, TIME2CYCLE(tXSR));
	ddr_write(P1T_ESR, TIME2CYCLE(tXSR));

	ddr_write(P1MEMCFG, 2 << 15 | 2 << 3 | 2);
	ddr_write(P1MEMCFG2, 1 << 11 | 3 << 8 | 1 << 6 | 1);

	ddr_write(P1CHIP_0_CFG, 1 << 16 | 0x50 << 8 | 0xf8);

	//
	ddr_write(P1DIRECTCMD, MCMD_NOP << 18);
	ddr_write(P1DIRECTCMD, MCMD_PRE << 18);
	ddr_write(P1DIRECTCMD, MCMD_REF << 18);
	ddr_write(P1DIRECTCMD, MCMD_REF << 18);
	ddr_write(P1DIRECTCMD, MCMD_MRS << 18 | 0x32);
	ddr_write(P1DIRECTCMD, MCMD_MRS << 18 | 2 << 16);

	ddr_write(P1MEMCCMD, 0);

	while((ddr_read(P1MEMSTAT) & 0x3) != 1);

	val = readl(VA(0x7E00F120));
	val |= 0x1000;
	val &= ~0xbf;
	writel(VA(0x7E00F120), val);

	return SDRAM_BASE + SDRAM_SIZE;
}